From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4864:20::242; helo=mail-lj1-x242.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lj1-x242.google.com (mail-lj1-x242.google.com [IPv6:2a00:1450:4864:20::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D32C12097FA9A for ; Fri, 13 Jul 2018 07:11:18 -0700 (PDT) Received: by mail-lj1-x242.google.com with SMTP id q5-v6so24622740ljh.12 for ; Fri, 13 Jul 2018 07:11:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=ofHVQayQXyMBqtsdjidEcOBi79kmoWMqvLljo1CgVmo=; b=0H7V+IgOcZEVIlVJE/yo4Q1SOOWF23bOaYDXFcrEyGrvQYUeAzC0qv48laa81x095F AlV288LJdwmITCrk9iSaI2YYYTMVezF+IT0m1Us8ts2Xyn/ENgntMcPHEiXP4XwWzZYt 50G2ny05NCZEpicfaFqu6AnQiITbz+7h3lf1Q5G7j013mco0QBivVht64NmfeRGgMFcy 0KDu1cLIOKo35jer4UmepXMA70PQEaQWzwbFzUJI2Plhv7xTvrUb4+sBxpZj73qdfHeP 0QfvDjCFBmj4vFKj84/MclRN6DQZ4aXFAFTilzVgAYupRaiXjq/7r1vhZk/hmZB0kCGj vsAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ofHVQayQXyMBqtsdjidEcOBi79kmoWMqvLljo1CgVmo=; b=C8w1Pz81b3bNa7r8huu2PDVsTUHSlAewt3X05pFh3nkNeKpQoCswFQvKWnX0EK06D9 WUmEoAaBeGbrs+BbzRAW1DTuubl3i11pNVHhj2gF60BpNA77+JxA89HzwK8J0GCqDADk FG7uvBAW4XKWQ4nzCoSlOqbwXuT/VZdW0zdkHiOX9xeXnzdyWbigUfEuO/NYAOWz82+d xCriFQ21E6YIRhCQm48E3dMTyRWBnAinxB1GYRq3CpDHLPblZTAevI0ZAahc6BWzxw0I s5BjvRkzByFRGf+V28o9g4iRUuePRGrASYB2jFx6yhjSJC0kVpEAzklKVk6S7J/oTKEW B1Xg== X-Gm-Message-State: AOUpUlEo2TMybYHGLJsj7tKkmYq213x1Pc7diviWs7p75V9U3381TPQk T29Il6Rf13i04eNE1uz71s3N5YLVMeE= X-Google-Smtp-Source: AAOMgpcclv4RIyY4yTRsZdbS7ec78YEcozPHbGpRjZh0mGTTzwWi9uHtRB52lirSpxP7IcTjfN1Y+g== X-Received: by 2002:a2e:954e:: with SMTP id t14-v6mr3344456ljh.68.1531491075985; Fri, 13 Jul 2018 07:11:15 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id h7-v6sm451750ljk.27.2018.07.13.07.11.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Jul 2018 07:11:15 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Fri, 13 Jul 2018 16:09:38 +0200 Message-Id: <1531490984-32491-1-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 Subject: [platforms: PATCH 0/6] Armada7k8k ComPhy rework X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 Jul 2018 14:11:19 -0000 Hi, This patchset makes use of the feature present in newest, publicly available ARM-TF of the Armada7k8k SoCs (https://github.com/MarvellEmbeddedProcessors/atf-marvell/commits/atf-v1.4-armada-18.06) which is a common configuration of the serdes lanes. It is triggered by the users (UEFI/U-Boot/OS) using the dedicated smc calls. Thanks to that the library could have been cleaned-up and reduced to the per-board configuration parsing part and calling the according sequences to be done in EL3. The patches are available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/comphy-upstream-r20180713 I'm looking forward to review and any comments/remarks. Best regards, Marcin Grzegorz Jaszczyk (6): Marvell/Library: ComPhyLib: Configure SATA, SGMII and SFI in ARM-TF Marvell/Library: ComPhyLib: Configure PCIE in ARM-TF Marvell/Library: ComPhyLib: Configure RXAUI in ARM-TF Marvell/Library: ComPhyLib: Configure USB in ARM-TF Marvell/Library: ComPhyLib: Clean up the library after rework Marvell/Library: ComPhyLib: Remove both PHY and PIPE selector config Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 18 +- Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf | 2 +- Silicon/Marvell/Armada7k8k/Library/Armada7k8kSampleAtResetLib/Armada7k8kSampleAtResetLib.h | 22 - Silicon/Marvell/Include/Library/SampleAtResetLib.h | 7 - Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h | 545 +----- Silicon/Marvell/Armada7k8k/Library/Armada7k8kSampleAtResetLib/Armada7k8kSampleAtResetLib.c | 19 - Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c | 1777 +------------------- Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 41 +- Silicon/Marvell/Library/ComPhyLib/ComPhyMux.c | 132 -- 9 files changed, 116 insertions(+), 2447 deletions(-) delete mode 100644 Silicon/Marvell/Library/ComPhyLib/ComPhyMux.c -- 2.7.4