From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4864:20::143; helo=mail-lf1-x143.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf1-x143.google.com (mail-lf1-x143.google.com [IPv6:2a00:1450:4864:20::143]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 24BCB210DA149 for ; Sun, 5 Aug 2018 16:28:52 -0700 (PDT) Received: by mail-lf1-x143.google.com with SMTP id f18-v6so7742450lfc.2 for ; Sun, 05 Aug 2018 16:28:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fRuwGCcKthuIvPa6Ig7Ixg95TpZUl4ceaxT5AKBx0yA=; b=V7nwiHkkYOJ5L4yXdE7WmFDqYZaPTLUXIFMZurKqkCBYPIJDNe2vYKS4UfVmOKX3Xs Kv7eH7lHKLZZGg03SCvwa6IpTDK4TWhM7nAZ4Tp6KAxJ0XiTC5w8B6bRGt0t1E+lQHO0 57ayhZrHbUI2RaKnshRKydvRDM/aksnWKOjDXq4ppbPrZ2ruuq+fe9iC6UtVONZhgK9B E0BFeR0/NKVSP3ePXOE4rIIUJF6v7p22P2Ck7XtVAkNCr7UCVVbu2EI3sKmZcxdoaca2 lokKv0yDKnb5CyZSO6ZGH6T9JZ8kkvVjzN0oiX7i2pBBt9MGTHZyYHLqMGrS1xTndQs1 HNJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fRuwGCcKthuIvPa6Ig7Ixg95TpZUl4ceaxT5AKBx0yA=; b=I6Sa3QXt+tFCTqqFMAtFhePCGpQvL9/9X1a/+Cq5wCGhFuJetL/8BqXF3PMjbQttfU WxLtLH9tLiKNKLvExDOqjPRqwBXsJyyxQSiaGcGJHFU60BlN/idu6yIG1ccIVfwGOuZ+ iFVRG5INjkpSeDW3FD5oFadmfXnW6/Aqggg59ViW5o8N9yVXVXGLwKpxmtlJV0loI1Gk 4Xd+GYDQBwY+8qiRM/VG9kf+t5u3bbaGGT7u1DQi/piYooxawAQo+HG0zkpPjeIwvJsm HivOQOjnT+SkmtKm2aweKix38lFyo1//sytANtGxKn0Iwf5Gq7vo21QWg60FtLpi7vL9 suYQ== X-Gm-Message-State: AOUpUlEZsaZrXLLkU2Qn76VulaF9s6d8Q4+HkZexWHyQ+PNAPFFaNVRe p+pzCBB6qHy8O92CHQTMlBkiwfw0Db/q2Q== X-Google-Smtp-Source: AAOMgpfD9RDzO3cXFbGPEigJFk7n9lVVVFFuW0d2Pl25GP0tZDMu14R4NaooUi3fdCnJWKzbiLnFRw== X-Received: by 2002:a19:4c57:: with SMTP id z84-v6mr9271078lfa.67.1533511729469; Sun, 05 Aug 2018 16:28:49 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id v136-v6sm1861994lfa.10.2018.08.05.16.28.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 05 Aug 2018 16:28:48 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Mon, 6 Aug 2018 01:28:21 +0200 Message-Id: <1533511706-9344-5-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533511706-9344-1-git-send-email-mw@semihalf.com> References: <1533511706-9344-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH 4/9] Marvell/Armada80x0Db: Enable device tree support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Aug 2018 23:28:52 -0000 This patch enables compilation of the Armada 8040 DB device tree. Also disable OS access to the SPI flash. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 3 +++ Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0Db.inf | 28 ++++++++++++++++++++ Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc | 3 +++ Silicon/Marvell/Armada7k8k/DeviceTree/armada-8040-db.dts | 2 +- 4 files changed, 35 insertions(+), 1 deletion(-) create mode 100644 Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0Db.inf diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc index 2d4523f2..3fc33d4 100644 --- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc +++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc @@ -48,6 +48,9 @@ !include Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc +[Components.common] + Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0Db.inf + ################################################################################ # # Pcd Section - list of all EDK II PCD Entries defined by this Platform diff --git a/Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0Db.inf b/Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0Db.inf new file mode 100644 index 0000000..e4dd41c --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0Db.inf @@ -0,0 +1,28 @@ +## @file +# +# Device tree description of the Marvell Armada 8040 DB platform +# +# Copyright (c) 2018, Marvell International Ltd. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = Armada80x0DbDeviceTree + FILE_GUID = 25462CDA-221F-47DF-AC1D-259CFAA4E326 # gDtPlatformDefaultDtbFileGuid + MODULE_TYPE = USER_DEFINED + VERSION_STRING = 1.0 + +[Sources] + armada-8040-db.dts + +[Packages] + MdePkg/MdePkg.dec diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc b/Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc index 984cf7e..99e1a11 100644 --- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc +++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc @@ -11,3 +11,6 @@ # # Per-board additional content of the DXE phase firmware volume + + # DTB + INF RuleOverride = DTB Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0Db.inf diff --git a/Silicon/Marvell/Armada7k8k/DeviceTree/armada-8040-db.dts b/Silicon/Marvell/Armada7k8k/DeviceTree/armada-8040-db.dts index 7518029..e813922 100644 --- a/Silicon/Marvell/Armada7k8k/DeviceTree/armada-8040-db.dts +++ b/Silicon/Marvell/Armada7k8k/DeviceTree/armada-8040-db.dts @@ -213,7 +213,7 @@ }; &cp1_spi1 { - status = "okay"; + status = "disabled"; spi-flash@0 { #address-cells = <0x1>; -- 2.7.4