From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::444; helo=mail-pf1-x444.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 77FA521962301 for ; Wed, 15 Aug 2018 18:49:35 -0700 (PDT) Received: by mail-pf1-x444.google.com with SMTP id y10-v6so1260536pfn.8 for ; Wed, 15 Aug 2018 18:49:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uPHPCgp67DQlhtcAI70IgA5R0w58/Kde4mcGknxhhMU=; b=bHZ7ayBEXbDS23y53Utp30odue/Z6MubZwtH9+lflWxaGBnf8oZMM+a3QmnS88Wgtz r9HJNZg5bcdJ01Bh85JDYe+/TvKSwJvbiGSC1roBpGujn0lDixUzwJf00eKzuGlsfin/ ayxKSjX1+bSVQVAr80dcYR2JNft1/AxhP9jyI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uPHPCgp67DQlhtcAI70IgA5R0w58/Kde4mcGknxhhMU=; b=soVX/hWdvur0FmiNZ0jgH/BWVwyBWuqN9btLwXFYpnz3SYrMNGI+0DksnUJUObKVp9 Y8nYVMolj5ntExZVv4wY9nBh5DF28C6u4lsz1BceTzDyXc2kWec3mnMLaHuJIfx21wLb 9mYL2jARTLdHznzb+L/6G+VAcbQfUgszHH/U+Isc9gPpZ0g4ry6+KbhsvHbFTiD1NW2E 2aoi2DYUpkYv6QRd9IpVVXspQzsvZ6KHh//j+pn+wZsuPxwlGIxkuf0CdTidcel4CPiX 6Re2NvvSp7Ve09Fpb/nX8c72Y0xxTvl6uPaG3DbL7EjZCXnToZ68wjkA9B9dt2e3cyK0 BWXg== X-Gm-Message-State: AOUpUlFkPL4QetzLliRZy5JCNHeJayDlvTO8przBbxn+1EwmbwUGk6we dYNi5eIqQ9dcN7GY5DV44rjlbbTW/RZdGg== X-Google-Smtp-Source: AA+uWPzRWn7OsqFre6Gn19GkXVe8hZBUN56v2qo0/QbvPJUlYj/T7C+3gzomDB7g5U290ApPTBVsWA== X-Received: by 2002:a62:e0d5:: with SMTP id d82-v6mr30057984pfm.59.1534384174905; Wed, 15 Aug 2018 18:49:34 -0700 (PDT) Received: from localhost.localdomain ([64.64.108.56]) by smtp.gmail.com with ESMTPSA id c1-v6sm45536108pfg.25.2018.08.15.18.49.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 15 Aug 2018 18:49:33 -0700 (PDT) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Thu, 16 Aug 2018 09:49:24 +0800 Message-Id: <1534384166-15673-2-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534384166-15673-1-git-send-email-haojian.zhuang@linaro.org> References: <1534384166-15673-1-git-send-email-haojian.zhuang@linaro.org> Subject: [PATCH v2 edk-platforms 1/3] Silicon/Hi3660: fix LDO9_VSET register definition X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Aug 2018 01:49:35 -0000 Fix the LDO9_VSET register definition in PMIC. LDO9 is used by Designware SD controller. Without this fix, SD controller fails to operate SD card since lack of right voltage setting. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Silicon/Hisilicon/Hi3660/Include/Hi3660.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h index 5fbf32267657..6e0587f7783a 100644 --- a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h +++ b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h @@ -58,7 +58,7 @@ #define USB3OTG_PHY_CR_CAP_ADDR (1 << 0) #define PMU_REG_BASE 0xFFF34000 -#define PMIC_LDO9_VSET_REG (PMU_REG_BASE + (0x068 << 2)) +#define PMIC_LDO9_VSET_REG (PMU_REG_BASE + (0x06b << 2)) #define LDO9_VSET_MASK (7 << 0) #define PMIC_LDO16_ONOFF_ECO_REG (PMU_REG_BASE + (0x078 << 2)) -- 2.7.4