From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4864:20::244; helo=mail-lj1-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lj1-x244.google.com (mail-lj1-x244.google.com [IPv6:2a00:1450:4864:20::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 692BF2110E898 for ; Sun, 2 Sep 2018 21:54:35 -0700 (PDT) Received: by mail-lj1-x244.google.com with SMTP id p10-v6so14295492ljg.2 for ; Sun, 02 Sep 2018 21:54:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=y0/NljIhtn12G/gigfEEhzYohAypxzIjPZdj8slJp8M=; b=TO+fy1BAFq9xLMrHTU25Iq/B3uUyQE1H+SQ1xewh9V8OHK/j36BNbqg/qIcsJDPzqm ra5plvL60mUtG4cmZLkiuzE3dRpwRkW0yjbtLt5uE519Fi3J7daMu0e1toupoCMx2TIo 15h+Dr4dS5H57C9fJtdO7BwuLKM1Dw3APJprbsslgRC7RqWxsT8JvjH/cq7JvGarhLC5 7KFNrg9DapCL7CAk14qL7f4qw2bNPc+HedEVBRz3OG/lBhuvkVj5zhDfcdJEO0aTI7aR tzIgMHrKXl/q5ZuJh4m6+N6f+yxcLf84pAwBAxrmUyhpX8QWE4tJqgZkBg5+p+mZraAG yzNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=y0/NljIhtn12G/gigfEEhzYohAypxzIjPZdj8slJp8M=; b=FzDrRomp+IjxkLJu06bheqjldBa/jbUT4JV3g7KUsLOR4crhMPk4QuKIdWNJ827KjN w3SI57bmY+FG1gx+zFG7R64qJDqKyPU+1lWR1p8m/sTlivy+FNAbWDqwlQvKR4km9IOb eG6X9sR4meO075K5PUbY71rFBzvZVt68i/H7QjPRp0nxZ9vO/tnmEX6eG0yD5eUo1Pve uYo47RopwO/4R+CYKoOC0Pd7PYBGeUYHkYz2oET5FHCLqIqqRHjdY9Tywotu3FC7I+OS Ds0sAFERTpj2iDCXXPMc5mvvIq5XsDOuWrR1w143EVLlCVgfKKQYPzwWl67F1DiWB6Yd VXGA== X-Gm-Message-State: APzg51ASZPoAS8Qa2GJmlW0wbDa6aBLSf7bLFANcJc2pBb4j7WnQT2U2 hnAWmuT+JTTC6DXcmO5D7bmSftNh71Q= X-Google-Smtp-Source: ANB0VdYUljPDdAR9f7/KkzUxhYDSrKA5fLPjnHxyrHKehxu0NFAUeqwwBFgekQ6SAGeWtJDPyHDSWw== X-Received: by 2002:a2e:534e:: with SMTP id t14-v6mr17090320ljd.26.1535950473301; Sun, 02 Sep 2018 21:54:33 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id h16-v6sm3196658ljh.26.2018.09.02.21.54.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 02 Sep 2018 21:54:32 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: feng.tian@intel.com, michael.d.kinney@intel.com, liming.gao@intel.com, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Mon, 3 Sep 2018 06:54:11 +0200 Message-Id: <1535950453-27147-6-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535950453-27147-1-git-send-email-mw@semihalf.com> References: <1535950453-27147-1-git-send-email-mw@semihalf.com> Subject: [PATCH 5/7] MdeModulePkg/SdMmcPciHcDxe: Adjust eMMC clock and bus width sequence X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Sep 2018 04:54:35 -0000 According to JESD84-B50-1 chapter A.6 (documentation about eMMC4.5 standard) step "Changing the data bus width" (A.6.3) should be execute after step "Switching to high-speed mode" (A.6.2). This patch fixes the bus-width/clock-setting sequence in EmmcSwitchToHighSpeed (). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c index e5e0c89..8615caa 100755 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c @@ -748,10 +748,6 @@ EmmcSwitchToHighSpeed ( Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru); - Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusWidth); - if (EFI_ERROR (Status)) { - return Status; - } // // Set to Hight Speed timing // @@ -799,6 +795,11 @@ EmmcSwitchToHighSpeed ( return Status; } + Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusWidth); + if (EFI_ERROR (Status)) { + return Status; + } + if (mOverride != NULL && mOverride->SwitchClockFreqPost != NULL) { Status = mOverride->SwitchClockFreqPost ( Private->ControllerHandle, -- 2.7.4