From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4864:20::241; helo=mail-lj1-x241.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lj1-x241.google.com (mail-lj1-x241.google.com [IPv6:2a00:1450:4864:20::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1BDF521122939 for ; Fri, 7 Sep 2018 02:11:02 -0700 (PDT) Received: by mail-lj1-x241.google.com with SMTP id l15-v6so11689282lji.6 for ; Fri, 07 Sep 2018 02:11:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6PERmNgiffQ2asBRs3FXcKuERbqbdeMuXFYPXSbvtL8=; b=XbkBJAgkm9exrfUJfsoWbkKMOayNzEhF7Mb6VnMl77GyBKM8cqgQNEB1lGsX+LywZV +XbWYvRx0oQDj009sS/fxOYx5v+b8ATt6nIyqnALHLdz3MBIG+AdQYFZiZKcRPTWx6ey RX9tZ8kuxThBLSHO6xLbKw6HVin15y3PQMNabzhW1tVua8OQDtci7uWM4XY/UWdZkpIr qZHnU3n8HsnW/n90hRbG6ZtnYn7rTNOJAVfwwbAwU8RKar6WpbgyHFthbEoAJjV9LKD7 IFebAuVgYoz7Z2NWOHTdM42d8pr9GoJgyZ8wVEYVw3UBB8Sch+D8eXiM8aqv2B8z+ON+ 9+sA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6PERmNgiffQ2asBRs3FXcKuERbqbdeMuXFYPXSbvtL8=; b=ZdqHl7aCjul33lI6bBK4M5SU9sMK9ELbjr8tnDhjAWcu8xM2TrSVi0MqTrU+ZTvJjX uD3NujG7zVrxsn9MCR4w1U9vxP89Rezxxb3TIHH5YxM7qWcU7BatC055IjsiMtQkRO6p Ez1wdacqiHrZekSgCxLHLNmTUbFeElxpwUSkKjUPw000DxD0OIapTQZfeQdl0Pa2NW5V X0NX7WwQC7OoE6dsodrg4YmNxS6HbpJB7zZWX6epVBLweClstoyP3Cii9vvnDPw8UMZs yBhmq2nmJf1XopkRpCeFSFCg+Ym1Z/ttrWKqtv6zV4x2MPpEHP3pW+Wd30TvetZFGCg3 FBMw== X-Gm-Message-State: APzg51Aqqdn6mKVYItIXfG/1yI3TMreIP3LPok+sqhi9kBROjmoTgJju EkeRmP3Zb8u1rGXjQM1tv9VCylJ4x3E= X-Google-Smtp-Source: ANB0VdbXxOfcFxpAFyTbvfm97koTQ7vpcP48uFus0DmLT74osRmFqPZhhTQraobHmLaXKvGoX7tBSg== X-Received: by 2002:a2e:350b:: with SMTP id z11-v6mr4451771ljz.55.1536311460123; Fri, 07 Sep 2018 02:11:00 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id q16-v6sm1197337ljj.68.2018.09.07.02.10.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 07 Sep 2018 02:10:59 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: feng.tian@intel.com, michael.d.kinney@intel.com, liming.gao@intel.com, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com, tm@semihalf.com Date: Fri, 7 Sep 2018 11:10:14 +0200 Message-Id: <1536311416-2751-3-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536311416-2751-1-git-send-email-mw@semihalf.com> References: <1536311416-2751-1-git-send-email-mw@semihalf.com> Subject: [PATCH v2 2/4] MdeModulePkg/SdMmcPciHcDxe: Adjust eMMC clock and bus width sequence X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 07 Sep 2018 09:11:02 -0000 According to JESD84-B50-1 chapter A.6 (documentation about eMMC4.5 standard) step "Changing the data bus width" (A.6.3) should be execute after step "Switching to high-speed mode" (A.6.2). This patch fixes the bus-width/clock-setting sequence in EmmcSwitchToHighSpeed (). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c index b3903b4..87027b8 100755 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c @@ -745,10 +745,6 @@ EmmcSwitchToHighSpeed ( UINT8 HostCtrl1; UINT8 HostCtrl2; - Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusWidth); - if (EFI_ERROR (Status)) { - return Status; - } // // Set to Hight Speed timing // @@ -783,6 +779,11 @@ EmmcSwitchToHighSpeed ( HsTiming = 1; Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, ClockFreq); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusWidth); return Status; } -- 2.7.4