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From: Marcin Wojtas <mw@semihalf.com>
To: edk2-devel@lists.01.org
Cc: feng.tian@intel.com, michael.d.kinney@intel.com,
	liming.gao@intel.com, leif.lindholm@linaro.org,
	hao.a.wu@intel.com, ard.biesheuvel@linaro.org,
	nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com,
	tm@semihalf.com
Subject: [PATCH v3 2/3] MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcHcReset to set only necesery bits
Date: Sun, 16 Sep 2018 00:25:45 +0200	[thread overview]
Message-ID: <1537050346-16445-3-git-send-email-mw@semihalf.com> (raw)
In-Reply-To: <1537050346-16445-1-git-send-email-mw@semihalf.com>

From: Tomasz Michalec <tm@semihalf.com>

SdMmcHcReset used to set all bits of Software Reset Register to 1
including reserved ones.

Now only first bit is set which means "Software Reset for All".

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 5 +++++
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 6 +++---
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
index e389d52..bcc31bd 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
@@ -63,6 +63,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define SD_MMC_HC_CTRL_VER            0xFE
 
 //
+// SD Software Reset Register bits description
+//
+#define SD_MMC_HC_SW_RST_ALL          BIT0
+
+//
 // The transfer modes supported by SD Host Controller
 // Simplified Spec 3.0 Table 1-2
 //
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
index 9672b5b..9d9bca8 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
@@ -454,8 +454,8 @@ SdMmcHcReset (
   }
 
   PciIo   = Private->PciIo;
-  SwReset = 0xFF;
-  Status  = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_SW_RST, FALSE, sizeof (SwReset), &SwReset);
+  SwReset = SD_MMC_HC_SW_RST_ALL;
+  Status  = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_SW_RST, sizeof (SwReset), &SwReset);
 
   if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "SdMmcHcReset: write full 1 fails: %r\n", Status));
@@ -467,7 +467,7 @@ SdMmcHcReset (
              Slot,
              SD_MMC_HC_SW_RST,
              sizeof (SwReset),
-             0xFF,
+             SD_MMC_HC_SW_RST_ALL,
              0x00,
              SD_MMC_HC_GENERIC_TIMEOUT
              );
-- 
2.7.4



  parent reply	other threads:[~2018-09-15 22:26 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-15 22:25 [PATCH v3 0/3] SdMmc fixes Marcin Wojtas
2018-09-15 22:25 ` [PATCH v3 1/3] MdeModulePkg/SdMmcPciHcDxe: Adjust eMMC clock and bus width sequence Marcin Wojtas
2018-09-17  7:17   ` Wu, Hao A
2018-09-17 22:43     ` Marcin Wojtas
2018-09-15 22:25 ` Marcin Wojtas [this message]
2018-09-17  7:17   ` [PATCH v3 2/3] MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcHcReset to set only necesery bits Wu, Hao A
2018-09-17 15:00     ` Marcin Wojtas
2018-09-18  1:34       ` Wu, Hao A
2018-09-15 22:25 ` [PATCH v3 3/3] MdeModulePkg/SdMmcPciHcDxe: Execute card detect only for RemovableSlot Marcin Wojtas
2018-09-17  7:17   ` Wu, Hao A
2018-09-17 15:13     ` Marcin Wojtas

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