From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4864:20::12e; helo=mail-lf1-x12e.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3933721140801 for ; Tue, 18 Sep 2018 01:59:42 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id m26-v6so1093826lfb.0 for ; Tue, 18 Sep 2018 01:59:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=eKWqbtE7r7sVNh3eaI384Js5SkY+UI2aBvZ4nanueWY=; b=QWJHbCnLoUnSFqX+tuvg0F7oBIvQKQU9/HlqGW7ej9o4PiThjsShdcMUerMfL63UFm WO36B3vf0VYhvcxVMCra1B6pnrwTXbmsVhNWL9rz0SMAy9KwI1JFGozTaZdMV+aVX32B ZgVaqqM4Pu6TbEtrA56X1wBj/2PlPdAnAILNFaGx6ilXZTnk1SvsAszTRN/YQ5bKxNRm mKHYT7lb3HgUpiDveYaWJB6aE0lQ0rdmt99VEie0qGoEXPFQLnPmi5lmQJtpBB3UGW1V pRFK5ChRwjswzgktY3mMaf/oOGx6P+pEeEKwpgCLEPZZ/1VGcAl7TqLXL/YngBq4BTkI Whhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eKWqbtE7r7sVNh3eaI384Js5SkY+UI2aBvZ4nanueWY=; b=tIGjUO3xQ/9o3Phc1PAHzicEYpCYP0Mok+wsj1mx7yaX7ojDrDh9Cde+5jTcyU4XWF ONX0E2e8+7knUphGMwYrb1z0kzomDDip3g0BsYBENKV5+RFmhH5+A2GtJFIJ0o6H2kCy OUl79UHlhW/ydjgXM/FCco0pVfMh/Y3ul3vCP6GUYzo3WwxqFvzX2pyC+I3usC5l1nFI YQnBrAiQvQ8Xlzo69p19ptEbm1sCvKVaHbvHJk7WF7LbVym1pjXZWO37Y7z9ZC8SUIbJ BKW4vE2maa00GqEKlhQrfune7Flv0Z1v/o38hmIifrB5oBHNgR+e8uEpEuEzJTwwXtqK dt1w== X-Gm-Message-State: APzg51A+6jAhiSvQVzzm91zUmxvdkeFVNQPnjAJWfX32n/HbWX4HaMJG lsXkbaD7/BGgDkv9Ri2+Y1gw2DOFp5M= X-Google-Smtp-Source: ANB0VdYR4gNM8W41O08ETPBFTK8IGj0CVKWFMkdTXU+gTBT7655XZAcXavf7+3dVGuQLzF4t5i4wHg== X-Received: by 2002:a19:d206:: with SMTP id j6-v6mr19459170lfg.31.1537261179665; Tue, 18 Sep 2018 01:59:39 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id l141-v6sm340518lfg.55.2018.09.18.01.59.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 18 Sep 2018 01:59:38 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: feng.tian@intel.com, michael.d.kinney@intel.com, liming.gao@intel.com, leif.lindholm@linaro.org, hao.a.wu@intel.com, ard.biesheuvel@linaro.org, nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com, tm@semihalf.com Date: Tue, 18 Sep 2018 10:59:06 +0200 Message-Id: <1537261147-7214-2-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537261147-7214-1-git-send-email-mw@semihalf.com> References: <1537261147-7214-1-git-send-email-mw@semihalf.com> Subject: [PATCH v4 1/2] MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcHcReset to set only necesery bits X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Sep 2018 08:59:42 -0000 From: Tomasz Michalec REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1185 SdMmcHcReset used to set all bits of Software Reset Register to 1 including reserved ones, which on some controllers may result in timeout. Now only first bit is set, which means "Software Reset for All". Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index 9672b5b..25771dc 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -454,11 +454,11 @@ SdMmcHcReset ( } PciIo = Private->PciIo; - SwReset = 0xFF; - Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_SW_RST, FALSE, sizeof (SwReset), &SwReset); + SwReset = BIT0; + Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_SW_RST, sizeof (SwReset), &SwReset); if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "SdMmcHcReset: write full 1 fails: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "SdMmcHcReset: write SW Reset for All fails: %r\n", Status)); return Status; } @@ -467,7 +467,7 @@ SdMmcHcReset ( Slot, SD_MMC_HC_SW_RST, sizeof (SwReset), - 0xFF, + BIT0, 0x00, SD_MMC_HC_GENERIC_TIMEOUT ); -- 2.7.4