From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4864:20::22a; helo=mail-lj1-x22a.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B7F272194D3AE for ; Fri, 5 Oct 2018 06:25:29 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id r83-v6so11607573ljr.7 for ; Fri, 05 Oct 2018 06:25:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=jsALTD6tH9/3vkBhrgViZrh7PAZ/pZiOIg2oObTgibc=; b=jmLAKF8cNQatCla0ZvpWWuYuK5iSjg9xlQoZ1yRe/orjUu0DKKNxCP48OH/seB5zKR vFCK/XBwFPuN3BBNT9XseKt8OjbkndIQ1h09zidkyzhf6bThVnAqegQNROOA7AWv6jde h1jXitpTMKSSNjq8LfiAv82X8JuvnBnSaXBFa3NiiAaOP4IrTZ4qomNlOLaL3k/SidQn GwplSvOk6NQ8+zLhyf/BXzOIA5jpOnf/h4psRqTL1s8QfZJ413gsnzK1jW+XR/cHbQP6 sVfPqyl2o6FBn7MWo5EzPyzw5H5QR9A8YI47pUFQTzRwb24vlgBZHJnVMUhKUR1BsUOF JPww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=jsALTD6tH9/3vkBhrgViZrh7PAZ/pZiOIg2oObTgibc=; b=lK58A92M/7s9o2yzysaKGRkV9OjhtMWn7n8IDzQO0vn4qKeJAaXPh2uUwAQnF6Hou/ DSl973OC+88m0MBwsnfWI47DDRf7bCk2JG+wQqNDrFZNdXo2ZBFmnTdeid9VBVQginqw /491dNYuQ2YNLQVuGKiC3FQR0Ght9WzAab0yA5P7d90B8XPhW1vTTXU2N4AWtmzkJAmr oWkm5U/nkUiEKtqXMO04WwWh9KdnMKAcpFqt3rHk7gW0R2hVC+//Kvdg+F9eo5z2I4Kq jEm/xP+mYHvV+VwCMGmvLudXEDSJ+C3OmAI0Ze52gohtsKOOXXe5/1PLbFH2oK3a9nuU aWVA== X-Gm-Message-State: ABuFfogxL9tfwsBeKdpJfvLFCHmgMGTTjBs6GvZ7DFnZArc77FLrPKMN pQCH6SoTp4VfO+qDqx18NKArziVoCkU= X-Google-Smtp-Source: ACcGV61ERYY5nCpY/mENlKhs7x0Z9Rrbuo/ePdDZNFePBxoZr3LGyqAaY/yQcHkHZJKDNmOqgi7rLA== X-Received: by 2002:a2e:8606:: with SMTP id a6-v6mr411018lji.43.1538745926774; Fri, 05 Oct 2018 06:25:26 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id l14-v6sm1836581ljc.68.2018.10.05.06.25.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Oct 2018 06:25:26 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: feng.tian@intel.com, michael.d.kinney@intel.com, liming.gao@intel.com, leif.lindholm@linaro.org, hao.a.wu@intel.com, ard.biesheuvel@linaro.org, nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com, tm@semihalf.com Date: Fri, 5 Oct 2018 15:25:07 +0200 Message-Id: <1538745911-22484-1-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 Subject: [PATCH v2 0/4] SdMmcOverride extension X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Oct 2018 13:25:30 -0000 Hi, This is the second version of the patchset. Initial one was interleaved with the fixes, which after split got already merged. The biggest change is - resigning from the new callbacks and extending parameter lists of both NotifyPhase and Capability routines. Patches are available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/sdmmc-override-upstream-r20181005 Please note that extending SdMmcOverride protocol was impacting so far the only user of it (Synquacer controller). In paralel edk2-platforms patchset, a patch can be found: ("Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride") which immunizes for above and future extensions of the protocol: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/xenon-upstream-r20181005 I'm looking forward to the comments and remarks. Best regards, Marcin Changelog: v1 -> v2 * Rebase onto newest master * 1/4 [new patch] - preparation for extending NotifyPhase * 2/4 - UhsSignaling as a part of NotifyPhase * 3/4 - SwitchClockFreqPost as a part of NotifyPhase * 4/4 - Allow updating BaseClkFreq via Capability instead of the independent callback. Marcin Wojtas (2): MdeModulePkg/SdMmcPciHcDxe: Add an optional parameter in NotifyPhase MdeModulePkg/SdMmcPciHcDxe: Allow overriding base clock frequency Tomasz Michalec (2): MdeModulePkg/SdMmcPciHcDxe: Add UhsSignaling to SdMmcOverride protocol MdeModulePkg/SdMmcPciHcDxe: Add SwitchClockFreqPost to SdMmcOverride MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 6 + MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 62 +++++- MdeModulePkg/Include/Protocol/SdMmcOverride.h | 12 +- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 215 ++++++++++++++------ MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c | 57 +++++- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c | 18 +- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 108 ++++++++-- 7 files changed, 383 insertions(+), 95 deletions(-) -- 2.7.4