From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4864:20::244; helo=mail-lj1-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lj1-x244.google.com (mail-lj1-x244.google.com [IPv6:2a00:1450:4864:20::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7A14B21164F17 for ; Fri, 19 Oct 2018 18:58:06 -0700 (PDT) Received: by mail-lj1-x244.google.com with SMTP id u21-v6so32340287lja.8 for ; Fri, 19 Oct 2018 18:58:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=cAhRptJ5U+SxLBTwz1j7RndzeN29xhoWB6dQsTSxopE=; b=bRIHCqsWjVZbhqu+a6frf88vBuXf1gHefOxDLhlQejqKz/xu+NgX+fTohQLvrFl/WY jwY28+kZEjYLUh2VXUUiM2lb/GjvLHusxskRUMBONDGuXP+zbZUlYK70ho+guKsVC34J qDGv+tUyMsLdc0g0atYgJzCJzDln958+htWiBYkfhrPcNs0qXd1WUbOaktrru0Ndj949 0fmxR2ssfJW+YsNSxrqUAGwjRlcUaELEWA5czK9GiHFm3lnj9DINTdl8zvVZ5Co1KnDv inJ0iaUjFeDNL5oYXsKr+kC8MYSq+pwd1U1lWIs/qSc2eld618aVuYtRa82RADIYQBxW fRhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=cAhRptJ5U+SxLBTwz1j7RndzeN29xhoWB6dQsTSxopE=; b=Eo3VUCfgUFS5mm39kAGsKVdYsqhheKTyQrvb+2MQwnxkzx4XPJ/AOGX4uEHyaJa9Sc bY3+9g3PfO58DD3PksQixmipt8gmLoWN/7Rerb76j2zqT7Ct+kd32wdH/LgVqZKpSJeP D3+EHyQpETLb4SHGskKAsgaTLb9Vb+jHGjV6i0AE0q26EH8d8GUEfV6PiQoLnF3M75UP UDxMDli/qEQ+aCKsy1qi3RlbrXR8T6uxWkKV1nKq4aa6dcxmFG1QIR+k8YMgmZ11ewKn qZjcB5Pwe5UqOSvkC2Yo1rg5dar3Unuv5aNJ8GlKN9HFRFEFEgGByeaeLE0U0XL9jyi3 B3GQ== X-Gm-Message-State: ABuFfoioxNOadDS2pEB/I4d0LU69dPCNB6VJP2yzRRBs6/EgNzv7hgMf a+ROznoCAySqJLjiV9XfWMeKSH7rLgg= X-Google-Smtp-Source: ACcGV61buIDgMSKOA+btbme3SxVnkfaLCCYvBVS0FOYxQbyMx4OA7fWD8Gu3nJ7ijTlTHSbLa5iqRQ== X-Received: by 2002:a2e:1241:: with SMTP id t62-v6mr23451161lje.81.1540000683798; Fri, 19 Oct 2018 18:58:03 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id p63-v6sm5562777lfg.46.2018.10.19.18.58.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 19 Oct 2018 18:58:02 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com Date: Sat, 20 Oct 2018 03:57:29 +0200 Message-Id: <1540000661-1956-1-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 Subject: [platforms: PATCH 00/12] Armada7k8k GPIO support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 20 Oct 2018 01:58:07 -0000 Hi, This patchset introduces entire infrastructure for using GPIO on Marvell devices. Finally the USB ports are properly power-supplied on all currently supported boards. Main changes are as follows: - New GPIO protocol for handling basic pins operations. It allows very easy usage from consumer perspective. - An example of it is enabling USB ports' VBUS via newly introduced NonDiscoverableInitLib, that abstracts the initialization required for non-discoverable devices (see last commit). - Also Board/SoC description is added for both embedded SoC controllers, as well as I2C IO expanders. - This description is utilized by two new drivers - Armada7k8k GPIO controllers and PCA95xx I2C IO expander family. More detailed explanation can be found in the commit logs. Patches are available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/gpio-upstream-r20181020 The diffstat may be overwhelming at the first sight, but I made a really big effort to minimize a risk it turns out to be painful for reviewers :) I'm looking forward to the comments and remarks. Best regards, Marcin Marcin Wojtas (10): Marvell/Library: ArmadaSoCDescLib: Add GPIO information Marvell/Library: ArmadaBoardDescLib: Add GPIO information SolidRun/Armada80x0McBin: Introduce board description library Marvell/Armada70x0Db: Introduce board description library Marvell/Armada80x0Db: Introduce board description library Marvell/Drivers: MvBoardDesc: Extend protocol with GPIO support Marvell/Drivers: I2c: Use common header for macros Marvell/Drivers: MvPca95xxDxe: Introduce I2C GPIO driver Marvell/Armada7k8k: Enable GPIO drivers compilation Marvell/Armada7k8k: Introduce NonDiscoverable device init routines jinghua (2): Marvell/Protocol: Introduce MARVELL_GPIO_PROTOCOL Marvell/Drivers: MvGpioDxe: Introduce platform GPIO driver Silicon/Marvell/Marvell.dec | 2 + Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 + Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 10 +- Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 6 + Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc | 6 + Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.inf | 34 ++ Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.inf | 47 ++ Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf | 34 ++ Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.inf | 48 ++ Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf | 34 ++ Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.inf | 48 ++ Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 + Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf | 43 ++ Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.inf | 44 ++ Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf | 1 + Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 10 + Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h | 52 ++ Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.h | 74 +++ Silicon/Marvell/Drivers/I2c/MvEepromDxe/MvEepromDxe.h | 10 - Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.h | 17 +- Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 23 + Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 + Silicon/Marvell/Include/Library/NonDiscoverableInitLib.h | 28 + Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 + Silicon/Marvell/Include/Protocol/MvGpio.h | 199 +++++++ Silicon/Marvell/Include/Protocol/MvI2c.h | 31 + Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c | 43 ++ Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 99 ++++ Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c | 50 ++ Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 113 ++++ Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c | 36 ++ Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 73 +++ Silicon/Marvell/Applications/EepromCmd/EepromCmd.c | 5 +- Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 39 ++ Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 48 ++ Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c | 298 ++++++++++ Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.c | 592 ++++++++++++++++++++ Silicon/Marvell/Drivers/I2c/MvEepromDxe/MvEepromDxe.c | 3 +- Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 4 +- Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c | 7 +- Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc | 2 + Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc | 2 + Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc | 2 + 43 files changed, 2205 insertions(+), 38 deletions(-) create mode 100644 Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.inf create mode 100644 Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.inf create mode 100644 Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf create mode 100644 Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.inf create mode 100644 Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf create mode 100644 Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.inf create mode 100644 Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf create mode 100644 Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.inf create mode 100644 Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h create mode 100644 Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.h create mode 100644 Silicon/Marvell/Include/Library/NonDiscoverableInitLib.h create mode 100644 Silicon/Marvell/Include/Protocol/MvGpio.h create mode 100644 Silicon/Marvell/Include/Protocol/MvI2c.h create mode 100644 Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c create mode 100644 Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c create mode 100644 Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c create mode 100644 Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c create mode 100644 Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c create mode 100644 Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.c create mode 100644 Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c create mode 100644 Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.c -- 2.7.4