From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.65; helo=mga03.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4586E2194D3AE for ; Sat, 20 Oct 2018 21:24:22 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Oct 2018 21:24:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,406,1534834800"; d="scan'208";a="82875196" Received: from shwdeopenpsi068.ccr.corp.intel.com ([10.239.158.46]) by orsmga007.jf.intel.com with ESMTP; 20 Oct 2018 21:24:20 -0700 From: Star Zeng To: edk2-devel@lists.01.org Cc: Star Zeng , Ruiyu Ni , Hao Wu , Jian J Wang Date: Sun, 21 Oct 2018 12:24:13 +0800 Message-Id: <1540095854-36596-2-git-send-email-star.zeng@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 In-Reply-To: <1540095854-36596-1-git-send-email-star.zeng@intel.com> References: <1540095854-36596-1-git-send-email-star.zeng@intel.com> Subject: [PATCH 1/2] MdeModulePkg XhciDxe: Assign Usb2Hc.XXXRevision based on SBRN X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 21 Oct 2018 04:24:22 -0000 Current hard code Usb2Hc.XXXRevision may be not accurate. This patch updates code to assign Usb2Hc.XXXRevision based on SBRN (Serial Bus Release Number, PCI configuration space offset 0x60) although there is no code consuming them. Cc: Ruiyu Ni Cc: Hao Wu Cc: Jian J Wang Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng --- MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 14 ++++++++++++++ MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h | 2 ++ 2 files changed, 16 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c index 48eccf770a35..4796d4611b19 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c @@ -1770,6 +1770,7 @@ XhcCreateUsbHc ( EFI_STATUS Status; UINT32 PageSize; UINT16 ExtCapReg; + UINT8 ReleaseNumber; Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE)); @@ -1786,6 +1787,19 @@ XhcCreateUsbHc ( Xhc->OriginalPciAttributes = OriginalPciAttributes; CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL)); + Status = PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint8, + XHC_PCI_SBRN_OFFSET, + 1, + &ReleaseNumber + ); + + if (!EFI_ERROR (Status)) { + Xhc->Usb2Hc.MajorRevision = (ReleaseNumber & 0xF0) >> 4; + Xhc->Usb2Hc.MinorRevision = (ReleaseNumber & 0x0F); + } + InitializeListHead (&Xhc->AsyncIntTransfers); // diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h index 20e7ac0e8f02..feef3a4bd5ef 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h @@ -26,6 +26,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #define XHC_PCI_BAR_OFFSET 0x10 // Memory Bar Register Offset #define XHC_PCI_BAR_MASK 0xFFFF // Memory Base Address Mask +#define XHC_PCI_SBRN_OFFSET 0x60 // Serial Bus Release Number Register Offset + #define USB_HUB_CLASS_CODE 0x09 #define USB_HUB_SUBCLASS_CODE 0x00 -- 2.7.0.windows.1