From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 28ECE2117B57A for ; Thu, 25 Oct 2018 22:42:29 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Oct 2018 22:42:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,426,1534834800"; d="scan'208";a="102809362" Received: from shwdeopenpsi068.ccr.corp.intel.com ([10.239.158.46]) by orsmga001.jf.intel.com with ESMTP; 25 Oct 2018 22:42:27 -0700 From: Star Zeng To: edk2-devel@lists.01.org Cc: Star Zeng , Ruiyu Ni , Hao Wu , Jian J Wang , Jiewen Yao Date: Fri, 26 Oct 2018 13:42:19 +0800 Message-Id: <1540532541-115032-3-git-send-email-star.zeng@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 In-Reply-To: <1540532541-115032-1-git-send-email-star.zeng@intel.com> References: <1540532541-115032-1-git-send-email-star.zeng@intel.com> Subject: [PATCH V2 2/4] MdeModulePkg EhciDxe: Extract new EhciInsertAsyncIntTransfer function X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Oct 2018 05:42:29 -0000 V2: Add the missing "gBS->FreePool (Data);". REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1274 Extract new EhciInsertAsyncIntTransfer function from EhcAsyncInterruptTransfer. It is code preparation for following patch, no essential functional change. Cc: Ruiyu Ni Cc: Hao Wu Cc: Jian J Wang Cc: Jiewen Yao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng --- MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c | 25 +---------- MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c | 77 ++++++++++++++++++++++++++++++++ MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.h | 36 ++++++++++++++- 3 files changed, 113 insertions(+), 25 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c b/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c index 50b5598df4fb..5569f4f9618b 100644 --- a/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c +++ b/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c @@ -997,7 +997,6 @@ EhcAsyncInterruptTransfer ( URB *Urb; EFI_TPL OldTpl; EFI_STATUS Status; - UINT8 *Data; // // Validate parameters @@ -1046,16 +1045,7 @@ EhcAsyncInterruptTransfer ( EhcAckAllInterrupt (Ehc); - Data = AllocatePool (DataLength); - - if (Data == NULL) { - DEBUG ((EFI_D_ERROR, "EhcAsyncInterruptTransfer: failed to allocate buffer\n")); - - Status = EFI_OUT_OF_RESOURCES; - goto ON_EXIT; - } - - Urb = EhcCreateUrb ( + Urb = EhciInsertAsyncIntTransfer ( Ehc, DeviceAddress, EndPointAddress, @@ -1063,9 +1053,6 @@ EhcAsyncInterruptTransfer ( *DataToggle, MaximumPacketLength, Translator, - EHC_INT_TRANSFER_ASYNC, - NULL, - Data, DataLength, CallBackFunction, Context, @@ -1073,20 +1060,10 @@ EhcAsyncInterruptTransfer ( ); if (Urb == NULL) { - DEBUG ((EFI_D_ERROR, "EhcAsyncInterruptTransfer: failed to create URB\n")); - - gBS->FreePool (Data); Status = EFI_OUT_OF_RESOURCES; goto ON_EXIT; } - // - // New asynchronous transfer must inserted to the head. - // Check the comments in EhcMoniteAsyncRequests - // - EhcLinkQhToPeriod (Ehc, Urb->Qh); - InsertHeadList (&Ehc->AsyncIntTransfers, &Urb->UrbList); - ON_EXIT: Ehc->PciIo->Flush (Ehc->PciIo); gBS->RestoreTPL (OldTpl); diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c index 168280be81d7..2d202d439d1c 100644 --- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c +++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c @@ -814,6 +814,83 @@ EhciDelAllAsyncIntTransfers ( } } +/** + Insert a single asynchronous interrupt transfer for + the device and endpoint. + + @param Ehc The EHCI device. + @param DevAddr The device address. + @param EpAddr Endpoint addrress & its direction. + @param DevSpeed The device speed. + @param Toggle Initial data toggle to use. + @param MaxPacket The max packet length of the endpoint. + @param Hub The transaction translator to use. + @param Data The user data to transfer. + @param DataLen The length of data buffer. + @param Callback The function to call when data is transferred. + @param Context The context to the callback. + @param Interval The interval for interrupt transfer. + + @return Created URB or NULL. + +**/ +URB * +EhciInsertAsyncIntTransfer ( + IN USB2_HC_DEV *Ehc, + IN UINT8 DevAddr, + IN UINT8 EpAddr, + IN UINT8 DevSpeed, + IN UINT8 Toggle, + IN UINTN MaxPacket, + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub, + IN UINTN DataLen, + IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback, + IN VOID *Context, + IN UINTN Interval + ) +{ + VOID *Data; + URB *Urb; + + Data = AllocatePool (DataLen); + + if (Data == NULL) { + DEBUG ((DEBUG_ERROR, "%a: failed to allocate buffer\n", __FUNCTION__)); + return NULL; + } + + Urb = EhcCreateUrb ( + Ehc, + DevAddr, + EpAddr, + DevSpeed, + Toggle, + MaxPacket, + Hub, + EHC_INT_TRANSFER_ASYNC, + NULL, + Data, + DataLen, + Callback, + Context, + Interval + ); + + if (Urb == NULL) { + DEBUG ((DEBUG_ERROR, "%a: failed to create URB\n", __FUNCTION__)); + gBS->FreePool (Data); + return NULL; + } + + // + // New asynchronous transfer must inserted to the head. + // Check the comments in EhcMoniteAsyncRequests + // + EhcLinkQhToPeriod (Ehc, Urb->Qh); + InsertHeadList (&Ehc->AsyncIntTransfers, &Urb->UrbList); + + return Urb; +} /** Flush data from PCI controller specific address to mapped system diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.h b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.h index c03bd619d7e8..b852e6327f37 100644 --- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.h +++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.h @@ -2,7 +2,7 @@ This file contains the definination for host controller schedule routines. -Copyright (c) 2007 - 2009, Intel Corporation. All rights reserved.
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -162,6 +162,40 @@ EhciDelAllAsyncIntTransfers ( IN USB2_HC_DEV *Ehc ); +/** + Insert a single asynchronous interrupt transfer for + the device and endpoint. + + @param Ehc The EHCI device. + @param DevAddr The device address. + @param EpAddr Endpoint addrress & its direction. + @param DevSpeed The device speed. + @param Toggle Initial data toggle to use. + @param MaxPacket The max packet length of the endpoint. + @param Hub The transaction translator to use. + @param Data The user data to transfer. + @param DataLen The length of data buffer. + @param Callback The function to call when data is transferred. + @param Context The context to the callback. + @param Interval The interval for interrupt transfer. + + @return Created URB or NULL. + +**/ +URB * +EhciInsertAsyncIntTransfer ( + IN USB2_HC_DEV *Ehc, + IN UINT8 BusAddr, + IN UINT8 EpAddr, + IN UINT8 DevSpeed, + IN UINT8 Toggle, + IN UINTN MaxPacket, + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub, + IN UINTN DataLen, + IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback, + IN VOID *Context, + IN UINTN Interval + ); /** Interrupt transfer periodic check handler. -- 2.7.0.windows.1