public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
* [PATCH 0/2] Revert "EhciDxe/XhciDxe: Use common buffer for AsyncInterruptTransfer"
@ 2018-11-06 14:34 Star Zeng
  2018-11-06 14:34 ` [PATCH 1/2] Revert "EhciDxe: " Star Zeng
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Star Zeng @ 2018-11-06 14:34 UTC (permalink / raw)
  To: edk2-devel
  Cc: Star Zeng, Ruiyu Ni, Hao Wu, Jian J Wang, Jiewen Yao,
	Leif Lindholm, Ard Biesheuvel

There is concern at the thread
https://lists.01.org/pipermail/edk2-devel/2018-November/031951.html.
And the time point is a little sensitive as it is near edk2-stable201811.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>

Star Zeng (2):
  Revert "EhciDxe: Use common buffer for AsyncInterruptTransfer"
  Revert "XhciDxe: Use common buffer for AsyncInterruptTransfer"

 MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c      |   3 -
 MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c |  78 ++++++++++++++++-
 MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c   |  38 +--------
 MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h   |  33 ++++----
 MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c      |   1 -
 MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 138 ++++++++++++++++++++-----------
 MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h |  27 +++---
 7 files changed, 198 insertions(+), 120 deletions(-)

-- 
2.7.0.windows.1



^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 1/2] Revert "EhciDxe: Use common buffer for AsyncInterruptTransfer"
  2018-11-06 14:34 [PATCH 0/2] Revert "EhciDxe/XhciDxe: Use common buffer for AsyncInterruptTransfer" Star Zeng
@ 2018-11-06 14:34 ` Star Zeng
  2018-11-06 14:34 ` [PATCH 2/2] Revert "XhciDxe: " Star Zeng
  2018-11-07  9:54 ` [PATCH 0/2] Revert "EhciDxe/XhciDxe: " Ni, Ruiyu
  2 siblings, 0 replies; 4+ messages in thread
From: Star Zeng @ 2018-11-06 14:34 UTC (permalink / raw)
  To: edk2-devel; +Cc: Star Zeng

There is concern at the thread
https://lists.01.org/pipermail/edk2-devel/2018-November/031951.html.
And the time point is a little sensitive as it is near edk2-stable201811.

This reverts commit 0cd645250306b244a5d6e0e293ed1786ec101641.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
---
 MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c      |  3 --
 MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c | 78 +++++++++++++++++++++++++++++++-
 MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c   | 38 ++--------------
 MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h   | 33 ++++++--------
 4 files changed, 95 insertions(+), 57 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c b/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c
index 764eeda58ba1..5569f4f9618b 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c
@@ -763,7 +763,6 @@ EhcControlTransfer (
           Translator,
           EHC_CTRL_TRANSFER,
           Request,
-          FALSE,
           Data,
           *DataLength,
           NULL,
@@ -907,7 +906,6 @@ EhcBulkTransfer (
           Translator,
           EHC_BULK_TRANSFER,
           NULL,
-          FALSE,
           Data[0],
           *DataLength,
           NULL,
@@ -1165,7 +1163,6 @@ EhcSyncInterruptTransfer (
           Translator,
           EHC_INT_TRANSFER_SYNC,
           NULL,
-          FALSE,
           Data,
           *DataLength,
           NULL,
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
index b067fd02d1ce..ec8d796fab11 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c
@@ -778,6 +778,7 @@ EhciDelAsyncIntTransfer (
       EhcUnlinkQhFromPeriod (Ehc, Urb->Qh);
       RemoveEntryList (&Urb->UrbList);
 
+      gBS->FreePool (Urb->Data);
       EhcFreeUrb (Ehc, Urb);
       return EFI_SUCCESS;
     }
@@ -808,6 +809,7 @@ EhciDelAllAsyncIntTransfers (
     EhcUnlinkQhFromPeriod (Ehc, Urb->Qh);
     RemoveEntryList (&Urb->UrbList);
 
+    gBS->FreePool (Urb->Data);
     EhcFreeUrb (Ehc, Urb);
   }
 }
@@ -846,8 +848,16 @@ EhciInsertAsyncIntTransfer (
   IN UINTN                              Interval
   )
 {
+  VOID      *Data;
   URB       *Urb;
 
+  Data = AllocatePool (DataLen);
+
+  if (Data == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: failed to allocate buffer\n", __FUNCTION__));
+    return NULL;
+  }
+
   Urb = EhcCreateUrb (
           Ehc,
           DevAddr,
@@ -858,8 +868,7 @@ EhciInsertAsyncIntTransfer (
           Hub,
           EHC_INT_TRANSFER_ASYNC,
           NULL,
-          TRUE,
-          NULL,
+          Data,
           DataLen,
           Callback,
           Context,
@@ -868,6 +877,7 @@ EhciInsertAsyncIntTransfer (
 
   if (Urb == NULL) {
     DEBUG ((DEBUG_ERROR, "%a: failed to create URB\n", __FUNCTION__));
+    gBS->FreePool (Data);
     return NULL;
   }
 
@@ -882,6 +892,60 @@ EhciInsertAsyncIntTransfer (
 }
 
 /**
+  Flush data from PCI controller specific address to mapped system
+  memory address.
+
+  @param  Ehc                The EHCI device.
+  @param  Urb                The URB to unmap.
+
+  @retval EFI_SUCCESS        Success to flush data to mapped system memory.
+  @retval EFI_DEVICE_ERROR   Fail to flush data to mapped system memory.
+
+**/
+EFI_STATUS
+EhcFlushAsyncIntMap (
+  IN  USB2_HC_DEV         *Ehc,
+  IN  URB                 *Urb
+  )
+{
+  EFI_STATUS                    Status;
+  EFI_PHYSICAL_ADDRESS          PhyAddr;
+  EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
+  EFI_PCI_IO_PROTOCOL           *PciIo;
+  UINTN                         Len;
+  VOID                          *Map;
+
+  PciIo = Ehc->PciIo;
+  Len   = Urb->DataLen;
+
+  if (Urb->Ep.Direction == EfiUsbDataIn) {
+    MapOp = EfiPciIoOperationBusMasterWrite;
+  } else {
+    MapOp = EfiPciIoOperationBusMasterRead;
+  }
+
+  Status = PciIo->Unmap (PciIo, Urb->DataMap);
+  if (EFI_ERROR (Status)) {
+    goto ON_ERROR;
+  }
+
+  Urb->DataMap = NULL;
+
+  Status = PciIo->Map (PciIo, MapOp, Urb->Data, &Len, &PhyAddr, &Map);
+  if (EFI_ERROR (Status) || (Len != Urb->DataLen)) {
+    goto ON_ERROR;
+  }
+
+  Urb->DataPhy  = (VOID *) ((UINTN) PhyAddr);
+  Urb->DataMap  = Map;
+  return EFI_SUCCESS;
+
+ON_ERROR:
+  return EFI_DEVICE_ERROR;
+}
+
+
+/**
   Update the queue head for next round of asynchronous transfer.
 
   @param  Ehc                   The EHCI device.
@@ -986,6 +1050,7 @@ EhcMonitorAsyncRequests (
   BOOLEAN                 Finished;
   UINT8                   *ProcBuf;
   URB                     *Urb;
+  EFI_STATUS              Status;
 
   OldTpl  = gBS->RaiseTPL (EHC_TPL);
   Ehc     = (USB2_HC_DEV *) Context;
@@ -1004,6 +1069,15 @@ EhcMonitorAsyncRequests (
     }
 
     //
+    // Flush any PCI posted write transactions from a PCI host
+    // bridge to system memory.
+    //
+    Status = EhcFlushAsyncIntMap (Ehc, Urb);
+    if (EFI_ERROR (Status)) {
+      DEBUG ((EFI_D_ERROR, "EhcMonitorAsyncRequests: Fail to Flush AsyncInt Mapped Memeory\n"));
+    }
+
+    //
     // Allocate a buffer then copy the transferred data for user.
     // If failed to allocate the buffer, update the URB for next
     // round of transfer. Ignore the data of this round.
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c b/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c
index 09c12776ecdb..6afb327df165 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c
@@ -339,14 +339,6 @@ EhcFreeUrb (
     PciIo->Unmap (PciIo, Urb->DataMap);
   }
 
-  if (Urb->AllocateCommonBuffer) {
-    PciIo->FreeBuffer (
-             PciIo,
-             EFI_SIZE_TO_PAGES (Urb->DataLen),
-             Urb->Data
-             );
-  }
-
   if (Urb->Qh != NULL) {
     //
     // Ensure that this queue head has been unlinked from the
@@ -537,8 +529,7 @@ ON_ERROR:
   @param  Hub                   The transaction translator to use.
   @param  Type                  The transaction type.
   @param  Request               The standard USB request for control transfer.
-  @param  AllocateCommonBuffer  Indicate whether need to allocate common buffer for data transfer.
-  @param  Data                  The user data to transfer, NULL if AllocateCommonBuffer is TRUE.
+  @param  Data                  The user data to transfer.
   @param  DataLen               The length of data buffer.
   @param  Callback              The function to call when data is transferred.
   @param  Context               The context to the callback.
@@ -558,7 +549,6 @@ EhcCreateUrb (
   IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
   IN UINTN                              Type,
   IN EFI_USB_DEVICE_REQUEST             *Request,
-  IN BOOLEAN                            AllocateCommonBuffer,
   IN VOID                               *Data,
   IN UINTN                              DataLen,
   IN EFI_ASYNC_USB_TRANSFER_CALLBACK    Callback,
@@ -606,24 +596,8 @@ EhcCreateUrb (
   Ep->PollRate    = EhcConvertPollRate (Interval);
 
   Urb->Request    = Request;
-  if (AllocateCommonBuffer) {
-    ASSERT (Data == NULL);
-    Status = Ehc->PciIo->AllocateBuffer (
-                           Ehc->PciIo,
-                           AllocateAnyPages,
-                           EfiBootServicesData,
-                           EFI_SIZE_TO_PAGES (DataLen),
-                           &Data,
-                           0
-                           );
-    if (EFI_ERROR (Status) || (Data == NULL)) {
-      FreePool (Urb);
-      return NULL;
-    }
-  }
   Urb->Data       = Data;
   Urb->DataLen    = DataLen;
-  Urb->AllocateCommonBuffer = AllocateCommonBuffer;
   Urb->Callback   = Callback;
   Urb->Context    = Context;
 
@@ -653,14 +627,10 @@ EhcCreateUrb (
   if (Data != NULL) {
     Len     = DataLen;
 
-    if (Urb->AllocateCommonBuffer) {
-      MapOp = EfiPciIoOperationBusMasterCommonBuffer;
+    if (Ep->Direction == EfiUsbDataIn) {
+      MapOp = EfiPciIoOperationBusMasterWrite;
     } else {
-      if (Ep->Direction == EfiUsbDataIn) {
-        MapOp = EfiPciIoOperationBusMasterWrite;
-      } else {
-        MapOp = EfiPciIoOperationBusMasterRead;
-      }
+      MapOp = EfiPciIoOperationBusMasterRead;
     }
 
     Status  = PciIo->Map (PciIo, MapOp, Data, &Len, &PhyAddr, &Map);
diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h b/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h
index cb3599f9d361..02e9af81be39 100644
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h
@@ -3,7 +3,7 @@
     This file contains URB request, each request is warpped in a
     URB (Usb Request Block).
 
-Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD License
 which accompanies this distribution.  The full text of the license may be found at
@@ -216,7 +216,6 @@ struct _URB {
   EFI_USB_DEVICE_REQUEST          *Request;     // Control transfer only
   VOID                            *RequestPhy;  // Address of the mapped request
   VOID                            *RequestMap;
-  BOOLEAN                         AllocateCommonBuffer;
   VOID                            *Data;
   UINTN                           DataLen;
   VOID                            *DataPhy;     // Address of the mapped user data
@@ -299,21 +298,20 @@ EhcFreeUrb (
 /**
   Create a new URB and its associated QTD.
 
-  @param  Ehc                   The EHCI device.
-  @param  DevAddr               The device address.
-  @param  EpAddr                Endpoint addrress & its direction.
-  @param  DevSpeed              The device speed.
-  @param  Toggle                Initial data toggle to use.
-  @param  MaxPacket             The max packet length of the endpoint.
-  @param  Hub                   The transaction translator to use.
-  @param  Type                  The transaction type.
-  @param  Request               The standard USB request for control transfer.
-  @param  AllocateCommonBuffer  Indicate whether need to allocate common buffer for data transfer.
-  @param  Data                  The user data to transfer, NULL if AllocateCommonBuffer is TRUE.
-  @param  DataLen               The length of data buffer.
-  @param  Callback              The function to call when data is transferred.
-  @param  Context               The context to the callback.
-  @param  Interval              The interval for interrupt transfer.
+  @param  Ehc        The EHCI device.
+  @param  DevAddr    The device address.
+  @param  EpAddr     Endpoint addrress & its direction.
+  @param  DevSpeed   The device speed.
+  @param  Toggle     Initial data toggle to use.
+  @param  MaxPacket  The max packet length of the endpoint.
+  @param  Hub        The transaction translator to use.
+  @param  Type       The transaction type.
+  @param  Request    The standard USB request for control transfer.
+  @param  Data       The user data to transfer.
+  @param  DataLen    The length of data buffer.
+  @param  Callback   The function to call when data is transferred.
+  @param  Context    The context to the callback.
+  @param  Interval   The interval for interrupt transfer.
 
   @return Created URB or NULL.
 
@@ -329,7 +327,6 @@ EhcCreateUrb (
   IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
   IN UINTN                              Type,
   IN EFI_USB_DEVICE_REQUEST             *Request,
-  IN BOOLEAN                            AllocateCommonBuffer,
   IN VOID                               *Data,
   IN UINTN                              DataLen,
   IN EFI_ASYNC_USB_TRANSFER_CALLBACK    Callback,
-- 
2.7.0.windows.1



^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH 2/2] Revert "XhciDxe: Use common buffer for AsyncInterruptTransfer"
  2018-11-06 14:34 [PATCH 0/2] Revert "EhciDxe/XhciDxe: Use common buffer for AsyncInterruptTransfer" Star Zeng
  2018-11-06 14:34 ` [PATCH 1/2] Revert "EhciDxe: " Star Zeng
@ 2018-11-06 14:34 ` Star Zeng
  2018-11-07  9:54 ` [PATCH 0/2] Revert "EhciDxe/XhciDxe: " Ni, Ruiyu
  2 siblings, 0 replies; 4+ messages in thread
From: Star Zeng @ 2018-11-06 14:34 UTC (permalink / raw)
  To: edk2-devel; +Cc: Star Zeng

There is concern at the thread
https://lists.01.org/pipermail/edk2-devel/2018-November/031951.html.
And the time point is a little sensitive as it is near edk2-stable201811.

This reverts commit 777920997152a2e68f664241f6080b64ff21edd6.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
---
 MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c      |   1 -
 MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 138 ++++++++++++++++++++-----------
 MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h |  27 +++---
 3 files changed, 103 insertions(+), 63 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index 64855a4c158c..7f64f9c7c982 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -769,7 +769,6 @@ XhcTransfer (
           MaximumPacketLength,
           Type,
           Request,
-          FALSE,
           Data,
           *DataLength,
           NULL,
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
index 9dd45e93a272..75959ae08363 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
@@ -118,18 +118,17 @@ ON_EXIT:
 /**
   Create a new URB for a new transaction.
 
-  @param  Xhc                   The XHCI Instance
-  @param  BusAddr               The logical device address assigned by UsbBus driver
-  @param  EpAddr                Endpoint addrress
-  @param  DevSpeed              The device speed
-  @param  MaxPacket             The max packet length of the endpoint
-  @param  Type                  The transaction type
-  @param  Request               The standard USB request for control transfer
-  @param  AllocateCommonBuffer  Indicate whether need to allocate common buffer for data transfer
-  @param  Data                  The user data to transfer, NULL if AllocateCommonBuffer is TRUE
-  @param  DataLen               The length of data buffer
-  @param  Callback              The function to call when data is transferred
-  @param  Context               The context to the callback
+  @param  Xhc       The XHCI Instance
+  @param  BusAddr   The logical device address assigned by UsbBus driver
+  @param  EpAddr    Endpoint addrress
+  @param  DevSpeed  The device speed
+  @param  MaxPacket The max packet length of the endpoint
+  @param  Type      The transaction type
+  @param  Request   The standard USB request for control transfer
+  @param  Data      The user data to transfer
+  @param  DataLen   The length of data buffer
+  @param  Callback  The function to call when data is transferred
+  @param  Context   The context to the callback
 
   @return Created URB or NULL
 
@@ -143,7 +142,6 @@ XhcCreateUrb (
   IN UINTN                              MaxPacket,
   IN UINTN                              Type,
   IN EFI_USB_DEVICE_REQUEST             *Request,
-  IN BOOLEAN                            AllocateCommonBuffer,
   IN VOID                               *Data,
   IN UINTN                              DataLen,
   IN EFI_ASYNC_USB_TRANSFER_CALLBACK    Callback,
@@ -171,24 +169,8 @@ XhcCreateUrb (
   Ep->Type      = Type;
 
   Urb->Request  = Request;
-  if (AllocateCommonBuffer) {
-    ASSERT (Data == NULL);
-    Status = Xhc->PciIo->AllocateBuffer (
-                           Xhc->PciIo,
-                           AllocateAnyPages,
-                           EfiBootServicesData,
-                           EFI_SIZE_TO_PAGES (DataLen),
-                           &Data,
-                           0
-                           );
-    if (EFI_ERROR (Status) || (Data == NULL)) {
-      FreePool (Urb);
-      return NULL;
-    }
-  }
   Urb->Data     = Data;
   Urb->DataLen  = DataLen;
-  Urb->AllocateCommonBuffer = AllocateCommonBuffer;
   Urb->Callback = Callback;
   Urb->Context  = Context;
 
@@ -196,7 +178,7 @@ XhcCreateUrb (
   ASSERT_EFI_ERROR (Status);
   if (EFI_ERROR (Status)) {
     DEBUG ((EFI_D_ERROR, "XhcCreateUrb: XhcCreateTransferTrb Failed, Status = %r\n", Status));
-    XhcFreeUrb (Xhc, Urb);
+    FreePool (Urb);
     Urb = NULL;
   }
 
@@ -224,14 +206,6 @@ XhcFreeUrb (
     Xhc->PciIo->Unmap (Xhc->PciIo, Urb->DataMap);
   }
 
-  if (Urb->AllocateCommonBuffer) {
-    Xhc->PciIo->FreeBuffer (
-                  Xhc->PciIo,
-                  EFI_SIZE_TO_PAGES (Urb->DataLen),
-                  Urb->Data
-                  );
-  }
-
   FreePool (Urb);
 }
 
@@ -290,14 +264,10 @@ XhcCreateTransferTrb (
   // No need to remap.
   //
   if ((Urb->Data != NULL) && (Urb->DataMap == NULL)) {
-    if (Urb->AllocateCommonBuffer) {
-      MapOp = EfiPciIoOperationBusMasterCommonBuffer;
+    if (((UINT8) (Urb->Ep.Direction)) == EfiUsbDataIn) {
+      MapOp = EfiPciIoOperationBusMasterWrite;
     } else {
-      if (((UINT8) (Urb->Ep.Direction)) == EfiUsbDataIn) {
-        MapOp = EfiPciIoOperationBusMasterWrite;
-      } else {
-        MapOp = EfiPciIoOperationBusMasterRead;
-      }
+      MapOp = EfiPciIoOperationBusMasterRead;
     }
 
     Len = Urb->DataLen;
@@ -1397,6 +1367,7 @@ XhciDelAsyncIntTransfer (
       }
 
       RemoveEntryList (&Urb->UrbList);
+      FreePool (Urb->Data);
       XhcFreeUrb (Xhc, Urb);
       return EFI_SUCCESS;
     }
@@ -1434,6 +1405,7 @@ XhciDelAllAsyncIntTransfers (
     }
 
     RemoveEntryList (&Urb->UrbList);
+    FreePool (Urb->Data);
     XhcFreeUrb (Xhc, Urb);
   }
 }
@@ -1466,8 +1438,15 @@ XhciInsertAsyncIntTransfer (
   IN VOID                               *Context
   )
 {
+  VOID      *Data;
   URB       *Urb;
 
+  Data = AllocateZeroPool (DataLen);
+  if (Data == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: failed to allocate buffer\n", __FUNCTION__));
+    return NULL;
+  }
+
   Urb = XhcCreateUrb (
           Xhc,
           BusAddr,
@@ -1476,14 +1455,14 @@ XhciInsertAsyncIntTransfer (
           MaxPacket,
           XHC_INT_TRANSFER_ASYNC,
           NULL,
-          TRUE,
-          NULL,
+          Data,
           DataLen,
           Callback,
           Context
           );
   if (Urb == NULL) {
     DEBUG ((DEBUG_ERROR, "%a: failed to create URB\n", __FUNCTION__));
+    FreePool (Data);
     return NULL;
   }
 
@@ -1524,6 +1503,61 @@ XhcUpdateAsyncRequest (
 }
 
 /**
+  Flush data from PCI controller specific address to mapped system
+  memory address.
+
+  @param  Xhc                The XHCI device.
+  @param  Urb                The URB to unmap.
+
+  @retval EFI_SUCCESS        Success to flush data to mapped system memory.
+  @retval EFI_DEVICE_ERROR   Fail to flush data to mapped system memory.
+
+**/
+EFI_STATUS
+XhcFlushAsyncIntMap (
+  IN  USB_XHCI_INSTANCE   *Xhc,
+  IN  URB                 *Urb
+  )
+{
+  EFI_STATUS                    Status;
+  EFI_PHYSICAL_ADDRESS          PhyAddr;
+  EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
+  EFI_PCI_IO_PROTOCOL           *PciIo;
+  UINTN                         Len;
+  VOID                          *Map;
+
+  PciIo = Xhc->PciIo;
+  Len   = Urb->DataLen;
+
+  if (Urb->Ep.Direction == EfiUsbDataIn) {
+    MapOp = EfiPciIoOperationBusMasterWrite;
+  } else {
+    MapOp = EfiPciIoOperationBusMasterRead;
+  }
+
+  if (Urb->DataMap != NULL) {
+    Status = PciIo->Unmap (PciIo, Urb->DataMap);
+    if (EFI_ERROR (Status)) {
+      goto ON_ERROR;
+    }
+  }
+
+  Urb->DataMap = NULL;
+
+  Status = PciIo->Map (PciIo, MapOp, Urb->Data, &Len, &PhyAddr, &Map);
+  if (EFI_ERROR (Status) || (Len != Urb->DataLen)) {
+    goto ON_ERROR;
+  }
+
+  Urb->DataPhy  = (VOID *) ((UINTN) PhyAddr);
+  Urb->DataMap  = Map;
+  return EFI_SUCCESS;
+
+ON_ERROR:
+  return EFI_DEVICE_ERROR;
+}
+
+/**
   Interrupt transfer periodic check handler.
 
   @param  Event                 Interrupt event.
@@ -1543,6 +1577,7 @@ XhcMonitorAsyncRequests (
   UINT8                   *ProcBuf;
   URB                     *Urb;
   UINT8                   SlotId;
+  EFI_STATUS              Status;
   EFI_TPL                 OldTpl;
 
   OldTpl = gBS->RaiseTPL (XHC_TPL);
@@ -1571,6 +1606,15 @@ XhcMonitorAsyncRequests (
     }
 
     //
+    // Flush any PCI posted write transactions from a PCI host
+    // bridge to system memory.
+    //
+    Status = XhcFlushAsyncIntMap (Xhc, Urb);
+    if (EFI_ERROR (Status)) {
+      DEBUG ((EFI_D_ERROR, "XhcMonitorAsyncRequests: Fail to Flush AsyncInt Mapped Memeory\n"));
+    }
+
+    //
     // Allocate a buffer then copy the transferred data for user.
     // If failed to allocate the buffer, update the URB for next
     // round of transfer. Ignore the data of this round.
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
index 1a95d98996c1..b5e192c3b589 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
@@ -172,7 +172,6 @@ typedef struct _URB {
   //
   USB_ENDPOINT                    Ep;
   EFI_USB_DEVICE_REQUEST          *Request;
-  BOOLEAN                         AllocateCommonBuffer;
   VOID                            *Data;
   UINTN                           DataLen;
   VOID                            *DataPhy;
@@ -1433,18 +1432,17 @@ XhcSetTrDequeuePointer (
 /**
   Create a new URB for a new transaction.
 
-  @param  Xhc                   The XHCI Instance
-  @param  BusAddr               The logical device address assigned by UsbBus driver
-  @param  EpAddr                Endpoint addrress
-  @param  DevSpeed              The device speed
-  @param  MaxPacket             The max packet length of the endpoint
-  @param  Type                  The transaction type
-  @param  Request               The standard USB request for control transfer
-  @param  AllocateCommonBuffer  Indicate whether need to allocate common buffer for data transfer
-  @param  Data                  The user data to transfer, NULL if AllocateCommonBuffer is TRUE
-  @param  DataLen               The length of data buffer
-  @param  Callback              The function to call when data is transferred
-  @param  Context               The context to the callback
+  @param  Xhc       The XHCI Instance
+  @param  DevAddr   The device address
+  @param  EpAddr    Endpoint addrress
+  @param  DevSpeed  The device speed
+  @param  MaxPacket The max packet length of the endpoint
+  @param  Type      The transaction type
+  @param  Request   The standard USB request for control transfer
+  @param  Data      The user data to transfer
+  @param  DataLen   The length of data buffer
+  @param  Callback  The function to call when data is transferred
+  @param  Context   The context to the callback
 
   @return Created URB or NULL
 
@@ -1452,13 +1450,12 @@ XhcSetTrDequeuePointer (
 URB*
 XhcCreateUrb (
   IN USB_XHCI_INSTANCE                  *Xhc,
-  IN UINT8                              BusAddr,
+  IN UINT8                              DevAddr,
   IN UINT8                              EpAddr,
   IN UINT8                              DevSpeed,
   IN UINTN                              MaxPacket,
   IN UINTN                              Type,
   IN EFI_USB_DEVICE_REQUEST             *Request,
-  IN BOOLEAN                            AllocateCommonBuffer,
   IN VOID                               *Data,
   IN UINTN                              DataLen,
   IN EFI_ASYNC_USB_TRANSFER_CALLBACK    Callback,
-- 
2.7.0.windows.1



^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH 0/2] Revert "EhciDxe/XhciDxe: Use common buffer for AsyncInterruptTransfer"
  2018-11-06 14:34 [PATCH 0/2] Revert "EhciDxe/XhciDxe: Use common buffer for AsyncInterruptTransfer" Star Zeng
  2018-11-06 14:34 ` [PATCH 1/2] Revert "EhciDxe: " Star Zeng
  2018-11-06 14:34 ` [PATCH 2/2] Revert "XhciDxe: " Star Zeng
@ 2018-11-07  9:54 ` Ni, Ruiyu
  2 siblings, 0 replies; 4+ messages in thread
From: Ni, Ruiyu @ 2018-11-07  9:54 UTC (permalink / raw)
  To: Zeng, Star, edk2-devel@lists.01.org
  Cc: Wu, Hao A, Wang, Jian J, Yao, Jiewen, Leif Lindholm,
	Ard Biesheuvel

Reviewed-by: Ruiyu Ni <Ruiyu.ni@Intel.com>

Thanks/Ray

> -----Original Message-----
> From: Zeng, Star <star.zeng@intel.com>
> Sent: Tuesday, November 6, 2018 10:34 PM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star <star.zeng@intel.com>; Ni, Ruiyu <ruiyu.ni@intel.com>; Wu,
> Hao A <hao.a.wu@intel.com>; Wang, Jian J <jian.j.wang@intel.com>; Yao,
> Jiewen <jiewen.yao@intel.com>; Leif Lindholm <leif.lindholm@linaro.org>;
> Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Subject: [PATCH 0/2] Revert "EhciDxe/XhciDxe: Use common buffer for
> AsyncInterruptTransfer"
> 
> There is concern at the thread
> https://lists.01.org/pipermail/edk2-devel/2018-November/031951.html.
> And the time point is a little sensitive as it is near edk2-stable201811.
> 
> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
> Cc: Hao Wu <hao.a.wu@intel.com>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Leif Lindholm <leif.lindholm@linaro.org>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Star Zeng <star.zeng@intel.com>
> 
> Star Zeng (2):
>   Revert "EhciDxe: Use common buffer for AsyncInterruptTransfer"
>   Revert "XhciDxe: Use common buffer for AsyncInterruptTransfer"
> 
>  MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c      |   3 -
>  MdeModulePkg/Bus/Pci/EhciDxe/EhciSched.c |  78 ++++++++++++++++-
>  MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.c   |  38 +--------
>  MdeModulePkg/Bus/Pci/EhciDxe/EhciUrb.h   |  33 ++++----
>  MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c      |   1 -
>  MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 138
> ++++++++++++++++++++-----------
> MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h |  27 +++---
>  7 files changed, 198 insertions(+), 120 deletions(-)
> 
> --
> 2.7.0.windows.1



^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-11-07  9:54 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-11-06 14:34 [PATCH 0/2] Revert "EhciDxe/XhciDxe: Use common buffer for AsyncInterruptTransfer" Star Zeng
2018-11-06 14:34 ` [PATCH 1/2] Revert "EhciDxe: " Star Zeng
2018-11-06 14:34 ` [PATCH 2/2] Revert "XhciDxe: " Star Zeng
2018-11-07  9:54 ` [PATCH 0/2] Revert "EhciDxe/XhciDxe: " Ni, Ruiyu

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox