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From: Marcin Wojtas <mw@semihalf.com>
To: edk2-devel@lists.01.org
Cc: leif.lindholm@linaro.org, hao.a.wu@intel.com,
	michael.d.kinney@intel.com, liming.gao@intel.com,
	ard.biesheuvel@linaro.org, nadavh@marvell.com, mw@semihalf.com,
	jsd@semihalf.com, tm@semihalf.com, jaz@semihalf.com
Subject: [PATCH v3 0/4] SdMmcOverride extension
Date: Thu,  8 Nov 2018 02:57:31 +0100	[thread overview]
Message-ID: <1541642255-15602-1-git-send-email-mw@semihalf.com> (raw)

Hi,

This is the third version of the patchset, which addresses
all remarks that came up during the v2 review, such as
updating the bus mode related enum/macro, headers cleanup,
etc. Details can be found in the changelog below.

Patches are available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/sdmmc-override-upstream-r20181108

Please note that extending SdMmcOverride protocol was impacting
so far the only user of it (Synquacer controller). In paralel
edk2-platforms patchset, a patch can be found:
("Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride")
which immunizes for above and future extensions of the protocol:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/xenon-upstream-r20181108

I'm looking forward to the comments and remarks.

Best regards,
Marcin

Changelog:
* 1/4:
  - rename new parameter to PhaseData
  - add Ard's RB

* 2/4:
  - s/Controler/Controller/
  - remove all references to MMC_SDR_50 mode
  - rename and reorder MMC bus modes
  - rename enum: s/SD_MMC_UHS_TIMING/SD_MMC_BUS_MODE/
    and move it to protocol header in order to drop including private one
  - fix if condition in EmmcSwitchToHighSpeed
  - call SdMmcHcUhsSignaling unconditionally before SdMmcOverride
    callback, so that protocol producer can optionally modify only quirky
    timing mode values.

*4/4
  - bump protocol version to 2
  - remove redundant assert from SdMmcPciHcDriverBindingStart
    (BaseClkFreq is already checked in SdMmcHcInitClockFreq)
  - update comment in SdMmcHcInitClockFreq
  - restore original DumpCapabilityReg and append 

v1 -> v2
* Rebase onto newest master
* 1/4 [new patch] - preparation for extending NotifyPhase
* 2/4 - UhsSignaling as a part of NotifyPhase
* 3/4 - SwitchClockFreqPost as a part of NotifyPhase
* 4/4 - Allow updating BaseClkFreq via Capability instead of the
        independent callback.

Marcin Wojtas (2):
  MdeModulePkg/SdMmcPciHcDxe: Add an optional parameter in NotifyPhase
  MdeModulePkg/SdMmcPciHcDxe: Allow overriding base clock frequency

Tomasz Michalec (2):
  MdeModulePkg/SdMmcPciHcDxe: Add UhsSignaling to SdMmcOverride protocol
  MdeModulePkg/SdMmcPciHcDxe: Add SwitchClockFreqPost to SdMmcOverride

 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h |   6 +
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h   |  40 +++-
 MdeModulePkg/Include/Protocol/SdMmcOverride.h      |  29 ++-
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c    | 200 +++++++++++++++-----
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c      |  53 +++++-
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c |  13 +-
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c   | 101 ++++++++--
 7 files changed, 358 insertions(+), 84 deletions(-)

-- 
2.7.4



             reply	other threads:[~2018-11-08  1:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-08  1:57 Marcin Wojtas [this message]
2018-11-08  1:57 ` [PATCH v3 1/4] MdeModulePkg/SdMmcPciHcDxe: Add an optional parameter in NotifyPhase Marcin Wojtas
2018-11-08  1:57 ` [PATCH v3 2/4] MdeModulePkg/SdMmcPciHcDxe: Add UhsSignaling to SdMmcOverride protocol Marcin Wojtas
2018-11-08 11:06   ` Ard Biesheuvel
2018-11-08 11:15     ` Marcin Wojtas
2018-11-08  1:57 ` [PATCH v3 3/4] MdeModulePkg/SdMmcPciHcDxe: Add SwitchClockFreqPost to SdMmcOverride Marcin Wojtas
2018-11-08 11:09   ` Ard Biesheuvel
2018-11-08 11:18     ` Marcin Wojtas
2018-11-08  1:57 ` [PATCH v3 4/4] MdeModulePkg/SdMmcPciHcDxe: Allow overriding base clock frequency Marcin Wojtas
2018-11-08 11:10   ` Ard Biesheuvel

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