From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=chandni.cherukuri@arm.com; receiver=edk2-devel@lists.01.org Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id 23D4121B02822 for ; Wed, 21 Nov 2018 04:45:27 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 009D3353C; Wed, 21 Nov 2018 04:45:27 -0800 (PST) Received: from usa.arm.com (a73437-lin.blr.arm.com [10.162.0.155]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A942B3F5A0; Wed, 21 Nov 2018 04:45:25 -0800 (PST) From: Chandni Cherukuri To: edk2-devel@lists.01.org Date: Wed, 21 Nov 2018 18:14:56 +0530 Message-Id: <1542804297-31957-6-git-send-email-chandni.cherukuri@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1542804297-31957-1-git-send-email-chandni.cherukuri@arm.com> References: <1542804297-31957-1-git-send-email-chandni.cherukuri@arm.com> Subject: [PATCH v3 edk2-platforms 5/6] Platform/ARM/Sgi: Add ACPI tables for SGI-Clark.Helios platform X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Nov 2018 12:45:27 -0000 X-List-Received-Date: Wed, 21 Nov 2018 12:45:27 -0000 X-List-Received-Date: Wed, 21 Nov 2018 12:45:27 -0000 X-List-Received-Date: Wed, 21 Nov 2018 12:45:27 -0000 X-List-Received-Date: Wed, 21 Nov 2018 12:45:27 -0000 X-List-Received-Date: Wed, 21 Nov 2018 12:45:27 -0000 X-List-Received-Date: Wed, 21 Nov 2018 12:45:27 -0000 X-List-Received-Date: Wed, 21 Nov 2018 12:45:27 -0000 Add ACPI tables specific for SGI-Clark.Helios platform and let this platform reuse the rest of the common SGI platform ACPI tables. Cc: Ard Biesheuvel Cc: Leif Lindholm Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chandni Cherukuri --- Platform/ARM/SgiPkg/SgiPlatform.dec | 1 + Platform/ARM/SgiPkg/SgiPlatform.dsc | 1 + Platform/ARM/SgiPkg/SgiPlatform.fdf | 1 + Platform/ARM/SgiPkg/AcpiTables/SgiClarkHeliosAcpiTables.inf | 58 +++++ Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 1 + Platform/ARM/SgiPkg/AcpiTables/SgiClarkHelios/Dsdt.asl | 262 +++++++++++++++++++ Platform/ARM/SgiPkg/AcpiTables/SgiClarkHelios/Madt.aslc | 266 ++++++++++++++++++++ 7 files changed, 590 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec index f66fa1f..f6e0ba1 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -34,6 +34,7 @@ gArmSgiTokenSpaceGuid = { 0x577d6941, 0xaea1, 0x40b4, { 0x90, 0x93, 0x2a, 0x86, 0x61, 0x72, 0x5a, 0x57 } } gSgi575AcpiTablesFileGuid = { 0xc712719a, 0x0aaf, 0x438c, { 0x9c, 0xdd, 0x35, 0xab, 0x4d, 0x60, 0x20, 0x7d } } gSgiClarkAresAcpiTablesFileGuid = { 0x4b0b91d0, 0x4a05, 0x45c4, { 0x88, 0xa7, 0x88, 0xe1, 0x70, 0xe7, 0x66, 0x94 } } + gSgiClarkHeliosAcpiTablesFileGuid = { 0x2af40815, 0xa84e, 0x4de9, { 0x8c, 0x38, 0x91, 0x40, 0xb3, 0x54, 0x40, 0x73 } } [PcdsFeatureFlag.common] # Set this PCD to TRUE to enable virtio support. diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc index 8b8062a..0c21f1c 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc @@ -253,6 +253,7 @@ MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf Platform/ARM/SgiPkg/AcpiTables/SgiClarkAresAcpiTables.inf + Platform/ARM/SgiPkg/AcpiTables/SgiClarkHeliosAcpiTables.inf MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf # diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf index dc81acd..b7af4a2 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf @@ -107,6 +107,7 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/SgiClarkAresAcpiTables.inf + INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/SgiClarkHeliosAcpiTables.inf INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf # Required by PCI diff --git a/Platform/ARM/SgiPkg/AcpiTables/SgiClarkHeliosAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/SgiClarkHeliosAcpiTables.inf new file mode 100644 index 0000000..0ecce2d --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/SgiClarkHeliosAcpiTables.inf @@ -0,0 +1,58 @@ +## @file +# ACPI table data and ASL sources required to boot the platform. +# +# Copyright (c) 2018, ARM Ltd. All rights reserved. +# +# This program and the accompanying materials are licensed and made available +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = SgiClarkHeliosAcpiTables + FILE_GUID = 2af40815-a84e-4de9-8c38-9140b3544073 + MODULE_TYPE = USER_DEFINED + VERSION_STRING = 1.0 + +[Sources] + Dbg2.aslc + Fadt.aslc + Gtdt.aslc + Iort.aslc + Mcfg.aslc + SgiClarkHelios/Dsdt.asl + SgiClarkHelios/Madt.aslc + Spcr.aslc + Ssdt.asl + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + Platform/ARM/SgiPkg/SgiPlatform.dec + +[FixedPcd] + gArmPlatformTokenSpaceGuid.PcdCoreCount + gArmPlatformTokenSpaceGuid.PcdClusterCount + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase + gArmPlatformTokenSpaceGuid.PL011UartInterrupt + + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase + gArmTokenSpaceGuid.PcdPciBusMin + gArmTokenSpaceGuid.PcdPciBusMax + + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf index 0371c40..d903ed8 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf @@ -38,6 +38,7 @@ gArmSgiPlatformIdDescriptorGuid gSgi575AcpiTablesFileGuid gSgiClarkAresAcpiTablesFileGuid + gSgiClarkHeliosAcpiTablesFileGuid [FeaturePcd] gArmSgiTokenSpaceGuid.PcdVirtioSupported diff --git a/Platform/ARM/SgiPkg/AcpiTables/SgiClarkHelios/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/SgiClarkHelios/Dsdt.asl new file mode 100644 index 0000000..b8eb3b8 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/SgiClarkHelios/Dsdt.asl @@ -0,0 +1,262 @@ +/** @file +* Differentiated System Description Table Fields (DSDT) +* +* Copyright (c) 2018, ARM Ltd. All rights reserved. +* +* This program and the accompanying materials are licensed and made available +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI", + EFI_ACPI_ARM_OEM_REVISION) { + Scope (_SB) { + // + // HeliosCores 8X2 Processor declaration + // + Device (CP00) { // HeliosCore: Cluster 0, Cpu 0, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 0) + Name (_STA, 0xF) + } + + Device (CP01) { // HeliosCore: Cluster 0, Cpu 0, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 1) + Name (_STA, 0xF) + } + + Device (CP02) { // HeliosCore: Cluster 0, Cpu 1, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 2) + Name (_STA, 0xF) + } + + Device (CP03) { // HeliosCore: Cluster 0, Cpu 1, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 3) + Name (_STA, 0xF) + } + + Device (CP04) { // HeliosCore: Cluster 0, Cpu 2, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 4) + Name (_STA, 0xF) + } + + Device (CP05) { // HeliosCore: Cluster 0, Cpu 2, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 5) + Name (_STA, 0xF) + } + + Device (CP06) { // HeliosCore: Cluster 0, Cpu 3, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 6) + Name (_STA, 0xF) + } + + Device (CP07) { // HeliosCore: Cluster 0, Cpu 3, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 7) + Name (_STA, 0xF) + } + + Device (CP08) { // HeliosCore: Cluster 0, Cpu 4, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 8) + Name (_STA, 0xF) + } + + Device (CP09) { // HeliosCore: Cluster 0, Cpu 4, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 9) + Name (_STA, 0xF) + } + + Device (CP10) { // HeliosCore: Cluster 0, Cpu 5, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 10) + Name (_STA, 0xF) + } + + Device (CP11) { // HeliosCore: Cluster 0, Cpu 5, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 11) + Name (_STA, 0xF) + } + + Device (CP12) { // HeliosCore: Cluster 0, Cpu 6, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 12) + Name (_STA, 0xF) + } + + Device (CP13) { // HeliosCore: Cluster 0, Cpu 6, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 13) + Name (_STA, 0xF) + } + + Device (CP14) { // HeliosCore: Cluster 0, Cpu 7, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 14) + Name (_STA, 0xF) + } + + Device (CP15) { // HeliosCore: Cluster 0, Cpu 7, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 15) + Name (_STA, 0xF) + } + + Device (CP16) { // HeliosCore: Cluster 0, Cpu 0, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 16) + Name (_STA, 0xF) + } + + Device (CP17) { // HeliosCore: Cluster 0, Cpu 0, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 17) + Name (_STA, 0xF) + } + + Device (CP18) { // HeliosCore: Cluster 0, Cpu 1, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 18) + Name (_STA, 0xF) + } + + Device (CP19) { // HeliosCore: Cluster 0, Cpu 1, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 19) + Name (_STA, 0xF) + } + + Device (CP20) { // HeliosCore: Cluster 0, Cpu 2, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 20) + Name (_STA, 0xF) + } + + Device (CP21) { // HeliosCore: Cluster 0, Cpu 2, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 21) + Name (_STA, 0xF) + } + + Device (CP22) { // HeliosCore: Cluster 0, Cpu 3, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 22) + Name (_STA, 0xF) + } + + Device (CP23) { // HeliosCore: Cluster 0, Cpu 3, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 23) + Name (_STA, 0xF) + } + + Device (CP24) { // HeliosCore: Cluster 0, Cpu 4, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 24) + Name (_STA, 0xF) + } + + Device (CP25) { // HeliosCore: Cluster 0, Cpu 4, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 25) + Name (_STA, 0xF) + } + + Device (CP26) { // HeliosCore: Cluster 0, Cpu 5, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 26) + Name (_STA, 0xF) + } + + Device (CP27) { // HeliosCore: Cluster 0, Cpu 5, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 27) + Name (_STA, 0xF) + } + + Device (CP28) { // HeliosCore: Cluster 0, Cpu 6, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 28) + Name (_STA, 0xF) + } + + Device (CP29) { // HeliosCore: Cluster 0, Cpu 6, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 29) + Name (_STA, 0xF) + } + + Device (CP30) { // HeliosCore: Cluster 0, Cpu 7, Thread 0 + Name (_HID, "ACPI0007") + Name (_UID, 30) + Name (_STA, 0xF) + } + + Device (CP31) { // HeliosCore: Cluster 0, Cpu 7, Thread 1 + Name (_HID, "ACPI0007") + Name (_UID, 31) + Name (_STA, 0xF) + } + + // UART PL011 + Device (COM0) { + Name (_HID, "ARMH0011") + Name (_CID, "ARMH0011") + Name (_UID, Zero) + Name (_STA, 0xF) + Name (_CRS, ResourceTemplate() { + Memory32Fixed ( + ReadWrite, + FixedPcdGet64 (PcdSerialDbgRegisterBase), + 0x1000 + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 } + }) + } + + // SMSC 91C111 + Device (ETH0) { + Name (_HID, "LNRO0003") + Name (_UID, Zero) + Name (_STA, 0xF) + Name (_CRS, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x18000000, 0x1000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 } + }) + Name (_DSD, Package() { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package (2) {"reg-io-width", 4 }, + } + }) + } + + // VIRTIO DISK + Device (VR00) { + Name (_HID, "LNRO0005") + Name (_UID, 0) + Name (_CCA, 1) // mark the device coherent + + Name (_CRS, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c130000, 0x10000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 202 } + }) + } + } // Scope(_SB) +} diff --git a/Platform/ARM/SgiPkg/AcpiTables/SgiClarkHelios/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/SgiClarkHelios/Madt.aslc new file mode 100644 index 0000000..0d66d8a --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/SgiClarkHelios/Madt.aslc @@ -0,0 +1,266 @@ +/** @file +* Multiple APIC Description Table (MADT) +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made available +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" +#include +#include +#include +#include + +// EFI_ACPI_6_2_GIC_STRUCTURE +#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \ + PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \ + { \ + EFI_ACPI_6_2_GIC, /* Type */ \ + sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ \ + EFI_ACPI_RESERVED_WORD, /* Reserved */ \ + GicId, /* CPUInterfaceNumber */ \ + AcpiCpuUid, /* AcpiProcessorUid */ \ + Flags, /* Flags */ \ + 0, /* ParkingProtocolVersion */ \ + PmuIrq, /* PerformanceInterruptGsiv */ \ + 0, /* ParkedAddress */ \ + GicBase, /* PhysicalBaseAddress */ \ + GicVBase, /* GICV */ \ + GicHBase, /* GICH */ \ + GsivId, /* VGICMaintenanceInterrupt */ \ + GicRBase, /* GICRBaseAddress */ \ + Mpidr, /* MPIDR */ \ + Efficiency, /* ProcessorPowerEfficiencyClass */ \ + { \ + EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \ + EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \ + EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \ + } \ + } + +// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE +#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \ + GicDistVector, GicVersion) \ + { \ + EFI_ACPI_6_2_GICD, /* Type */ \ + sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), \ + EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \ + GicDistHwId, /* GicId */ \ + GicDistBase, /* PhysicalBaseAddress */ \ + GicDistVector, /* SystemVectorBase */ \ + GicVersion, /* GicVersion */ \ + { \ + EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \ + EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \ + EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \ + } \ + } + +// EFI_ACPI_6_2_GICR_STRUCTURE +#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \ + { \ + EFI_ACPI_6_2_GICR, /* Type */ \ + sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ \ + EFI_ACPI_RESERVED_WORD, /* Reserved */ \ + RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \ + RedisDiscLength /* DiscoveryRangeLength */ \ + } + +// EFI_ACPI_6_2_GIC_ITS_STRUCTURE +#define EFI_ACPI_6_2_GIC_ITS_INIT(GicItsId, GicItsBase) \ + { \ + EFI_ACPI_6_2_GIC_ITS, /* Type */ \ + sizeof (EFI_ACPI_6_2_GIC_ITS_STRUCTURE), \ + EFI_ACPI_RESERVED_WORD, /* Reserved */ \ + GicItsId, /* GicItsId */ \ + GicItsBase, /* PhysicalBaseAddress */ \ + EFI_ACPI_RESERVED_DWORD /* DiscoveryRangeLength */ \ + } + +// Multiple APIC Description Table +#pragma pack (1) + +typedef struct { + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; + EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[32]; + EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; + EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor; + EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicIts; +} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE; + +#pragma pack () + +STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE, + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION + ), + // MADT specific fields + 0, // LocalApicAddress + 0 // Flags + }, + { + // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, + // PmuIrq, GicBase, GicVBase, + // GicHBase, GsivId, GicRBase, + // Efficiency) + // Note: The GIC Structure of the primary CPU must be the first entry + // (see note in 5.2.12.14 GICC Structure of ACPI v6.2). + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-0 Thread-0 + 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-1 Thread-1 + 0, 1, GET_MPID(0x0, 0x1), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-1 Thread-0 + 0, 2, GET_MPID(0x0, 0x100), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-1 Thread-1 + 0, 3, GET_MPID(0x0, 0x101), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-2 Thread-0 + 0, 4, GET_MPID(0x0, 0x200), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-2 Thread-1 + 0, 5, GET_MPID(0x0, 0x201), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-3 Thread-0 + 0, 6, GET_MPID(0x0, 0x300), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-3 Thread-1 + 0, 7, GET_MPID(0x0, 0x301), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-4 Thread-0 + 0, 8, GET_MPID(0x0, 0x400), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-4 Thread-1 + 0, 9, GET_MPID(0x0, 0x401), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-5 Thread-0 + 0, 10, GET_MPID(0x0, 0x500), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-5 Thread-1 + 0, 11, GET_MPID(0x0, 0x501), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-6 Thread-0 + 0, 12, GET_MPID(0x0, 0x600), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-6 Thread-1 + 0, 13, GET_MPID(0x0, 0x601), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-7 Thread-0 + 0, 14, GET_MPID(0x0, 0x700), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-7 Thread-1 + 0, 15, GET_MPID(0x0, 0x701), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + + //Cluster 1 + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-0 Thread-0 + 0, 16, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-1 Thread-1 + 0, 17, GET_MPID(0x100, 0x1), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-1 Thread-0 + 0, 18, GET_MPID(0x100, 0x100), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-1 Thread-1 + 0, 19, GET_MPID(0x100, 0x101), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-2 Thread-0 + 0, 20, GET_MPID(0x100, 0x200), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-2 Thread-1 + 0, 21, GET_MPID(0x100, 0x201), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-3 Thread-0 + 0, 22, GET_MPID(0x100, 0x300), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-3 Thread-1 + 0, 23, GET_MPID(0x100, 0x301), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-4 Thread-0 + 0, 24, GET_MPID(0x100, 0x400), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-4 Thread-1 + 0, 25, GET_MPID(0x100, 0x401), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-5 Thread-0 + 0, 26, GET_MPID(0x100, 0x500), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-5 Thread-1 + 0, 27, GET_MPID(0x100, 0x501), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-6 Thread-0 + 0, 28, GET_MPID(0x100, 0x600), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-6 Thread-1 + 0, 29, GET_MPID(0x100, 0x601), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-7 Thread-0 + 0, 30, GET_MPID(0x100, 0x700), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Core-7 Thread-1 + 0, 31, GET_MPID(0x100, 0x701), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + }, + // GIC Distributor Entry + EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), + 0, 3), + // GIC Redistributor + EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase), + SIZE_8MB), + // GIC ITS + EFI_ACPI_6_2_GIC_ITS_INIT(0, 0x30040000) +}; + +// +// Reference the table being generated to prevent the optimizer from removing +// the data structure from the executable +// +VOID* CONST ReferenceAcpiTable = &Madt; -- 2.7.4