From: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
To: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org,
michael.d.kinney@intel.com, edk2-devel@lists.01.org
Subject: [PATCH edk2-platforms 16/41] Silicon/NXP : Add support of NorFlashLib
Date: Wed, 28 Nov 2018 20:31:30 +0530 [thread overview]
Message-ID: <1543417315-5763-17-git-send-email-meenakshi.aggarwal@nxp.com> (raw)
In-Reply-To: <1543417315-5763-1-git-send-email-meenakshi.aggarwal@nxp.com>
NorFlashLib interacts with the underlying IFC NOR controller.
This will be used by NOR driver for any information
exchange with NOR controller.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
Silicon/NXP/Include/Library/NorFlashLib.h | 77 +++
Silicon/NXP/Include/NorFlash.h | 44 ++
Silicon/NXP/Library/NorFlashLib/CfiCommand.h | 99 ++++
Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.c | 210 +++++++
Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.h | 53 ++
Silicon/NXP/Library/NorFlashLib/NorFlashLib.c | 696 +++++++++++++++++++++++
Silicon/NXP/Library/NorFlashLib/NorFlashLib.inf | 43 ++
7 files changed, 1222 insertions(+)
create mode 100644 Silicon/NXP/Include/Library/NorFlashLib.h
create mode 100644 Silicon/NXP/Include/NorFlash.h
create mode 100644 Silicon/NXP/Library/NorFlashLib/CfiCommand.h
create mode 100644 Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.c
create mode 100644 Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.h
create mode 100644 Silicon/NXP/Library/NorFlashLib/NorFlashLib.c
create mode 100644 Silicon/NXP/Library/NorFlashLib/NorFlashLib.inf
diff --git a/Silicon/NXP/Include/Library/NorFlashLib.h b/Silicon/NXP/Include/Library/NorFlashLib.h
new file mode 100644
index 0000000..defdc61
--- /dev/null
+++ b/Silicon/NXP/Include/Library/NorFlashLib.h
@@ -0,0 +1,77 @@
+/** @file
+
+ Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
+ Copyright (c) 2016, Freescale Semiconductor. All rights reserved.
+ Copyright 2017 NXP
+
+This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ **/
+
+#ifndef _NOR_FLASH_LIB_H_
+#define _NOR_FLASH_LIB_H_
+
+#include <NorFlash.h>
+
+#define NOR_FLASH_DEVICE_COUNT 1
+
+typedef struct {
+ UINTN DeviceBaseAddress; // Start address of the Device Base Address (DBA)
+ UINTN RegionBaseAddress; // Start address of one single region
+ UINTN Size;
+ UINTN BlockSize;
+ UINTN MultiByteWordCount; // Maximum Word count that can be written to Nor Flash in multi byte write
+ UINTN WordWriteTimeOut; // single byte/word timeout usec
+ UINTN BufferWriteTimeOut; // buffer write timeout usec
+ UINTN BlockEraseTimeOut; // block erase timeout usec
+ UINTN ChipEraseTimeOut; // chip erase timeout usec
+} NorFlashDescription;
+
+EFI_STATUS
+NorFlashPlatformGetDevices (
+ OUT NorFlashDescription **NorFlashDevices,
+ OUT UINT32 *Count
+ );
+
+EFI_STATUS
+NorFlashPlatformFlashGetAttributes (
+ OUT NorFlashDescription *NorFlashDevices,
+ IN UINT32 Count
+ );
+
+EFI_STATUS
+NorFlashPlatformWriteBuffer (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ );
+
+EFI_STATUS
+NorFlashPlatformEraseSector (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN UINTN SectorAddress
+ );
+
+EFI_STATUS
+NorFlashPlatformRead (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN UINTN BufferSizeInBytes,
+ OUT UINT8 *Buffer
+ );
+
+EFI_STATUS
+NorFlashPlatformReset (
+ IN UINTN Instance
+ );
+
+#endif /* _NOR_FLASH_LIB_H_ */
diff --git a/Silicon/NXP/Include/NorFlash.h b/Silicon/NXP/Include/NorFlash.h
new file mode 100644
index 0000000..8fa41d8
--- /dev/null
+++ b/Silicon/NXP/Include/NorFlash.h
@@ -0,0 +1,44 @@
+/** @NorFlash.h
+
+ Contains data structure shared by both NOR Library and Driver.
+ Copyright 2017 NXP
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __NOR_FLASH_H__
+#define __NOR_FLASH_H__
+
+#include <Protocol/BlockIo.h>
+#include <Protocol/FirmwareVolumeBlock.h>
+
+typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
+
+typedef struct {
+ VENDOR_DEVICE_PATH Vendor;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} NOR_FLASH_DEVICE_PATH;
+
+struct _NOR_FLASH_INSTANCE {
+ UINT32 Signature;
+ EFI_HANDLE Handle;
+ UINTN DeviceBaseAddress;
+ UINTN RegionBaseAddress;
+ UINTN Size;
+ EFI_LBA StartLba;
+ EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;
+ EFI_BLOCK_IO_MEDIA Media;
+ EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;
+ VOID* ShadowBuffer;
+ NOR_FLASH_DEVICE_PATH DevicePath;
+};
+
+
+#endif /* __NOR_FLASH_H__ */
diff --git a/Silicon/NXP/Library/NorFlashLib/CfiCommand.h b/Silicon/NXP/Library/NorFlashLib/CfiCommand.h
new file mode 100644
index 0000000..8543227
--- /dev/null
+++ b/Silicon/NXP/Library/NorFlashLib/CfiCommand.h
@@ -0,0 +1,99 @@
+/** @CfiCommand.h
+
+ Copyright 2017 NXP
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __CFI_COMMAND_H__
+#define __CFI_COMMAND_H__
+
+// CFI Data "QRY"
+#define CFI_QRY_Q 0x51
+#define CFI_QRY_R 0x52
+#define CFI_QRY_Y 0x59
+#define CFI_QRY 0x515259
+
+#define ENTER_CFI_QUERY_MODE_ADDR 0x0055
+#define ENTER_CFI_QUERY_MODE_CMD 0x0098
+
+#define CFI_QUERY_UNIQUE_QRY_STRING 0x10
+
+// Offsets for CFI queries
+#define CFI_QUERY_TYP_TIMEOUT_WORD_WRITE 0x1F
+#define CFI_QUERY_TYP_TIMEOUT_MAX_BUFFER_WRITE 0x20
+#define CFI_QUERY_TYP_TIMEOUT_BLOCK_ERASE 0x21
+#define CFI_QUERY_TYP_TIMEOUT_CHIP_ERASE 0x22
+#define CFI_QUERY_MAX_TIMEOUT_WORD_WRITE 0x23
+#define CFI_QUERY_MAX_TIMEOUT_MAX_BUFFER_WRITE 0x24
+#define CFI_QUERY_MAX_TIMEOUT_BLOCK_ERASE 0x25
+#define CFI_QUERY_MAX_TIMEOUT_CHIP_ERASE 0x26
+#define CFI_QUERY_DEVICE_SIZE 0x27
+#define CFI_QUERY_MAX_NUM_BYTES_WRITE 0x2A
+#define CFI_QUERY_BLOCK_SIZE 0x2F
+
+// Unlock Address
+#define CMD_UNLOCK_1_ADDR 0x555
+#define CMD_UNLOCK_2_ADDR 0x2AA
+
+// RESET Command
+#define CMD_RESET_FIRST 0xAA
+#define CMD_RESET_SECOND 0x55
+#define CMD_RESET 0xF0
+
+// READ Command
+
+// Manufacturer ID
+#define CMD_READ_M_ID_FIRST 0xAA
+#define CMD_READ_M_ID_SECOND 0x55
+#define CMD_READ_M_ID_THIRD 0x90
+#define CMD_READ_M_ID_FOURTH 0x01
+
+// Device ID
+#define CMD_READ_D_ID_FIRST 0xAA
+#define CMD_READ_D_ID_SECOND 0x55
+#define CMD_READ_D_ID_THIRD 0x90
+#define CMD_READ_D_ID_FOURTH 0x7E
+#define CMD_READ_D_ID_FIFTH 0x13
+#define CMD_READ_D_ID_SIXTH 0x00
+
+// WRITE Command
+
+// PROGRAM Command
+#define CMD_PROGRAM_FIRST 0xAA
+#define CMD_PROGRAM_SECOND 0x55
+#define CMD_PROGRAM_THIRD 0xA0
+
+// Write Buffer Command
+#define CMD_WRITE_TO_BUFFER_FIRST 0xAA
+#define CMD_WRITE_TO_BUFFER_SECOND 0x55
+#define CMD_WRITE_TO_BUFFER_THIRD 0x25
+#define CMD_WRITE_TO_BUFFER_CONFIRM 0x29
+
+// ERASE Command
+
+// UNLOCK COMMANDS FOR ERASE
+#define CMD_ERASE_FIRST 0xAA
+#define CMD_ERASE_SECOND 0x55
+#define CMD_ERASE_THIRD 0x80
+#define CMD_ERASE_FOURTH 0xAA
+#define CMD_ERASE_FIFTH 0x55
+
+// Chip Erase Command
+#define CMD_CHIP_ERASE_SIXTH 0x10
+
+// Sector Erase Command
+#define CMD_SECTOR_ERASE_SIXTH 0x30
+
+// SUSPEND Command
+#define CMD_PROGRAM_OR_ERASE_SUSPEND 0xB0
+#define CMD_PROGRAM_OR_ERASE_RESUME 0x30
+
+#endif // __CFI_COMMAND_H__
diff --git a/Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.c b/Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.c
new file mode 100644
index 0000000..941d5d4
--- /dev/null
+++ b/Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.c
@@ -0,0 +1,210 @@
+/** @CfiNorFlashLib.c
+
+ Copyright (c) 2015, Freescale Semiconductor, Inc. All rights reserved.
+ Copyright 2017 NXP
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ **/
+
+#include <PiDxe.h>
+#include <Library/ArmLib.h>
+#include <Library/BaseLib.h>
+
+#include "CfiCommand.h"
+#include "CfiNorFlashLib.h"
+
+STATIC
+VOID
+NorFlashReadCfiData (
+ IN UINTN DeviceBaseAddress,
+ IN UINTN CfiOffset,
+ IN UINT32 Count,
+ OUT VOID *Data
+ )
+{
+ UINT32 Loop;
+ FLASH_DATA *TmpData = (FLASH_DATA *)Data;
+
+ for (Loop = 0; Loop < Count; Loop++, TmpData++) {
+ *TmpData = mMmioOps->Read ((UINTN)((FLASH_DATA*)DeviceBaseAddress + CfiOffset));
+ CfiOffset++;
+ }
+}
+
+/*
+ Currently we support only CFI flash devices; Bail-out otherwise
+*/
+EFI_STATUS
+CfiNorFlashFlashGetAttributes (
+ OUT NorFlashDescription *NorFlashDevices,
+ IN UINT32 Index
+ )
+{
+ UINT32 Count;
+ FLASH_DATA QryData[QRY_STRING_COUNT];
+ FLASH_DATA BlockSize[BLOCK_SIZE_COUNT];
+ UINTN DeviceBaseAddress;
+ FLASH_DATA MaxNumBytes[BLOCK_SIZE_COUNT];
+ FLASH_DATA Size;
+ FLASH_DATA HighByteMask; // Masks High byte in a UIN16 word
+ FLASH_DATA HighByteShift; // Bitshifts needed to make a byte High Byte in a UIN16 word
+ FLASH_DATA Temp1;
+ FLASH_DATA Temp2;
+ FLASH_DATA Z;
+
+ HighByteMask = 0xFF;
+ HighByteShift = 8;
+
+ for (Count = 0; Count < Index; Count++) {
+
+ NorFlashDevices[Count].DeviceBaseAddress = DeviceBaseAddress = PcdGet64 (PcdFlashDeviceBase64);
+
+ // Reset flash first
+ NorFlashPlatformReset (DeviceBaseAddress);
+
+ // Enter the CFI Query Mode
+ SEND_NOR_COMMAND (
+ DeviceBaseAddress,
+ ENTER_CFI_QUERY_MODE_ADDR,
+ ENTER_CFI_QUERY_MODE_CMD
+ );
+
+ MemoryFence();
+
+ // Query the unique QRY
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_UNIQUE_QRY_STRING,
+ QRY_STRING_COUNT,
+ &QryData
+ );
+
+ if ((QryData[0] != (FLASH_DATA)CFI_QRY_Q) ||
+ (QryData[1] != (FLASH_DATA)CFI_QRY_R) ||
+ (QryData[2] != (FLASH_DATA)CFI_QRY_Y)) {
+ DEBUG ((DEBUG_ERROR, "Not a CFI flash (QRY not recvd): "
+ "Got = 0x%04x, 0x%04x, 0x%04x\n",
+ QryData[0], QryData[1], QryData[2]));
+ return EFI_DEVICE_ERROR;
+ }
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_DEVICE_SIZE,
+ DEVICE_SIZE_COUNT,
+ &Size
+ );
+
+ // Refer CFI Specification [2^n in number of bytes.]
+ NorFlashDevices[Count].Size = 1 << Size;
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_BLOCK_SIZE,
+ BLOCK_SIZE_COUNT,
+ &BlockSize
+ );
+
+ // Refer CFI Specification [Erase block(s) within this region are (z) times 256 bytes in size.
+ // The value z = 0 is used for 128-byte block size.
+ Z = (FLASH_DATA)((BlockSize[1] << HighByteShift) | (BlockSize[0] & HighByteMask));
+ if (Z == 0) {
+ NorFlashDevices[Count].BlockSize = 128;
+ } else {
+ NorFlashDevices[Count].BlockSize = 256 * Z;
+ }
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_MAX_NUM_BYTES_WRITE,
+ BLOCK_SIZE_COUNT,
+ &MaxNumBytes
+ );
+
+ // Refer CFI Specification
+ /* from CFI query we get the Max. number of BYTE in multi-byte write = 2^N.
+ But our Flash Library is able to read/write in WORD size (2 bytes) which
+ is why we need to CONVERT MAX BYTES TO MAX WORDS by diving it by
+ width of word size */
+ NorFlashDevices[Count].MultiByteWordCount =\
+ (1 << ((FLASH_DATA)((MaxNumBytes[1] << HighByteShift) |
+ (MaxNumBytes[0] & HighByteMask))))/sizeof(FLASH_DATA);
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_TYP_TIMEOUT_WORD_WRITE,
+ WORD_WRITE_COUNT,
+ &Temp1
+ );
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_MAX_TIMEOUT_WORD_WRITE,
+ WORD_WRITE_COUNT,
+ &Temp2
+ );
+
+ NorFlashDevices[Count].WordWriteTimeOut = (1U << Temp1) * (1U << Temp2);
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_TYP_TIMEOUT_MAX_BUFFER_WRITE,
+ BUFFER_WRITE_COUNT,
+ &Temp1
+ );
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_MAX_TIMEOUT_MAX_BUFFER_WRITE,
+ BUFFER_WRITE_COUNT,
+ &Temp2
+ );
+
+ NorFlashDevices[Count].BufferWriteTimeOut = (1U << Temp1) * (1U << Temp2);
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_TYP_TIMEOUT_BLOCK_ERASE,
+ BLOCK_ERASE_COUNT,
+ &Temp1
+ );
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_MAX_TIMEOUT_BLOCK_ERASE,
+ BLOCK_ERASE_COUNT,
+ &Temp2
+ );
+
+ // Converting from millisecond to microseconds
+ NorFlashDevices[Count].BlockEraseTimeOut = (1U << Temp1) * (1U << Temp2) * 1000;
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_TYP_TIMEOUT_CHIP_ERASE,
+ CHIP_ERASE_COUNT,
+ &Temp1
+ );
+
+ NorFlashReadCfiData (
+ DeviceBaseAddress,
+ CFI_QUERY_MAX_TIMEOUT_CHIP_ERASE,
+ CHIP_ERASE_COUNT,
+ &Temp2
+ );
+
+ NorFlashDevices[Count].ChipEraseTimeOut = (1U << Temp1) * (1U << Temp2) * 1000;
+
+ // Put device back into Read Array mode (via Reset)
+ NorFlashPlatformReset (DeviceBaseAddress);
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.h b/Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.h
new file mode 100644
index 0000000..710f706
--- /dev/null
+++ b/Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.h
@@ -0,0 +1,53 @@
+/** @CfiNorFlashLib.h
+
+ Copyright (c) 2015, Freescale Semiconductor, Inc. All rights reserved.
+ Copyright 2017 NXP
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __CFI_NOR_FLASH_LIB_H__
+#define __CFI_NOR_FLASH_LIB_H__
+
+#include <Library/DebugLib.h>
+#include <Library/IoAccessLib.h>
+#include <Library/NorFlashLib.h>
+
+extern MMIO_OPERATIONS_16 *mMmioOps;
+
+/*
+ * Values for the width of the port
+ */
+#define FLASH_CFI_8BIT 0x01
+#define FLASH_CFI_16BIT 0x02
+#define FLASH_CFI_32BIT 0x04
+#define FLASH_CFI_64BIT 0x08
+
+#define QRY_STRING_COUNT 3
+#define DEVICE_SIZE_COUNT 1
+#define BLOCK_SIZE_COUNT 2
+#define WORD_WRITE_COUNT 1
+#define BUFFER_WRITE_COUNT 1
+#define BLOCK_ERASE_COUNT 1
+#define CHIP_ERASE_COUNT 1
+
+#define CREATE_BYTE_OFFSET(OffsetAddr) ((sizeof (FLASH_DATA)) * (OffsetAddr))
+#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr) ((BaseAddr) + (OffsetAddr))
+#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd) mMmioOps->Write (CREATE_NOR_ADDRESS (BaseAddr, CREATE_BYTE_OFFSET (Offset)), (Cmd))
+
+typedef UINT16 FLASH_DATA;
+
+EFI_STATUS
+CfiNorFlashFlashGetAttributes (
+ OUT NorFlashDescription *NorFlashDevices,
+ IN UINT32 Index
+ );
+
+#endif //__CFI_NOR_FLASH_LIB_H__
diff --git a/Silicon/NXP/Library/NorFlashLib/NorFlashLib.c b/Silicon/NXP/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index 0000000..c89ddc3
--- /dev/null
+++ b/Silicon/NXP/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,696 @@
+/** @NorFlashLib.c
+
+ Based on NorFlash implementation available in NorFlashDxe.c
+
+ Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
+ Copyright (c) 2015, Freescale Semiconductor, Inc. All rights reserved.
+ Copyright 2017 NXP
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiDxe.h>
+#include <Library/BaseMemoryLib/MemLibInternals.h>
+#include <Library/IoAccessLib.h>
+#include <Library/IoLib.h>
+#include <Library/TimerLib.h>
+
+#include "CfiCommand.h"
+#include "CfiNorFlashLib.h"
+
+#define GET_BLOCK_OFFSET(Lba) ((Instance->RegionBaseAddress) -\
+ (Instance->DeviceBaseAddress) + ((UINTN)((Lba) * Instance->Media.BlockSize)))
+
+MMIO_OPERATIONS_16 *mMmioOps;
+
+NorFlashDescription mNorFlashDevices[NOR_FLASH_DEVICE_COUNT];
+
+STATIC VOID
+UnlockEraseAddress (
+ IN UINTN DeviceBaseAddress
+ )
+{ // Issue the Unlock cmds
+ SEND_NOR_COMMAND (DeviceBaseAddress, CMD_UNLOCK_1_ADDR, CMD_ERASE_FIRST);
+
+ SEND_NOR_COMMAND (DeviceBaseAddress, CMD_UNLOCK_2_ADDR, CMD_ERASE_SECOND);
+
+ // Issue a setup command
+ SEND_NOR_COMMAND (DeviceBaseAddress, CMD_UNLOCK_1_ADDR, CMD_ERASE_THIRD);
+
+ // Issue the Unlock cmds
+ SEND_NOR_COMMAND (DeviceBaseAddress, CMD_UNLOCK_1_ADDR, CMD_ERASE_FOURTH);
+
+ SEND_NOR_COMMAND (DeviceBaseAddress, CMD_UNLOCK_2_ADDR, CMD_ERASE_FIFTH);
+
+ return;
+}
+
+STATIC
+UINT64
+ConvertMicroSecondsToTicks (
+ IN UINTN MicroSeconds
+ )
+{
+ UINT64 TimerTicks64;
+
+ TimerTicks64 = 0;
+
+ // Calculate counter ticks that represent requested delay:
+ // = MicroSeconds x TICKS_PER_MICRO_SEC
+ // = MicroSeconds x Timer Frequency(in Hz) x 10^-6
+ // GetPerformanceCounterProperties = Get Arm Timer Frequency in Hz
+ TimerTicks64 = DivU64x32 (
+ MultU64x64 (
+ MicroSeconds,
+ GetPerformanceCounterProperties (NULL, NULL)
+ ),
+ 1000000U
+ );
+ return TimerTicks64;
+}
+
+/**
+ * The following function erases a NOR flash sector.
+ **/
+EFI_STATUS
+NorFlashPlatformEraseSector (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN UINTN SectorAddress
+ )
+{
+ FLASH_DATA EraseStatus1;
+ FLASH_DATA EraseStatus2;
+ UINT64 Timeout;
+ UINT64 SystemCounterVal;
+
+ EraseStatus1 = 0;
+ EraseStatus2 = 0;
+ Timeout = 0;
+
+ Timeout = ConvertMicroSecondsToTicks (mNorFlashDevices[Instance->Media.MediaId].BlockEraseTimeOut);
+
+ // Request a sector erase by writing two unlock cycles, followed by a
+ // setup command and two additional unlock cycles
+
+ UnlockEraseAddress (Instance->DeviceBaseAddress);
+
+ // Now send the address of the sector to be erased
+ SEND_NOR_COMMAND (SectorAddress, 0, CMD_SECTOR_ERASE_SIXTH);
+
+ // Wait for erase to complete
+ // Read Sector start address twice to detect bit toggle and to
+ // determine ERASE DONE (all bits are 1)
+ // Get the maximum timer ticks needed to complete the operation
+ // Check if operation is complete or not in continous loop?
+ // if complete, exit from loop
+ // if not check the ticks that have been passed from the begining of loop
+ // if Maximum Ticks allocated for operation has passed exit from loop
+
+ SystemCounterVal = GetPerformanceCounter ();
+ Timeout += SystemCounterVal;
+ while (SystemCounterVal < Timeout) {
+ if ((EraseStatus1 = mMmioOps->Read (SectorAddress))
+ == (EraseStatus2 = mMmioOps->Read (SectorAddress)))
+ {
+ if (mMmioOps->Read (SectorAddress) == 0xFFFF) {
+ break;
+ }
+ }
+ SystemCounterVal = GetPerformanceCounter ();
+ }
+
+ if (SystemCounterVal >= Timeout) {
+ DEBUG ((DEBUG_ERROR, "%a :Failed to Erase @ SectorAddress 0x%p, Timeout\n",
+ __FUNCTION__, SectorAddress));
+ return EFI_DEVICE_ERROR;
+ } else {
+ return EFI_SUCCESS;
+ }
+}
+
+EFI_STATUS
+NorFlashPlatformWriteWord (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN UINTN WordOffset,
+ IN FLASH_DATA Word
+ )
+{
+ UINT64 Timeout;
+ UINTN TargetAddress;
+ UINT64 SystemCounterVal;
+ FLASH_DATA Read1;
+ FLASH_DATA Read2;
+
+ Timeout = 0;
+
+ Timeout = ConvertMicroSecondsToTicks (mNorFlashDevices[Instance->Media.MediaId].WordWriteTimeOut);
+
+ TargetAddress = CREATE_NOR_ADDRESS (
+ Instance->DeviceBaseAddress,
+ CREATE_BYTE_OFFSET (WordOffset)
+ );
+
+ // Issue the Unlock cmds
+ SEND_NOR_COMMAND (Instance->DeviceBaseAddress, CMD_UNLOCK_1_ADDR, CMD_PROGRAM_FIRST);
+
+ SEND_NOR_COMMAND (Instance->DeviceBaseAddress, CMD_UNLOCK_2_ADDR, CMD_PROGRAM_SECOND);
+
+ SEND_NOR_COMMAND (Instance->DeviceBaseAddress, CMD_UNLOCK_1_ADDR, CMD_PROGRAM_THIRD);
+
+ MmioWrite16 (TargetAddress, Word);
+
+ // Wait for Write to Complete
+ // Read the last written address twice to detect bit toggle and
+ // to determine if date is wriiten successfully or not ?
+ // Get the maximum timer ticks needed to complete the operation
+ // Check if operation is complete or not in continous loop?
+ // if complete, exit from loop
+ // if not check the ticks that have been passed from the begining of loop
+ // if Maximum Ticks allocated for operation has passed, then exit from loop
+
+ SystemCounterVal = GetPerformanceCounter ();
+ Timeout += SystemCounterVal;
+ while (SystemCounterVal < Timeout) {
+ if ((Read1 = MmioRead16 (TargetAddress))
+ == (Read2 = MmioRead16 (TargetAddress)))
+ {
+ if (Word == MmioRead16 (TargetAddress)) {
+ break;
+ }
+ }
+ SystemCounterVal = GetPerformanceCounter ();
+ }
+
+ if (SystemCounterVal >= Timeout) {
+ DEBUG ((DEBUG_ERROR, "%a: Failed to Write @ TargetAddress 0x%p, Timeout\n",
+ __FUNCTION__, TargetAddress));
+ return EFI_DEVICE_ERROR;
+ } else {
+ return EFI_SUCCESS;
+ }
+}
+
+EFI_STATUS
+NorFlashPlatformWritePageBuffer (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN UINTN PageBufferOffset,
+ IN UINTN NumWords,
+ IN FLASH_DATA *Buffer
+ )
+{
+ UINT64 Timeout;
+ UINTN LastWrittenAddress;
+ FLASH_DATA LastWritenData;
+ UINTN CurrentOffset;
+ UINTN EndOffset;
+ UINTN TargetAddress;
+ UINT64 SystemCounterVal;
+ FLASH_DATA Read1;
+ FLASH_DATA Read2;
+
+ // Initialize variables
+ Timeout = 0;
+ LastWrittenAddress = 0;
+ LastWritenData = 0;
+ CurrentOffset = PageBufferOffset;
+ EndOffset = PageBufferOffset + NumWords - 1;
+ Timeout = ConvertMicroSecondsToTicks (mNorFlashDevices[Instance->Media.MediaId].BufferWriteTimeOut);
+ TargetAddress = CREATE_NOR_ADDRESS (
+ Instance->DeviceBaseAddress,
+ CREATE_BYTE_OFFSET (CurrentOffset)
+ );
+
+ // don't try with a count of zero
+ if (!NumWords) {
+ return EFI_SUCCESS;
+ } else if (NumWords == 1) {
+ return NorFlashPlatformWriteWord (Instance, PageBufferOffset, *Buffer);
+ }
+
+ // Issue the Unlock cmds
+ SEND_NOR_COMMAND (Instance->DeviceBaseAddress, CMD_UNLOCK_1_ADDR, CMD_WRITE_TO_BUFFER_FIRST);
+
+ SEND_NOR_COMMAND (Instance->DeviceBaseAddress, CMD_UNLOCK_2_ADDR, CMD_WRITE_TO_BUFFER_SECOND);
+
+ // Write the buffer load
+ SEND_NOR_COMMAND (TargetAddress, 0, CMD_WRITE_TO_BUFFER_THIRD);
+
+ // Write # of locations to program
+ SEND_NOR_COMMAND (TargetAddress, 0, (NumWords - 1));
+
+ // Load Data into Buffer
+ while (CurrentOffset <= EndOffset) {
+ LastWrittenAddress = CREATE_NOR_ADDRESS (
+ Instance->DeviceBaseAddress,
+ CREATE_BYTE_OFFSET (CurrentOffset++)
+ );
+ LastWritenData = *Buffer++;
+
+ // Write Data
+ MmioWrite16 (LastWrittenAddress, LastWritenData);
+ }
+
+ // Issue the Buffered Program Confirm command
+ SEND_NOR_COMMAND (TargetAddress, 0, CMD_WRITE_TO_BUFFER_CONFIRM);
+
+ /* Wait for Write to Complete
+ Read the last written address twice to detect bit toggle and
+ to determine if date is wriiten successfully or not ?
+ Get the maximum timer ticks needed to complete the operation
+ Check if operation is complete or not in continous loop?
+ if complete, exit from loop
+ if not check the ticks that have been passed from the begining of loop
+ if Maximum Ticks allocated for operation has passed, then exit from loop **/
+ SystemCounterVal = GetPerformanceCounter();
+ Timeout += SystemCounterVal;
+ while (SystemCounterVal < Timeout) {
+ if ((Read1 = MmioRead16 (LastWrittenAddress))
+ == (Read2 = MmioRead16 (LastWrittenAddress)))
+ {
+ if (LastWritenData == MmioRead16 (LastWrittenAddress)) {
+ break;
+ }
+ }
+ SystemCounterVal = GetPerformanceCounter ();
+ }
+
+ if (SystemCounterVal >= Timeout) {
+ DEBUG ((DEBUG_ERROR, "%a: Failed to Write @LastWrittenAddress 0x%p, Timeout\n",
+ __FUNCTION__, LastWrittenAddress));
+ return EFI_DEVICE_ERROR;
+ } else {
+ return EFI_SUCCESS;
+ }
+}
+
+EFI_STATUS
+NorFlashPlatformWriteWordAlignedAddressBuffer (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN UINTN Offset,
+ IN UINTN NumWords,
+ IN FLASH_DATA *Buffer
+ )
+{
+ EFI_STATUS Status;
+ UINTN MultiByteWordCount;
+ UINTN Mask;
+ UINTN IntWords;
+
+ MultiByteWordCount = mNorFlashDevices[Instance->Media.MediaId].MultiByteWordCount;
+ Mask = MultiByteWordCount - 1;
+ IntWords = NumWords;
+ Status = EFI_SUCCESS;
+
+ if (Offset & Mask) {
+ // program only as much as necessary, so pick the lower of the two numbers
+ if (NumWords < (MultiByteWordCount - (Offset & Mask))) {
+ IntWords = NumWords;
+ } else {
+ IntWords = MultiByteWordCount - (Offset & Mask);
+ }
+
+ // program the first few to get write buffer aligned
+ Status = NorFlashPlatformWritePageBuffer (Instance, Offset, IntWords, Buffer);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Offset += IntWords; // adjust pointers and counter
+ NumWords -= IntWords;
+ Buffer += IntWords;
+
+ if (NumWords == 0) {
+ return Status;
+ }
+ }
+
+ while (NumWords >= MultiByteWordCount) {// while big chunks to do
+ Status = NorFlashPlatformWritePageBuffer (
+ Instance,
+ Offset,
+ MultiByteWordCount,
+ Buffer
+ );
+ if (EFI_ERROR (Status)) {
+ return (Status);
+ }
+
+ Offset += MultiByteWordCount; // adjust pointers and counter
+ NumWords -= MultiByteWordCount;
+ Buffer += MultiByteWordCount;
+ }
+ if (NumWords == 0) {
+ return (Status);
+ }
+
+ Status = NorFlashPlatformWritePageBuffer (
+ Instance,
+ Offset,
+ NumWords,
+ Buffer
+ );
+ return (Status);
+}
+
+/**
+ Writes data to the NOR Flash using the Buffered Programming method.
+
+ Write Buffer Programming allows the system to write a maximum of 32 bytes
+ in one programming operation. Therefore this function will only handle
+ buffers up to 32 bytes.
+ To deal with larger buffers, call this function again.
+**/
+EFI_STATUS
+NorFlashPlatformWriteBuffer (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ )
+{
+ EFI_STATUS Status;
+ FLASH_DATA *SrcBuffer;
+ UINTN TargetOffsetinBytes;
+ UINTN WordsToWrite;
+ UINTN Mask;
+ UINTN BufferSizeInBytes;
+ UINTN IntBytes;
+ VOID *CopyFrom;
+ VOID *CopyTo;
+ FLASH_DATA TempWrite;
+
+ SrcBuffer = (FLASH_DATA *)Buffer;
+ TargetOffsetinBytes = 0;
+ WordsToWrite = 0;
+ Mask = sizeof (FLASH_DATA) - 1;
+ BufferSizeInBytes = *NumBytes;
+ IntBytes = BufferSizeInBytes; // Intermediate Bytes needed to copy for alignment
+ TempWrite = 0;
+
+ DEBUG ((DEBUG_BLKIO, "%a(Parameters: Lba=%ld, Offset=0x%x, "
+ "*NumBytes=0x%x, Buffer @ 0x%08x)\n",
+ __FUNCTION__, Lba, Offset, *NumBytes, Buffer));
+
+ TargetOffsetinBytes = GET_BLOCK_OFFSET (Lba) + (UINTN)(Offset);
+
+ if (TargetOffsetinBytes & Mask) {
+ // Write only as much as necessary, so pick the lower of the two numbers
+ // and call it Intermediate bytes to write to make alignment proper
+ if (BufferSizeInBytes < (sizeof (FLASH_DATA) - (TargetOffsetinBytes & Mask))) {
+ IntBytes = BufferSizeInBytes;
+ } else {
+ IntBytes = sizeof (FLASH_DATA) - (TargetOffsetinBytes & Mask);
+ }
+
+ // Read the first few to get Read buffer aligned
+ NorFlashPlatformRead (
+ Instance,
+ Lba,
+ (TargetOffsetinBytes & ~Mask) - GET_BLOCK_OFFSET (Lba),
+ sizeof (TempWrite),
+ (UINT8*)&TempWrite
+ );
+
+ CopyTo = (UINT8*)&TempWrite;
+ CopyTo += (TargetOffsetinBytes & Mask);
+ CopyFrom = Buffer;
+
+ CopyMem (CopyTo, CopyFrom, IntBytes);
+
+ Status = NorFlashPlatformWriteWordAlignedAddressBuffer (
+ Instance,
+ (UINTN)((TargetOffsetinBytes & ~Mask) / sizeof (FLASH_DATA)),
+ 1,
+ &TempWrite);
+ if (EFI_ERROR (Status)) {
+ DEBUG((DEBUG_ERROR, "%a : Failed to Write @TargetOffset 0x%x (0x%x)\n",
+ __FUNCTION__, TargetOffsetinBytes, Status));
+ goto EXIT;
+ }
+
+ TargetOffsetinBytes += IntBytes; /* adjust pointers and counter */
+ BufferSizeInBytes -= IntBytes;
+ Buffer += IntBytes;
+
+ if (BufferSizeInBytes == 0) {
+ goto EXIT;
+ }
+ }
+
+ // Write the bytes to CFI width aligned address.
+ // Note we can Write number of bytes=CFI width in one operation
+ WordsToWrite = BufferSizeInBytes / sizeof (FLASH_DATA);
+ SrcBuffer = (FLASH_DATA*)Buffer;
+
+ Status = NorFlashPlatformWriteWordAlignedAddressBuffer (
+ Instance,
+ (UINTN)(TargetOffsetinBytes/sizeof (FLASH_DATA)),
+ WordsToWrite,
+ SrcBuffer);
+ if (EFI_ERROR(Status)) {
+ DEBUG((DEBUG_ERROR, "%a : Failed to Write @ TargetOffset 0x%x (0x%x)\n",
+ __FUNCTION__, TargetOffsetinBytes, Status));
+ goto EXIT;
+ }
+
+ BufferSizeInBytes -= (WordsToWrite * sizeof (FLASH_DATA));
+ Buffer += (WordsToWrite*sizeof (FLASH_DATA));
+ TargetOffsetinBytes += (WordsToWrite * sizeof (FLASH_DATA));
+
+ if (BufferSizeInBytes == 0) {
+ goto EXIT;
+ }
+
+ // Now Write bytes that are remaining and are less than CFI width.
+ // Read the first few to get Read buffer aligned
+ NorFlashPlatformRead (
+ Instance,
+ Lba,
+ TargetOffsetinBytes - GET_BLOCK_OFFSET (Lba),
+ sizeof (TempWrite),
+ (UINT8*)&TempWrite);
+
+ CopyFrom = Buffer;
+ CopyTo = &TempWrite;
+
+ CopyMem (CopyTo, CopyFrom, BufferSizeInBytes);
+
+ Status = NorFlashPlatformWriteWordAlignedAddressBuffer (
+ Instance,
+ (UINTN)(TargetOffsetinBytes/sizeof (FLASH_DATA)),
+ 1,
+ &TempWrite
+ );
+
+ if (EFI_ERROR(Status)) {
+ DEBUG((DEBUG_ERROR, "%a: Failed to Write @TargetOffset 0x%x Status=%d\n",
+ __FUNCTION__, TargetOffsetinBytes, Status));
+ goto EXIT;
+ }
+
+EXIT:
+ // Put device back into Read Array mode (via Reset)
+ NorFlashPlatformReset (Instance->DeviceBaseAddress);
+ return (Status);
+}
+
+EFI_STATUS
+NorFlashPlatformRead (
+ IN NOR_FLASH_INSTANCE *Instance,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN UINTN BufferSizeInBytes,
+ OUT UINT8 *Buffer
+ )
+{
+ UINTN IntBytes;
+ UINTN Mask;
+ FLASH_DATA TempRead;
+ VOID *CopyFrom;
+ VOID *CopyTo;
+ UINTN TargetOffsetinBytes;
+ FLASH_DATA *ReadData;
+ UINTN BlockSize;
+
+ IntBytes = BufferSizeInBytes; //Intermediate Bytes needed to copy for alignment
+ Mask = sizeof (FLASH_DATA) - 1;
+ TempRead = 0;
+ TargetOffsetinBytes = (UINTN)(GET_BLOCK_OFFSET (Lba) + Offset);
+ BlockSize = Instance->Media.BlockSize;
+
+ DEBUG ((DEBUG_BLKIO, "%a(Parameters: Lba=%ld, Offset=0x%x,"
+ " BufferSizeInBytes=0x%x, Buffer @ 0x%p)\n",
+ __FUNCTION__, Lba, Offset, BufferSizeInBytes, Buffer));
+
+ // The buffer must be valid
+ if (Buffer == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ // Return if we have not any byte to read
+ if (BufferSizeInBytes == 0) {
+ return EFI_SUCCESS;
+ }
+
+ if (((Lba * BlockSize) + BufferSizeInBytes) > Instance->Size) {
+ DEBUG ((DEBUG_ERROR, "%a : Read will exceed device size.\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ // Put device back into Read Array mode (via Reset)
+ NorFlashPlatformReset (Instance->DeviceBaseAddress);
+
+ // First Read bytes to make buffer aligned to CFI width
+ if (TargetOffsetinBytes & Mask) {
+ // Read only as much as necessary, so pick the lower of the two numbers
+ if (BufferSizeInBytes < (sizeof (FLASH_DATA) - (TargetOffsetinBytes & Mask))) {
+ IntBytes = BufferSizeInBytes;
+ } else {
+ IntBytes = sizeof (FLASH_DATA) - (TargetOffsetinBytes & Mask);
+ }
+
+ // Read the first few to get Read buffer aligned
+ TempRead = MmioRead16 (
+ CREATE_NOR_ADDRESS (
+ Instance->DeviceBaseAddress,
+ CREATE_BYTE_OFFSET ((TargetOffsetinBytes & ~Mask) / sizeof (FLASH_DATA))
+ )
+ );
+
+ CopyFrom = (UINT8*)&TempRead;
+ CopyFrom += (TargetOffsetinBytes & Mask);
+ CopyTo = Buffer;
+
+ CopyMem (CopyTo, CopyFrom, IntBytes);
+
+ TargetOffsetinBytes += IntBytes; // adjust pointers and counter
+ BufferSizeInBytes -= IntBytes;
+ Buffer += IntBytes;
+ if (BufferSizeInBytes == 0) {
+ return EFI_SUCCESS;
+ }
+ }
+
+ ReadData = (FLASH_DATA*)Buffer;
+
+ // Readout the bytes from CFI width aligned address.
+ // Note we can read number of bytes=CFI width in one operation
+ while (BufferSizeInBytes >= sizeof (FLASH_DATA)) {
+ *ReadData = MmioRead16 (
+ CREATE_NOR_ADDRESS (
+ Instance->DeviceBaseAddress,
+ CREATE_BYTE_OFFSET (TargetOffsetinBytes / sizeof (FLASH_DATA))
+ )
+ );
+ ReadData += 1;
+ BufferSizeInBytes -= sizeof (FLASH_DATA);
+ TargetOffsetinBytes += sizeof (FLASH_DATA);
+ }
+
+ if (BufferSizeInBytes == 0) {
+ return EFI_SUCCESS;
+ }
+
+ // Now read bytes that are remaining and are less than CFI width.
+ CopyTo = ReadData;
+ // Read the first few to get Read buffer aligned
+ TempRead = MmioRead16 (
+ CREATE_NOR_ADDRESS (
+ Instance->DeviceBaseAddress,
+ CREATE_BYTE_OFFSET (TargetOffsetinBytes/sizeof (FLASH_DATA))
+ )
+ );
+ CopyFrom = &TempRead;
+
+ CopyMem (CopyTo, CopyFrom, BufferSizeInBytes);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+NorFlashPlatformReset (
+ IN UINTN DeviceBaseAddress
+ )
+{
+ SEND_NOR_COMMAND (DeviceBaseAddress, CMD_UNLOCK_1_ADDR, CMD_RESET_FIRST);
+
+ SEND_NOR_COMMAND (DeviceBaseAddress, CMD_UNLOCK_2_ADDR, CMD_RESET_SECOND);
+
+ SEND_NOR_COMMAND (DeviceBaseAddress, 0, CMD_RESET);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+NorFlashInitMmioOps (
+ VOID
+ )
+{
+ mMmioOps = GetMmioOperations16 (FixedPcdGetBool (PcdIfcBigEndian));
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+NorFlashPlatformGetDevices (
+ OUT NorFlashDescription **NorFlashDevices,
+ OUT UINT32 *Count
+ )
+{
+ // This is the function to be called, before using
+ if ((NorFlashDevices == NULL) || (Count == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ // Get the number of NOR flash devices supported
+ *NorFlashDevices = mNorFlashDevices;
+ *Count = NOR_FLASH_DEVICE_COUNT;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+NorFlashPlatformFlashGetAttributes (
+ OUT NorFlashDescription *NorFlashDevices,
+ IN UINT32 Count
+ )
+{
+ EFI_STATUS Status;
+ UINT32 Index;
+
+ if ((NorFlashDevices == NULL) || (Count == 0)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ // Check the attributes of the NOR flash slave we are connected to.
+ // Currently we support only CFI flash devices. Bail-out otherwise.
+ Status = CfiNorFlashFlashGetAttributes (NorFlashDevices, Count);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // Limit the Size of Nor Flash that can be programmed
+ for (Index = 0; Index < Count; Index++) {
+ NorFlashDevices[Index].RegionBaseAddress = PcdGet64 (PcdFlashReservedRegionBase64);
+ NorFlashDevices[Index].Size -= (NorFlashDevices[Index].RegionBaseAddress -
+ NorFlashDevices[Index].DeviceBaseAddress);
+ if ((NorFlashDevices[Index].RegionBaseAddress - NorFlashDevices[Index].DeviceBaseAddress)
+ % NorFlashDevices[Index].BlockSize)
+ {
+ DEBUG ((DEBUG_ERROR, "%a : Reserved Region(0x%p) doesn't start "
+ "from block boundry(0x%08x)\n", __FUNCTION__,
+ (UINTN)NorFlashDevices[Index].RegionBaseAddress,
+ (UINT32)NorFlashDevices[Index].BlockSize));
+ return EFI_DEVICE_ERROR;
+ }
+ }
+ return Status;
+}
diff --git a/Silicon/NXP/Library/NorFlashLib/NorFlashLib.inf b/Silicon/NXP/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index 0000000..e0370b9
--- /dev/null
+++ b/Silicon/NXP/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,43 @@
+# @NorFlashLib.inf
+#
+# Component description file for NorFlashLib module
+#
+# Copyright 2017 NXP
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = NorFlashLib
+ FILE_GUID = f3176a49-dde1-450d-a909-8580c03b9ba8
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = NorFlashLib
+ CONSTRUCTOR = NorFlashInitMmioOps
+
+[Sources.common]
+ CfiNorFlashLib.c
+ NorFlashLib.c
+
+[LibraryClasses]
+ ArmLib
+ IoAccessLib
+ TimerLib
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/NXP/NxpQoriqLs.dec
+
+[Pcd.common]
+ gNxpQoriqLsTokenSpaceGuid.PcdFlashDeviceBase64
+ gNxpQoriqLsTokenSpaceGuid.PcdFlashReservedRegionBase64
+ gNxpQoriqLsTokenSpaceGuid.PcdIfcBigEndian
+ gNxpQoriqLsTokenSpaceGuid.PcdIfcNandReservedSize
--
1.9.1
next prev parent reply other threads:[~2018-11-28 9:16 UTC|newest]
Thread overview: 254+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-16 8:49 [PATCH edk2-platforms 00/39] NXP: Add support of LS1043, LS1046 and LS2088 SoCs Meenakshi
2018-02-16 8:49 ` [PATCH edk2-platforms 01/39] Silicon/NXP: Add support for Big Endian Mmio APIs Meenakshi
2018-02-21 15:46 ` Leif Lindholm
2018-02-21 16:06 ` Laszlo Ersek
2018-02-21 18:58 ` Leif Lindholm
2018-02-22 4:45 ` Meenakshi Aggarwal
2018-02-22 8:34 ` Laszlo Ersek
2018-02-22 11:52 ` Leif Lindholm
2018-02-22 13:56 ` Laszlo Ersek
2018-02-23 8:40 ` Pankaj Bansal
2018-02-23 9:21 ` Laszlo Ersek
2018-02-23 9:47 ` Meenakshi Aggarwal
2018-02-23 10:17 ` Laszlo Ersek
2018-02-23 10:39 ` Udit Kumar
2018-02-23 10:59 ` Laszlo Ersek
2018-02-23 11:04 ` Pankaj Bansal
2018-02-23 11:22 ` Laszlo Ersek
2018-02-23 11:48 ` Pankaj Bansal
2018-02-23 15:17 ` Laszlo Ersek
2018-02-23 11:21 ` Udit Kumar
2018-02-23 10:25 ` Udit Kumar
2018-02-23 10:47 ` Laszlo Ersek
2018-02-23 11:48 ` Udit Kumar
2018-02-23 15:15 ` Laszlo Ersek
2018-02-28 13:19 ` Leif Lindholm
2018-02-22 4:49 ` Udit Kumar
2018-02-16 8:49 ` [PATCH edk2-platforms 02/39] Silicon/NXP : Add support for Watchdog driver Meenakshi
2018-02-16 8:49 ` [PATCH edk2-platforms 03/39] SocLib : Add support for initialization of peripherals Meenakshi
2018-04-18 15:12 ` Leif Lindholm
2018-04-18 16:38 ` Meenakshi Aggarwal
2018-04-18 18:15 ` Leif Lindholm
2018-04-19 4:59 ` Meenakshi Aggarwal
2018-02-16 8:50 ` [PATCH edk2-platforms 04/39] Silicon/NXP : Add support for DUART library Meenakshi
2018-04-18 15:15 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 05/39] Silicon/NXP: Add support for I2c driver Meenakshi
2018-04-17 16:36 ` Leif Lindholm
2018-04-23 8:21 ` Meenakshi Aggarwal
2018-04-23 8:38 ` Leif Lindholm
2018-04-23 10:34 ` Meenakshi Aggarwal
2018-04-23 13:39 ` Ard Biesheuvel
2018-04-23 15:50 ` Meenakshi Aggarwal
2018-04-23 15:53 ` Ard Biesheuvel
2018-02-16 8:50 ` [PATCH edk2-platforms 06/39] Silicon/Maxim : Add support for DS1307 RTC library Meenakshi
2018-04-18 15:27 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 07/39] Platform/NXP: Add support for ArmPlatformLib Meenakshi
2018-04-18 15:32 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 08/39] Compilation : Add the fdf, dsc and dec files Meenakshi
2018-04-18 15:38 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 09/39] Build : Add build script and environment script Meenakshi
2018-02-21 16:02 ` Leif Lindholm
2018-02-22 4:58 ` Meenakshi Aggarwal
2018-02-16 8:50 ` [PATCH edk2-platforms 10/39] IFC : Add Header file for IFC controller Meenakshi
2018-04-18 18:31 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 11/39] LS1043/BoardLib : Add support for LS1043 BoardLib Meenakshi
2018-04-18 18:34 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 12/39] Silicon/NXP : Add support of IfcLib Meenakshi
2018-04-18 18:39 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 13/39] LS1043/FpgaLib : Add support for FpgaLib Meenakshi
2018-04-18 18:43 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 14/39] LS1043 : Enable support of FpgaLib Meenakshi
2018-04-18 18:43 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 15/39] Silicon/NXP : Add support of NorFlashLib Meenakshi
2018-04-18 19:26 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 16/39] Silicon/NXP : Add NOR driver Meenakshi
2018-04-17 16:23 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 17/39] LS1043 : Enable NOR driver for LS1043aRDB package Meenakshi
2018-04-19 9:54 ` Leif Lindholm
2018-04-19 10:14 ` Meenakshi Aggarwal
2018-02-16 8:50 ` [PATCH edk2-platforms 18/39] Silicon/NXP:Add LS1046ARDB SoCLib Support Meenakshi
2018-04-19 10:00 ` Leif Lindholm
2018-04-19 10:05 ` Meenakshi Aggarwal
2018-04-19 10:20 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 19/39] Silicon/NXP:Add support for PCF2129 Real Time Clock Library Meenakshi
2018-04-19 10:11 ` Leif Lindholm
2018-04-19 12:33 ` Meenakshi Aggarwal
2018-04-19 13:47 ` Leif Lindholm
2018-04-20 3:20 ` Meenakshi Aggarwal
2018-02-16 8:50 ` [PATCH edk2-platforms 20/39] Platform/NXP: LS1046A RDB Board Library Meenakshi
2018-04-19 13:49 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 21/39] Platform/NXP: Add ArmPlatformLib for LS1046A Meenakshi
2018-04-19 13:53 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 22/39] Platform/NXP: LS1046 RDB Board FPGA library Meenakshi
2018-04-19 14:44 ` Leif Lindholm
2018-06-04 4:10 ` Meenakshi Aggarwal
2018-06-04 9:25 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 23/39] Platform/NXP: Compilation for LS1046A RDB Board Meenakshi
2018-04-19 14:54 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 24/39] Silicon/NXP:SocLib support for initialization of peripherals Meenakshi
2018-04-19 15:20 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 25/39] Platform/NXP/LS2088aRdbPkg: ArmPlatformLib Support for LS2088ARDB Meenakshi
2018-04-19 15:59 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 26/39] Silicon/Maxim: DS3232 RTC Library Support Meenakshi
2018-04-19 16:02 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 27/39] Compilation : Add the fdf, dsc and dec files Meenakshi
2018-04-19 16:28 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 28/39] Platform/NXP: LS2088A RDB Board Library Meenakshi
2018-04-19 16:28 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 29/39] Platform/NXP: LS2088 RDB Board FPGA library Meenakshi
2018-04-19 16:30 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 30/39] LS2088 : Enable support of FpgaLib Meenakshi
2018-04-19 16:31 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 31/39] LS2088ARDB: Enable NOR driver and Runtime Services Meenakshi
2018-04-19 16:32 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 32/39] Silicon/NXP: Implement PciSegmentLib to support multiple RCs Meenakshi
2018-04-19 19:27 ` Leif Lindholm
2018-04-20 6:40 ` Vabhav Sharma
2018-04-20 12:41 ` Leif Lindholm
2018-04-24 12:30 ` Vabhav Sharma
2018-02-16 8:50 ` [PATCH edk2-platforms 33/39] Silicon/NXP: Implement PciHostBridgeLib support Meenakshi
2018-04-20 8:34 ` Ard Biesheuvel
2018-04-24 12:17 ` Vabhav Sharma
2018-04-20 14:54 ` Leif Lindholm
2018-04-24 12:32 ` Vabhav Sharma
2018-02-16 8:50 ` [PATCH edk2-platforms 34/39] Silicon/NXP: Implement EFI_CPU_IO2_PROTOCOL Meenakshi
2018-04-20 8:40 ` Ard Biesheuvel
2018-04-24 12:26 ` Vabhav Sharma
2018-04-24 12:33 ` Ard Biesheuvel
2018-04-24 13:36 ` Vabhav Sharma
2018-04-24 14:02 ` Ard Biesheuvel
2018-04-20 15:15 ` Leif Lindholm
2018-04-24 12:40 ` Vabhav Sharma
2018-02-16 8:50 ` [PATCH edk2-platforms 35/39] Compilation: Update the fdf, dsc and dec files Meenakshi
2018-04-20 15:22 ` Leif Lindholm
2018-04-24 12:47 ` Vabhav Sharma
2018-02-16 8:50 ` [PATCH edk2-platforms 36/39] DWC3 : Add DWC3 USB controller initialization driver Meenakshi
2018-04-20 15:30 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 37/39] LS2088 : Enable support of USB controller Meenakshi
2018-04-20 15:30 ` Leif Lindholm
2018-02-16 8:50 ` [PATCH edk2-platforms 38/39] Platform/NXP:PCIe enablement for LS1046A RDB Meenakshi
2018-04-20 15:33 ` Leif Lindholm
2018-04-24 12:48 ` Vabhav Sharma
2018-02-16 8:50 ` [PATCH edk2-platforms 39/39] Platform/NXP:PCIe enablement for LS2088A RDB Meenakshi
2018-04-20 15:36 ` Leif Lindholm
2018-04-24 12:50 ` Vabhav Sharma
2018-04-17 16:44 ` [PATCH edk2-platforms 00/39] NXP: Add support of LS1043, LS1046 and LS2088 SoCs Leif Lindholm
2018-04-20 16:15 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 00/41] NXP : " Meenakshi Aggarwal
2018-11-28 15:01 ` [PATCH edk2-platforms 01/41] Silicon/NXP: Add Library to return Mmio APIs pointer Meenakshi Aggarwal
2018-12-21 19:17 ` Leif Lindholm
2018-12-26 5:00 ` Meenakshi Aggarwal
2018-11-28 15:01 ` [PATCH edk2-platforms 02/41] Silicon/NXP : Add support for Watchdog driver Meenakshi Aggarwal
2018-12-17 17:36 ` Leif Lindholm
2019-01-29 5:32 ` Meenakshi Aggarwal
2018-11-28 15:01 ` [PATCH edk2-platforms 03/41] SocLib : Add support for initialization of peripherals Meenakshi Aggarwal
2018-12-18 12:31 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 04/41] Silicon/NXP : Add support for DUART library Meenakshi Aggarwal
2018-11-28 15:01 ` [PATCH edk2-platforms 05/41] Silicon/NXP: Add support for I2c driver Meenakshi Aggarwal
2018-12-18 17:25 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 06/41] Silicon/Maxim : Add support for DS1307 RTC library Meenakshi Aggarwal
2018-11-28 15:01 ` [PATCH edk2-platforms 07/41] Platform/NXP: Add support for ArmPlatformLib Meenakshi Aggarwal
2018-11-28 15:01 ` [PATCH edk2-platforms 08/41] Platform/NXP: Add Platform driver for LS1043 RDB board Meenakshi Aggarwal
2018-12-18 17:47 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 09/41] Compilation : Add the fdf, dsc and dec files Meenakshi Aggarwal
2018-12-18 18:35 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 10/41] Readme : Add Readme.md file Meenakshi Aggarwal
2018-12-18 18:41 ` Leif Lindholm
2019-02-01 5:43 ` Meenakshi Aggarwal
2018-11-28 15:01 ` [PATCH edk2-platforms 11/41] IFC : Add Header file for IFC controller Meenakshi Aggarwal
2018-12-18 18:45 ` Leif Lindholm
2019-02-01 5:55 ` Meenakshi Aggarwal
2018-11-28 15:01 ` [PATCH edk2-platforms 12/41] LS1043/BoardLib : Add support for LS1043 BoardLib Meenakshi Aggarwal
2018-12-18 18:50 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 13/41] Silicon/NXP : Add support of IfcLib Meenakshi Aggarwal
2018-12-19 13:25 ` Leif Lindholm
2019-02-01 6:53 ` Meenakshi Aggarwal
2018-11-28 15:01 ` [PATCH edk2-platforms 14/41] Silicon/NXP : Add support for FpgaLib Meenakshi Aggarwal
2018-12-19 17:37 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 15/41] LS1043 : Enable support of FpgaLib Meenakshi Aggarwal
2018-11-28 15:01 ` Meenakshi Aggarwal [this message]
2018-12-19 18:13 ` [PATCH edk2-platforms 16/41] Silicon/NXP : Add support of NorFlashLib Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 17/41] Silicon/NXP : Add NOR driver Meenakshi Aggarwal
2018-12-19 18:32 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 18/41] LS1043 : Enable NOR driver for LS1043aRDB package Meenakshi Aggarwal
2018-12-19 18:33 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 19/41] Silicon/NXP:Add LS1046ARDB SoCLib Support Meenakshi Aggarwal
2018-12-19 18:41 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 20/41] Silicon/NXP:Add support for PCF2129 Real Time Clock Library Meenakshi Aggarwal
2018-12-19 18:52 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 21/41] Platform/NXP: LS1046A RDB Board Library Meenakshi Aggarwal
2018-12-19 18:54 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 22/41] Platform/NXP: Add ArmPlatformLib for LS1046A Meenakshi Aggarwal
2018-12-19 19:08 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 23/41] Platform/NXP: Add Platform driver for LS1046 RDB board Meenakshi Aggarwal
2018-12-19 22:05 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 24/41] Platform/NXP: Compilation for LS1046A RDB Board Meenakshi Aggarwal
2018-12-20 17:39 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 25/41] Silicon/NXP:SocLib support for initialization of peripherals Meenakshi Aggarwal
2018-12-21 9:22 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 26/41] Platform/NXP/LS2088aRdbPkg: ArmPlatformLib Support for LS2088ARDB Meenakshi Aggarwal
2018-12-21 9:30 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 27/41] Platform/NXP: Add Platform driver for LS2088 RDB board Meenakshi Aggarwal
2018-12-21 9:35 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 28/41] Silicon/Maxim: DS3232 RTC Library Support Meenakshi Aggarwal
2018-12-21 9:56 ` Leif Lindholm
2018-12-21 10:01 ` Ard Biesheuvel
2018-11-28 15:01 ` [PATCH edk2-platforms 29/41] Compilation : Add the fdf, dsc and dec files Meenakshi Aggarwal
2018-12-21 10:17 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 30/41] Platform/NXP: LS2088A RDB Board Library Meenakshi Aggarwal
2018-12-21 10:20 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 31/41] Platform/NXP: LS2088 RDB Board FPGA library Meenakshi Aggarwal
2018-12-21 10:22 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 32/41] LS2088 : Enable support of FpgaLib Meenakshi Aggarwal
2018-12-21 10:23 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 33/41] LS2088ARDB: Enable NOR driver and Runtime Services Meenakshi Aggarwal
2018-12-21 10:24 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 34/41] Silicon/NXP: Implement PciSegmentLib to support multiple RCs Meenakshi Aggarwal
2018-12-21 10:44 ` Ard Biesheuvel
2018-12-21 14:01 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 35/41] Silicon/NXP: Implement PciHostBridgeLib support Meenakshi Aggarwal
2018-12-21 10:51 ` Ard Biesheuvel
2018-12-21 18:30 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 36/41] Silicon/NXP: Implement EFI_CPU_IO2_PROTOCOL Meenakshi Aggarwal
2018-12-21 11:09 ` Ard Biesheuvel
2018-12-21 18:49 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 37/41] Compilation: Update the fdf, dsc and dec files Meenakshi Aggarwal
2018-12-21 18:51 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 38/41] DWC3 : Add DWC3 USB controller initialization driver Meenakshi Aggarwal
2018-12-21 19:03 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 39/41] LS2088 : Enable support of USB controller Meenakshi Aggarwal
2018-11-28 15:01 ` [PATCH edk2-platforms 40/41] Platform/NXP:PCIe enablement for LS1046A RDB Meenakshi Aggarwal
2018-12-21 19:05 ` Leif Lindholm
2018-11-28 15:01 ` [PATCH edk2-platforms 41/41] Platform/NXP:PCIe enablement for LS2088A RDB Meenakshi Aggarwal
2018-12-21 19:05 ` Leif Lindholm
2018-12-17 9:50 ` [PATCH edk2-platforms 00/41] NXP : Add support of LS1043, LS1046 and LS2088 SoCs Leif Lindholm
[not found] ` <1570639758-30355-1-git-send-email-meenakshi.aggarwal@nxp.com>
[not found] ` <1570639758-30355-2-git-send-email-meenakshi.aggarwal@nxp.com>
2019-10-10 10:17 ` [PATCH edk2-platforms 01/12] Silicon/NXP: Add Library to provide Mmio APIs with swapped data Leif Lindholm
[not found] ` <1570639758-30355-3-git-send-email-meenakshi.aggarwal@nxp.com>
2019-10-10 10:23 ` [PATCH edk2-platforms 02/12] Silicon/NXP: Add function to return swapped Mmio APIs pointer Leif Lindholm
[not found] ` <1570639758-30355-4-git-send-email-meenakshi.aggarwal@nxp.com>
2019-10-10 10:39 ` [PATCH edk2-platforms 03/12] Silicon/NXP : Add support for Watchdog driver Leif Lindholm
[not found] ` <1570639758-30355-5-git-send-email-meenakshi.aggarwal@nxp.com>
2019-10-10 11:17 ` [PATCH edk2-platforms 04/12] SocLib : Add support for initialization of peripherals Leif Lindholm
[not found] ` <1570639758-30355-7-git-send-email-meenakshi.aggarwal@nxp.com>
2019-10-10 14:51 ` [PATCH edk2-platforms 06/12] Silicon/NXP: Add support for I2c driver Leif Lindholm
[not found] ` <1570639758-30355-9-git-send-email-meenakshi.aggarwal@nxp.com>
2019-10-10 15:07 ` [PATCH edk2-platforms 08/12] Silicon/NXP : Add MemoryInitPei Library Leif Lindholm
[not found] ` <1570639758-30355-11-git-send-email-meenakshi.aggarwal@nxp.com>
2019-10-10 15:12 ` [PATCH edk2-platforms 10/12] Platform/NXP: Add Platform driver for LS1043 RDB board Leif Lindholm
[not found] ` <1570639758-30355-12-git-send-email-meenakshi.aggarwal@nxp.com>
2019-10-10 15:17 ` [PATCH edk2-platforms 11/12] Compilation : Add the fdf, dsc and dec files Leif Lindholm
[not found] ` <1570639758-30355-13-git-send-email-meenakshi.aggarwal@nxp.com>
2019-10-10 15:19 ` [PATCH edk2-platforms 12/12] Readme : Add Readme.md file Leif Lindholm
2019-10-10 15:27 ` [PATCH edk2-platforms 00/12] NXP : Add support of LS1043 SoC Leif Lindholm
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 00/11] " Meenakshi Aggarwal
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 01/11] Silicon/NXP: Add Library to provide Mmio APIs with swapped data Meenakshi Aggarwal
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 02/11] Silicon/NXP: Add function to return swapped Mmio APIs pointer Meenakshi Aggarwal
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 03/11] SocLib : Add support for initialization of peripherals Meenakshi Aggarwal
2019-11-26 16:43 ` Leif Lindholm
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 04/11] Silicon/NXP : Add support for DUART library Meenakshi Aggarwal
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 05/11] Silicon/NXP: Add support for I2c driver Meenakshi Aggarwal
2019-11-26 17:00 ` Leif Lindholm
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 06/11] Silicon/Maxim : Add support for DS1307 RTC library Meenakshi Aggarwal
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 07/11] Silicon/NXP : Add MemoryInitPei Library Meenakshi Aggarwal
2019-11-26 16:55 ` [edk2-devel] " Leif Lindholm
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 08/11] Platform/NXP: Add support for ArmPlatformLib Meenakshi Aggarwal
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 09/11] Platform/NXP: Add Platform driver for LS1043 RDB board Meenakshi Aggarwal
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 10/11] Compilation : Add the fdf, dsc and dec files Meenakshi Aggarwal
2019-11-26 16:56 ` [edk2-devel] " Leif Lindholm
2019-11-21 16:25 ` [edk2-platforms] [PATCH v2 11/11] Readme : Add Readme.md file Meenakshi Aggarwal
2019-11-26 16:58 ` Leif Lindholm
2020-01-24 22:25 ` [edk2-platforms] [PATCH v3 00/11] Add support of LS1043 SoC Meenakshi Aggarwal
2020-01-24 22:25 ` [edk2-platforms] [PATCH v3 03/11] SocLib : Add support for initialization of peripherals Meenakshi Aggarwal
2020-01-24 22:25 ` [edk2-platforms] [PATCH v3 08/11] Silicon/NXP : Add MemoryInitPei Library Meenakshi Aggarwal
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