From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=92.121.34.13; helo=inva020.nxp.com; envelope-from=meenakshi.aggarwal@nxp.com; receiver=edk2-devel@lists.01.org Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 699562119590B for ; Wed, 28 Nov 2018 01:15:54 -0800 (PST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 03FCC1A02ED; Wed, 28 Nov 2018 10:15:53 +0100 (CET) Received: from inv0113.in-blr01.nxp.com (inv0113.in-blr01.nxp.com [165.114.116.118]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 5C0961A0302; Wed, 28 Nov 2018 10:15:52 +0100 (CET) Received: from uefi-OptiPlex-790.ap.freescale.net (uefi-OptiPlex-790.ap.freescale.net [10.232.132.78]) by inv0113.in-blr01.nxp.com (Postfix) with ESMTP id 6FC59340; Wed, 28 Nov 2018 14:45:51 +0530 (IST) From: Meenakshi Aggarwal To: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, michael.d.kinney@intel.com, edk2-devel@lists.01.org Date: Wed, 28 Nov 2018 20:31:15 +0530 Message-Id: <1543417315-5763-2-git-send-email-meenakshi.aggarwal@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1543417315-5763-1-git-send-email-meenakshi.aggarwal@nxp.com> References: <1518771035-6733-1-git-send-email-meenakshi.aggarwal@nxp.com> <1543417315-5763-1-git-send-email-meenakshi.aggarwal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [PATCH edk2-platforms 01/41] Silicon/NXP: Add Library to return Mmio APIs pointer X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 28 Nov 2018 09:15:55 -0000 This library add supports to return pointer to MMIO APIs on basis of Swap flag. If Flag is True then MMION APIs returened in which data swapped after reading from MMIO and before write using MMIO. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Meenakshi Aggarwal --- Silicon/NXP/Include/Library/IoAccessLib.h | 332 +++++++++++++++++++ Silicon/NXP/Library/IoAccessLib/IoAccessLib.c | 410 ++++++++++++++++++++++++ Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf | 32 ++ 3 files changed, 774 insertions(+) create mode 100644 Silicon/NXP/Include/Library/IoAccessLib.h create mode 100644 Silicon/NXP/Library/IoAccessLib/IoAccessLib.c create mode 100644 Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf diff --git a/Silicon/NXP/Include/Library/IoAccessLib.h b/Silicon/NXP/Include/Library/IoAccessLib.h new file mode 100644 index 0000000..f7372a5 --- /dev/null +++ b/Silicon/NXP/Include/Library/IoAccessLib.h @@ -0,0 +1,332 @@ +/** @file + * + * Copyright 2017 NXP + * + * This program and the accompanying materials + * are licensed and made available under the terms and conditions of the BSD License + * which accompanies this distribution. The full text of the license may be found at + * http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + * + **/ + +#ifndef __IO_ACCESS_LIB_H__ +#define __IO_ACCESS_LIB_H__ + +#include + +/// +/// Structure to have pointer to R/W +/// Mmio operations for 16 bits. +/// +typedef struct _MMIO_OPERATIONS_16 { + UINT16 (*Read) (UINTN Address); + UINT16 (*Write) (UINTN Address, UINT16 Value); + UINT16 (*Or) (UINTN Address, UINT16 Or); + UINT16 (*And) (UINTN Address, UINT16 AND); + UINT16 (*AndThenOr) (UINTN Address, UINT16 And, UINT16 Or); +} MMIO_OPERATIONS_16; + +/// +/// Structure to have pointer to R/W +/// Mmio operations for 32 bits. +/// +typedef struct _MMIO_OPERATIONS_32 { + UINT32 (*Read) (UINTN Address); + UINT32 (*Write) (UINTN Address, UINT32 Value); + UINT32 (*Or) (UINTN Address, UINT32 Or); + UINT32 (*And) (UINTN Address, UINT32 AND); + UINT32 (*AndThenOr) (UINTN Address, UINT32 And, UINT32 Or); +} MMIO_OPERATIONS_32; + +/// +/// Structure to have pointer to R/W +/// Mmio operations for 64 bits. +/// +typedef struct _MMIO_OPERATIONS_64 { + UINT64 (*Read) (UINTN Address); + UINT64 (*Write) (UINTN Address, UINT64 Value); + UINT64 (*Or) (UINTN Address, UINT64 Or); + UINT64 (*And) (UINTN Address, UINT64 AND); + UINT64 (*AndThenOr) (UINTN Address, UINT64 And, UINT64 Or); +} MMIO_OPERATIONS_64; + +/** + Function to return pointer to 16 bit Mmio operations. + + @param Swap Flag to tell if Swap is needed or not + on Mmio Operations. + + @return Pointer to Mmio Operations. + +**/ +MMIO_OPERATIONS_16 * +GetMmioOperations16 ( + IN BOOLEAN Swap + ); + +/** + Function to return pointer to 32 bit Mmio operations. + + @param Swap Flag to tell if Swap is needed or not + on Mmio Operations. + + @return Pointer to Mmio Operations. + +**/ +MMIO_OPERATIONS_32 * +GetMmioOperations32 ( + IN BOOLEAN Swap + ); + +/** + Function to return pointer to 64 bit Mmio operations. + + @param Swap Flag to tell if Swap is needed or not + on Mmio Operations. + + @return Pointer to Mmio Operations. + +**/ +MMIO_OPERATIONS_64 * +GetMmioOperations64 ( + IN BOOLEAN Swap + ); + +/** + MmioRead16 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT16 +EFIAPI +SwapMmioRead16 ( + IN UINTN Address + ); + +/** + MmioRead32 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT32 +EFIAPI +SwapMmioRead32 ( + IN UINTN Address + ); + +/** + MmioRead64 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT64 +EFIAPI +SwapMmioRead64 ( + IN UINTN Address + ); + +/** + MmioWrite16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioWrite16 ( + IN UINTN Address, + IN UINT16 Value + ); + +/** + MmioWrite32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioWrite32 ( + IN UINTN Address, + IN UINT32 Value + ); + +/** + MmioWrite64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioWrite64 ( + IN UINTN Address, + IN UINT64 Value + ); + +/** + MmioAndThenOr16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioAndThenOr16 ( + IN UINTN Address, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + MmioAndThenOr32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioAndThenOr32 ( + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + MmioAndThenOr64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioAndThenOr64 ( + IN UINTN Address, + IN UINT64 AndData, + IN UINT64 OrData + ); + +/** + MmioOr16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioOr16 ( + IN UINTN Address, + IN UINT16 OrData + ); + +/** + MmioOr32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioOr32 ( + IN UINTN Address, + IN UINT32 OrData + ); + +/** + MmioOr64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioOr64 ( + IN UINTN Address, + IN UINT64 OrData + ); + +/** + MmioAnd16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioAnd16 ( + IN UINTN Address, + IN UINT16 AndData + ); + +/** + MmioAnd32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioAnd32 ( + IN UINTN Address, + IN UINT32 AndData + ); + +/** + MmioAnd64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioAnd64 ( + IN UINTN Address, + IN UINT64 AndData + ); + +#endif /* __IO_ACCESS_LIB_H__ */ diff --git a/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c new file mode 100644 index 0000000..0260777 --- /dev/null +++ b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c @@ -0,0 +1,410 @@ +/** IoAccessLib.c + + Provide MMIO APIs for BE modules. + + Copyright 2017 NXP + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include + +/** + MmioRead16 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT16 +EFIAPI +SwapMmioRead16 ( + IN UINTN Address + ) +{ + return SwapBytes16 (MmioRead16 (Address)); +} + +/** + MmioRead32 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT32 +EFIAPI +SwapMmioRead32 ( + IN UINTN Address + ) +{ + return SwapBytes32 (MmioRead32 (Address)); +} + +/** + MmioRead64 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT64 +EFIAPI +SwapMmioRead64 ( + IN UINTN Address + ) +{ + return SwapBytes64 (MmioRead64 (Address)); +} + +/** + MmioWrite16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioWrite16 ( + IN UINTN Address, + IN UINT16 Value + ) +{ + return MmioWrite16 (Address, SwapBytes16 (Value)); +} + +/** + MmioWrite32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioWrite32 ( + IN UINTN Address, + IN UINT32 Value + ) +{ + return MmioWrite32 (Address, SwapBytes32 (Value)); +} + +/** + MmioWrite64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioWrite64 ( + IN UINTN Address, + IN UINT64 Value + ) +{ + return MmioWrite64 (Address, SwapBytes64 (Value)); +} + +/** + MmioAndThenOr16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioAndThenOr16 ( + IN UINTN Address, + IN UINT16 AndData, + IN UINT16 OrData + ) +{ + AndData = SwapBytes16 (AndData); + OrData = SwapBytes16 (OrData); + + return MmioAndThenOr16 (Address, AndData, OrData); +} + +/** + MmioAndThenOr32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioAndThenOr32 ( + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData + ) +{ + AndData = SwapBytes32 (AndData); + OrData = SwapBytes32 (OrData); + + return MmioAndThenOr32 (Address, AndData, OrData); +} + +/** + MmioAndThenOr64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioAndThenOr64 ( + IN UINTN Address, + IN UINT64 AndData, + IN UINT64 OrData + ) +{ + AndData = SwapBytes64 (AndData); + OrData = SwapBytes64 (OrData); + + return MmioAndThenOr64 (Address, AndData, OrData); +} + +/** + MmioOr16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioOr16 ( + IN UINTN Address, + IN UINT16 OrData + ) +{ + return MmioOr16 (Address, SwapBytes16 (OrData)); +} + +/** + MmioOr32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioOr32 ( + IN UINTN Address, + IN UINT32 OrData + ) +{ + return MmioOr32 (Address, SwapBytes32 (OrData)); +} + +/** + MmioOr64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioOr64 ( + IN UINTN Address, + IN UINT64 OrData + ) +{ + return MmioOr64 (Address, SwapBytes64 (OrData)); +} + +/** + MmioAnd16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioAnd16 ( + IN UINTN Address, + IN UINT16 AndData + ) +{ + return MmioAnd16 (Address, SwapBytes16 (AndData)); +} + +/** + MmioAnd32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioAnd32 ( + IN UINTN Address, + IN UINT32 AndData + ) +{ + return MmioAnd32 (Address, SwapBytes32 (AndData)); +} + +/** + MmioAnd64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioAnd64 ( + IN UINTN Address, + IN UINT64 AndData + ) +{ + return MmioAnd64 (Address, SwapBytes64 (AndData)); +} + +STATIC MMIO_OPERATIONS_16 SwappingFunctions16 = { + SwapMmioRead16, + SwapMmioWrite16, + SwapMmioOr16, + SwapMmioAnd16, + SwapMmioAndThenOr16, +}; + +STATIC MMIO_OPERATIONS_16 NonSwappingFunctions16 = { + MmioRead16, + MmioWrite16, + MmioOr16, + MmioAnd16, + MmioAndThenOr16, +}; + +STATIC MMIO_OPERATIONS_32 SwappingFunctions32 = { + SwapMmioRead32, + SwapMmioWrite32, + SwapMmioOr32, + SwapMmioAnd32, + SwapMmioAndThenOr32, +}; + +STATIC MMIO_OPERATIONS_32 NonSwappingFunctions32 = { + MmioRead32, + MmioWrite32, + MmioOr32, + MmioAnd32, + MmioAndThenOr32, +}; + +STATIC MMIO_OPERATIONS_64 SwappingFunctions64 = { + SwapMmioRead64, + SwapMmioWrite64, + SwapMmioOr64, + SwapMmioAnd64, + SwapMmioAndThenOr64, +}; + +STATIC MMIO_OPERATIONS_64 NonSwappingFunctions64 = { + MmioRead64, + MmioWrite64, + MmioOr64, + MmioAnd64, + MmioAndThenOr64, +}; + +/** + Function to return pointer to 16 bit Mmio operations. + + @param Swap Flag to tell if Swap is needed or not + on Mmio Operations. + + @return Pointer to Mmio Operations. + +**/ +MMIO_OPERATIONS_16 * +GetMmioOperations16 (BOOLEAN Swap) { + if (Swap) { + return &SwappingFunctions16; + } else { + return &NonSwappingFunctions16; + } +} + +/** + Function to return pointer to 32 bit Mmio operations. + + @param Swap Flag to tell if Swap is needed or not + on Mmio Operations. + + @return Pointer to Mmio Operations. + +**/ +MMIO_OPERATIONS_32 * +GetMmioOperations32 (BOOLEAN Swap) { + if (Swap) { + return &SwappingFunctions32; + } else { + return &NonSwappingFunctions32; + } +} + +/** + Function to return pointer to 64 bit Mmio operations. + + @param Swap Flag to tell if Swap is needed or not + on Mmio Operations. + + @return Pointer to Mmio Operations. + +**/ +MMIO_OPERATIONS_64 * +GetMmioOperations64 (BOOLEAN Swap) { + if (Swap) { + return &SwappingFunctions64; + } else { + return &NonSwappingFunctions64; + } +} diff --git a/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf new file mode 100644 index 0000000..e2e7606 --- /dev/null +++ b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf @@ -0,0 +1,32 @@ +## @IoAccessLib.inf + +# Copyright 2017 NXP +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = IoAccessLib + FILE_GUID = 28d77333-77eb-4faf-8735-130e5eb3e343 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = IoAccessLib + +[Sources.common] + IoAccessLib.c + +[Packages] + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[LibraryClasses] + IoLib -- 1.9.1