From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=92.121.34.13; helo=inva020.nxp.com; envelope-from=meenakshi.aggarwal@nxp.com; receiver=edk2-devel@lists.01.org Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EA77621E49058 for ; Wed, 28 Nov 2018 01:16:30 -0800 (PST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id A9BE61A0302; Wed, 28 Nov 2018 10:16:29 +0100 (CET) Received: from inv0113.in-blr01.nxp.com (inv0113.in-blr01.nxp.com [165.114.116.118]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 53D661A02ED; Wed, 28 Nov 2018 10:16:29 +0100 (CET) Received: from uefi-OptiPlex-790.ap.freescale.net (uefi-OptiPlex-790.ap.freescale.net [10.232.132.78]) by inv0113.in-blr01.nxp.com (Postfix) with ESMTP id 9BC22340; Wed, 28 Nov 2018 14:46:28 +0530 (IST) From: Meenakshi Aggarwal To: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, michael.d.kinney@intel.com, edk2-devel@lists.01.org Date: Wed, 28 Nov 2018 20:31:46 +0530 Message-Id: <1543417315-5763-33-git-send-email-meenakshi.aggarwal@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1543417315-5763-1-git-send-email-meenakshi.aggarwal@nxp.com> References: <1518771035-6733-1-git-send-email-meenakshi.aggarwal@nxp.com> <1543417315-5763-1-git-send-email-meenakshi.aggarwal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [PATCH edk2-platforms 32/41] LS2088 : Enable support of FpgaLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 28 Nov 2018 09:16:31 -0000 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Meenakshi Aggarwal Signed-off-by: Wasim Khan Reviewed-by: Leif Lindholm --- Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc | 3 +++ Silicon/NXP/Include/Chassis3/Soc.h | 1 - Silicon/NXP/LS2088A/LS2088A.dsc.inc | 1 + Silicon/NXP/Library/SocLib/Chassis3/Soc.c | 13 ++++++++++++- Silicon/NXP/Library/SocLib/LS2088aSocLib.inf | 2 ++ 5 files changed, 18 insertions(+), 2 deletions(-) diff --git a/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc index 465c59e..76d51a2 100755 --- a/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc +++ b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc @@ -39,6 +39,9 @@ SerialPortLib|Silicon/NXP/Library/DUartPortLib/DUartPortLib.inf IoAccessLib|Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf RealTimeClockLib|Silicon/Maxim/Library/Ds3232RtcLib/Ds3232RtcLib.inf + IfcLib|Silicon/NXP/Library/IfcLib/IfcLib.inf + BoardLib|Platform/NXP/LS2088aRdbPkg/Library/BoardLib/BoardLib.inf + FpgaLib|Platform/NXP/LS2088aRdbPkg/Library/FpgaLib/FpgaLib.inf [PcdsFixedAtBuild.common] diff --git a/Silicon/NXP/Include/Chassis3/Soc.h b/Silicon/NXP/Include/Chassis3/Soc.h index 8d967e7..0dd9eee 100644 --- a/Silicon/NXP/Include/Chassis3/Soc.h +++ b/Silicon/NXP/Include/Chassis3/Soc.h @@ -22,7 +22,6 @@ #define FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 } /* LS208x */ #define TP_CLUSTER_EOC_MASK 0x80000000 /* Mask for End of clusters */ #define NUM_CC_PLLS 6 -#define CLK_FREQ 100000000 #define MAX_CPUS 16 #define CHECK_CLUSTER(Cluster) ((Cluster & TP_CLUSTER_EOC_MASK) != TP_CLUSTER_EOC_MASK) diff --git a/Silicon/NXP/LS2088A/LS2088A.dsc.inc b/Silicon/NXP/LS2088A/LS2088A.dsc.inc index 8f7dbb5..2cff40f 100644 --- a/Silicon/NXP/LS2088A/LS2088A.dsc.inc +++ b/Silicon/NXP/LS2088A/LS2088A.dsc.inc @@ -67,5 +67,6 @@ gNxpQoriqLsTokenSpaceGuid.PcdI2c0BaseAddr|0x02000000 gNxpQoriqLsTokenSpaceGuid.PcdI2cSize|0x10000 gNxpQoriqLsTokenSpaceGuid.PcdNumI2cController|4 + gNxpQoriqLsTokenSpaceGuid.PcdIfcBaseAddr|0x02240000 ## diff --git a/Silicon/NXP/Library/SocLib/Chassis3/Soc.c b/Silicon/NXP/Library/SocLib/Chassis3/Soc.c index 0fc92f4..d334bb7 100644 --- a/Silicon/NXP/Library/SocLib/Chassis3/Soc.c +++ b/Silicon/NXP/Library/SocLib/Chassis3/Soc.c @@ -19,11 +19,15 @@ #include #include #include +#include #include #include #include #include +extern VOID PrintBoardPersonality (VOID); +extern UINTN GetBoardSysClk (VOID); + VOID GetSysInfo ( OUT SYS_INFO *PtrSysInfo @@ -82,7 +86,7 @@ GetSysInfo ( GurBase = (VOID *)PcdGet64 (PcdGutsBaseAddr); ClkBase = (VOID *)PcdGet64 (PcdClkBaseAddr); - SysClk = CLK_FREQ; + SysClk = GetBoardSysClk (); PtrSysInfo->FreqSystemBus = SysClk; PtrSysInfo->FreqDdrBus = PcdGet64 (PcdDdrClk); @@ -151,6 +155,8 @@ SocInit ( // SmmuInit (); + IfcInit (); + // // Initialize the Serial Port. // Early serial port initialization is required to print RCW, @@ -177,4 +183,9 @@ SocInit ( // Print Soc Personality information // PrintSoc (); + + // + // Print Board Personality information + // + PrintBoardPersonality (); } diff --git a/Silicon/NXP/Library/SocLib/LS2088aSocLib.inf b/Silicon/NXP/Library/SocLib/LS2088aSocLib.inf index 3d9237d..9547f5a 100644 --- a/Silicon/NXP/Library/SocLib/LS2088aSocLib.inf +++ b/Silicon/NXP/Library/SocLib/LS2088aSocLib.inf @@ -29,6 +29,8 @@ [LibraryClasses] BaseLib DebugLib + FpgaLib + IfcLib IoAccessLib SerialPortLib -- 1.9.1