From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=92.121.34.13; helo=inva020.nxp.com; envelope-from=meenakshi.aggarwal@nxp.com; receiver=edk2-devel@lists.01.org Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BF83C2119590F for ; Wed, 28 Nov 2018 01:16:15 -0800 (PST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 77B531A030F; Wed, 28 Nov 2018 10:16:14 +0100 (CET) Received: from inv0113.in-blr01.nxp.com (inv0113.in-blr01.nxp.com [165.114.116.118]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id A69001A0309; Wed, 28 Nov 2018 10:16:13 +0100 (CET) Received: from uefi-OptiPlex-790.ap.freescale.net (uefi-OptiPlex-790.ap.freescale.net [10.232.132.78]) by inv0113.in-blr01.nxp.com (Postfix) with ESMTP id B7991340; Wed, 28 Nov 2018 14:46:12 +0530 (IST) From: Meenakshi Aggarwal To: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, michael.d.kinney@intel.com, edk2-devel@lists.01.org Date: Wed, 28 Nov 2018 20:31:19 +0530 Message-Id: <1543417315-5763-6-git-send-email-meenakshi.aggarwal@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1543417315-5763-1-git-send-email-meenakshi.aggarwal@nxp.com> References: <1518771035-6733-1-git-send-email-meenakshi.aggarwal@nxp.com> <1543417315-5763-1-git-send-email-meenakshi.aggarwal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [PATCH edk2-platforms 05/41] Silicon/NXP: Add support for I2c driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 28 Nov 2018 09:16:16 -0000 I2C driver produces gEfiI2cMasterProtocolGuid which can be used by other modules. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Meenakshi Aggarwal --- Silicon/NXP/Drivers/I2cDxe/ComponentName.c | 185 ++++++++ Silicon/NXP/Drivers/I2cDxe/DriverBinding.c | 241 ++++++++++ Silicon/NXP/Drivers/I2cDxe/I2cDxe.c | 693 +++++++++++++++++++++++++++++ Silicon/NXP/Drivers/I2cDxe/I2cDxe.h | 96 ++++ Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf | 64 +++ 5 files changed, 1279 insertions(+) create mode 100644 Silicon/NXP/Drivers/I2cDxe/ComponentName.c create mode 100644 Silicon/NXP/Drivers/I2cDxe/DriverBinding.c create mode 100644 Silicon/NXP/Drivers/I2cDxe/I2cDxe.c create mode 100644 Silicon/NXP/Drivers/I2cDxe/I2cDxe.h create mode 100644 Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf diff --git a/Silicon/NXP/Drivers/I2cDxe/ComponentName.c b/Silicon/NXP/Drivers/I2cDxe/ComponentName.c new file mode 100644 index 0000000..efed6b9 --- /dev/null +++ b/Silicon/NXP/Drivers/I2cDxe/ComponentName.c @@ -0,0 +1,185 @@ +/** @file + + Copyright 2018 NXP + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "I2cDxe.h" + +STATIC EFI_UNICODE_STRING_TABLE mNxpI2cDriverNameTable[] = { + { + "en", + (CHAR16 *)L"Nxp I2C Driver" + }, + { } +}; + +STATIC EFI_UNICODE_STRING_TABLE mNxpI2cControllerNameTable[] = { + { + "en", + (CHAR16 *)L"Nxp I2C Controller" + }, + { } +}; + +/** + Retrieves a Unicode string that is the user readable name of the driver. + + This function retrieves the user readable name of a driver in the form of a + Unicode string. If the driver specified by This has a user readable name in + the language specified by Language, then a pointer to the driver name is + returned in DriverName, and EFI_SUCCESS is returned. If the driver specified + by This does not support the language specified by Language, + then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified + in RFC 4646 or ISO 639-2 language code format. + + @param DriverName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + driver specified by This in the language + specified by Language. + + @retval EFI_SUCCESS The Unicode string for the Driver specified by + This and the language specified by Language was + returned in DriverName. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER DriverName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +STATIC +EFI_STATUS +EFIAPI +NxpI2cGetDriverName ( + IN EFI_COMPONENT_NAME2_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ) +{ + return LookupUnicodeString2 (Language, + This->SupportedLanguages, + mNxpI2cDriverNameTable, + DriverName, + FALSE); +} + +/** + Retrieves a Unicode string that is the user readable name of the controller + that is being managed by a driver. + + This function retrieves the user readable name of the controller specified by + ControllerHandle and ChildHandle in the form of a Unicode string. If the + driver specified by This has a user readable name in the language specified by + Language, then a pointer to the controller name is returned in ControllerName, + and EFI_SUCCESS is returned. If the driver specified by This is not currently + managing the controller specified by ControllerHandle and ChildHandle, + then EFI_UNSUPPORTED is returned. If the driver specified by This does not + support the language specified by Language, then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param ControllerHandle[in] The handle of a controller that the driver + specified by This is managing. This handle + specifies the controller whose name is to be + returned. + + @param ChildHandle[in] The handle of the child controller to retrieve + the name of. This is an optional parameter that + may be NULL. It will be NULL for device + drivers. It will also be NULL for a bus drivers + that wish to retrieve the name of the bus + controller. It will not be NULL for a bus + driver that wishes to retrieve the name of a + child controller. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified in + RFC 4646 or ISO 639-2 language code format. + + @param ControllerName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + controller specified by ControllerHandle and + ChildHandle in the language specified by + Language from the point of view of the driver + specified by This. + + @retval EFI_SUCCESS The Unicode string for the user readable name in + the language specified by Language for the + driver specified by This was returned in + DriverName. + + @retval EFI_INVALID_PARAMETER ControllerHandle is NULL. + + @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid + EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER ControllerName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This is not currently + managing the controller specified by + ControllerHandle and ChildHandle. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +STATIC +EFI_STATUS +EFIAPI +NxpI2cGetControllerName ( + IN EFI_COMPONENT_NAME2_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ) +{ + if (ChildHandle != NULL) { + return EFI_UNSUPPORTED; + } + + return LookupUnicodeString2 (Language, + This->SupportedLanguages, + mNxpI2cControllerNameTable, + ControllerName, + FALSE); +} + +// +// EFI Component Name 2 Protocol +// +EFI_COMPONENT_NAME2_PROTOCOL gNxpI2cDriverComponentName2 = { + NxpI2cGetDriverName, + NxpI2cGetControllerName, + "en" +}; diff --git a/Silicon/NXP/Drivers/I2cDxe/DriverBinding.c b/Silicon/NXP/Drivers/I2cDxe/DriverBinding.c new file mode 100644 index 0000000..ad7a9f3 --- /dev/null +++ b/Silicon/NXP/Drivers/I2cDxe/DriverBinding.c @@ -0,0 +1,241 @@ +/** @file + + Copyright 2018 NXP + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD + License which accompanies this distribution. The full text of the license may + be found at http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include + +#include + +#include "I2cDxe.h" + +/** + Tests to see if this driver supports a given controller. + + @param This[in] A pointer to the EFI_DRIVER_BINDING_PROTOCOL + instance. + @param ControllerHandle[in] The handle of the controller to test. + @param RemainingDevicePath[in] The remaining device path. + (Ignored - this is not a bus driver.) + + @retval EFI_SUCCESS The driver supports this controller. + @retval EFI_ALREADY_STARTED The device specified by ControllerHandle is + already being managed by the driver specified + by This. + @retval EFI_UNSUPPORTED The device specified by ControllerHandle is + not supported by the driver specified by This. + +**/ +EFI_STATUS +EFIAPI +NxpI2cDriverBindingSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + NON_DISCOVERABLE_DEVICE *Dev; + EFI_STATUS Status; + + // + // Connect to the non-discoverable device + // + Status = gBS->OpenProtocol (ControllerHandle, + &gEdkiiNonDiscoverableDeviceProtocolGuid, + (VOID **) &Dev, + This->DriverBindingHandle, + ControllerHandle, + EFI_OPEN_PROTOCOL_BY_DRIVER); + if (EFI_ERROR (Status)) { + return Status; + } + + if (CompareGuid (Dev->Type, &gNxpNonDiscoverableI2cMasterGuid)) { + Status = EFI_SUCCESS; + } else { + Status = EFI_UNSUPPORTED; + } + + // + // Clean up. + // + gBS->CloseProtocol (ControllerHandle, + &gEdkiiNonDiscoverableDeviceProtocolGuid, + This->DriverBindingHandle, + ControllerHandle); + + return Status; +} + + +/** + Starts a device controller or a bus controller. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL + instance. + @param[in] ControllerHandle The handle of the device to start. This + handle must support a protocol interface that + supplies an I/O abstraction to the driver. + @param[in] RemainingDevicePath The remaining portion of the device path. + (Ignored - this is not a bus driver.) + + @retval EFI_SUCCESS The device was started. + @retval EFI_DEVICE_ERROR The device could not be started due to a + device error. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a + lack of resources. + +**/ +EFI_STATUS +EFIAPI +NxpI2cDriverBindingStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL + ) +{ + return NxpI2cInit (This->DriverBindingHandle, ControllerHandle); +} + + +/** + Stops a device controller or a bus controller. + + @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL + instance. + @param[in] ControllerHandle A handle to the device being stopped. The handle + must support a bus specific I/O protocol for the + driver to use to stop the device. + @param[in] NumberOfChildren The number of child device handles in + ChildHandleBuffer. + @param[in] ChildHandleBuffer An array of child handles to be freed. May be + NULL if NumberOfChildren is 0. + + @retval EFI_SUCCESS The device was stopped. + @retval EFI_DEVICE_ERROR The device could not be stopped due to a device + error. + +**/ +EFI_STATUS +EFIAPI +NxpI2cDriverBindingStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer OPTIONAL + ) +{ + return NxpI2cRelease (This->DriverBindingHandle, ControllerHandle); +} + + +STATIC EFI_DRIVER_BINDING_PROTOCOL gNxpI2cDriverBinding = { + NxpI2cDriverBindingSupported, + NxpI2cDriverBindingStart, + NxpI2cDriverBindingStop, + 0xa, + NULL, + NULL +}; + + +/** + The entry point of I2c UEFI Driver. + + @param ImageHandle The image handle of the UEFI Driver. + @param SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS The Driver or UEFI Driver exited normally. + @retval EFI_INCOMPATIBLE_VERSION _gUefiDriverRevision is greater than + SystemTable->Hdr.Revision. + +**/ +EFI_STATUS +EFIAPI +I2cDxeEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + // + // Add the driver to the list of drivers + // + Status = EfiLibInstallDriverBindingComponentName2 ( + ImageHandle, SystemTable, &gNxpI2cDriverBinding, ImageHandle, + NULL, &gNxpI2cDriverComponentName2); + ASSERT_EFI_ERROR (Status); + + return EFI_SUCCESS; +} + + +/** + Unload function for the I2c UEFI Driver. + + @param ImageHandle[in] The allocated handle for the EFI image + + @retval EFI_SUCCESS The driver was unloaded successfully + @retval EFI_INVALID_PARAMETER ImageHandle is not a valid image handle. + +**/ +EFI_STATUS +EFIAPI +I2cDxeUnload ( + IN EFI_HANDLE ImageHandle + ) +{ + EFI_STATUS Status; + EFI_HANDLE *HandleBuffer; + UINTN HandleCount; + UINTN Index; + + // + // Retrieve all USB I/O handles in the handle database + // + Status = gBS->LocateHandleBuffer (ByProtocol, + &gEdkiiNonDiscoverableDeviceProtocolGuid, + NULL, + &HandleCount, + &HandleBuffer); + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Disconnect the driver from the handles in the handle database + // + for (Index = 0; Index < HandleCount; Index++) { + Status = gBS->DisconnectController (HandleBuffer[Index], + gImageHandle, + NULL); + } + + // + // Free the handle array + // + gBS->FreePool (HandleBuffer); + + // + // Uninstall protocols installed by the driver in its entrypoint + // + Status = gBS->UninstallMultipleProtocolInterfaces (ImageHandle, + &gEfiDriverBindingProtocolGuid, + &gNxpI2cDriverBinding, + NULL + ); + + return EFI_SUCCESS; +} diff --git a/Silicon/NXP/Drivers/I2cDxe/I2cDxe.c b/Silicon/NXP/Drivers/I2cDxe/I2cDxe.c new file mode 100644 index 0000000..08aae72 --- /dev/null +++ b/Silicon/NXP/Drivers/I2cDxe/I2cDxe.c @@ -0,0 +1,693 @@ +/** I2cDxe.c + I2c driver APIs for read, write, initialize, set speed and reset + + Copyright 2017 NXP + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "I2cDxe.h" + +STATIC CONST UINT16 ClkDiv[60][2] = { + { 20, 0x00 }, { 22, 0x01 }, { 24, 0x02 }, { 26, 0x03 }, + { 28, 0x04 }, { 30, 0x05 }, { 32, 0x09 }, { 34, 0x06 }, + { 36, 0x0A }, { 40, 0x07 }, { 44, 0x0C }, { 48, 0x0D }, + { 52, 0x43 }, { 56, 0x0E }, { 60, 0x45 }, { 64, 0x12 }, + { 68, 0x0F }, { 72, 0x13 }, { 80, 0x14 }, { 88, 0x15 }, + { 96, 0x19 }, { 104, 0x16 }, { 112, 0x1A }, { 128, 0x17 }, + { 136, 0x4F }, { 144, 0x1C }, { 160, 0x1D }, { 176, 0x55 }, + { 192, 0x1E }, { 208, 0x56 }, { 224, 0x22 }, { 228, 0x24 }, + { 240, 0x1F }, { 256, 0x23 }, { 288, 0x5C }, { 320, 0x25 }, + { 384, 0x26 }, { 448, 0x2A }, { 480, 0x27 }, { 512, 0x2B }, + { 576, 0x2C }, { 640, 0x2D }, { 768, 0x31 }, { 896, 0x32 }, + { 960, 0x2F }, { 1024, 0x33 }, { 1152, 0x34 },{ 1280, 0x35 }, + { 1536, 0x36 }, { 1792, 0x3A }, { 1920, 0x37 }, { 2048, 0x3B }, + { 2304, 0x3C }, { 2560, 0x3D }, { 3072, 0x3E }, { 3584, 0x7A }, + { 3840, 0x3F }, { 4096, 0x7B }, { 5120, 0x7D }, { 6144, 0x7E }, +}; + +/** + Calculate and return proper clock divider + + @param Rate clock rate + + @retval ClkDiv Value used to get frequency divider value + +**/ +STATIC +UINT8 +GetClkDiv ( + IN UINT32 Rate + ) +{ + UINTN ClkRate; + UINT32 Div; + UINT8 ClkDivx; + + ClkRate = GetBusFrequency (); + + Div = (ClkRate + Rate - 1) / Rate; + + if (Div < ClkDiv[0][0]) { + ClkDivx = 0; + } else if (Div > ClkDiv[ARRAY_SIZE (ClkDiv) - 1][0]){ + ClkDivx = ARRAY_SIZE (ClkDiv) - 1; + } else { + for (ClkDivx = 0; ClkDiv[ClkDivx][0] < Div; ClkDivx++); + } + + return ClkDivx; +} + +/** + Function used to check if i2c is in mentioned state or not + + @param I2cRegs Pointer to I2C registers + @param State i2c state need to be checked + + @retval EFI_NOT_READY Arbitration was lost + @retval EFI_TIMEOUT Timeout occured + @retval CurrState Value of state register + +**/ +STATIC +EFI_STATUS +WaitForI2cState ( + IN I2C_REGS *I2cRegs, + IN UINT32 State + ) +{ + UINT8 CurrState; + UINT64 Cnt; + + for (Cnt = 0; Cnt < 50000; Cnt++) { + MemoryFence (); + CurrState = MmioRead8 ((UINTN)&I2cRegs->I2cSr); + if (CurrState & I2C_SR_IAL) { + MmioWrite8 ((UINTN)&I2cRegs->I2cSr, CurrState | I2C_SR_IAL); + return EFI_NOT_READY; + } + + if ((CurrState & (State >> 8)) == (UINT8)State) { + return CurrState; + } + } + + return EFI_TIMEOUT; +} + +/** + Function to transfer byte on i2c + + @param I2cRegs Pointer to i2c registers + @param Byte Byte to be transferred on i2c bus + + @retval EFI_NOT_READY Arbitration was lost + @retval EFI_TIMEOUT Timeout occured + @retval EFI_NOT_FOUND ACK was not recieved + @retval EFI_SUCCESS Data transfer was succesful + +**/ +STATIC +EFI_STATUS +TransferByte ( + IN I2C_REGS *I2cRegs, + IN UINT8 Byte + ) +{ + EFI_STATUS Ret; + + MmioWrite8 ((UINTN)&I2cRegs->I2cSr, I2C_SR_IIF_CLEAR); + MmioWrite8 ((UINTN)&I2cRegs->I2cDr, Byte); + + Ret = WaitForI2cState (I2cRegs, IIF); + if ((Ret == EFI_TIMEOUT) || (Ret == EFI_NOT_READY)) { + return Ret; + } + + if (Ret & I2C_SR_RX_NO_AK) { + return EFI_NOT_FOUND; + } + + return EFI_SUCCESS; +} + +/** + Function to stop transaction on i2c bus + + @param I2cRegs Pointer to i2c registers + + @retval EFI_NOT_READY Arbitration was lost + @retval EFI_TIMEOUT Timeout occured + @retval EFI_SUCCESS Stop operation was successful + +**/ +STATIC +EFI_STATUS +I2cStop ( + IN I2C_REGS *I2cRegs + ) +{ + INT32 Ret; + UINT32 Temp; + + Temp = MmioRead8 ((UINTN)&I2cRegs->I2cCr); + + Temp &= ~(I2C_CR_MSTA | I2C_CR_MTX); + MmioWrite8 ((UINTN)&I2cRegs->I2cCr, Temp); + + Ret = WaitForI2cState (I2cRegs, BUS_IDLE); + + if (Ret < 0) { + return Ret; + } else { + return EFI_SUCCESS; + } +} + +/** + Function to send start signal, Chip Address and + memory offset + + @param I2cRegs Pointer to i2c base registers + @param Chip Chip Address + @param Offset Slave memory's offset + @param Alen length of chip address + + @retval EFI_NOT_READY Arbitration lost + @retval EFI_TIMEOUT Failed to initialize data transfer in predefined time + @retval EFI_NOT_FOUND ACK was not recieved + @retval EFI_SUCCESS Read was successful + +**/ +STATIC +EFI_STATUS +InitTransfer ( + IN I2C_REGS *I2cRegs, + IN UINT8 Chip, + IN UINT32 Offset, + IN INT32 Alen + ) +{ + UINT32 Temp; + EFI_STATUS Ret; + + // Enable I2C controller + if (MmioRead8 ((UINTN)&I2cRegs->I2cCr) & I2C_CR_IDIS) { + MmioWrite8 ((UINTN)&I2cRegs->I2cCr, I2C_CR_IEN); + } + + if (MmioRead8 ((UINTN)&I2cRegs->I2cAdr) == (Chip << 1)) { + MmioWrite8 ((UINTN)&I2cRegs->I2cAdr, (Chip << 1) ^ 2); + } + + MmioWrite8 ((UINTN)&I2cRegs->I2cSr, I2C_SR_IIF_CLEAR); + Ret = WaitForI2cState (I2cRegs, BUS_IDLE); + if ((Ret == EFI_TIMEOUT) || (Ret == EFI_NOT_READY)) { + return Ret; + } + + // Start I2C transaction + Temp = MmioRead8 ((UINTN)&I2cRegs->I2cCr); + // set to master mode + Temp |= I2C_CR_MSTA; + MmioWrite8 ((UINTN)&I2cRegs->I2cCr, Temp); + + Ret = WaitForI2cState (I2cRegs, BUS_BUSY); + if ((Ret == EFI_TIMEOUT) || (Ret == EFI_NOT_READY)) { + return Ret; + } + + Temp |= I2C_CR_MTX | I2C_CR_TX_NO_AK; + MmioWrite8 ((UINTN)&I2cRegs->I2cCr, Temp); + + // write slave Address + Ret = TransferByte (I2cRegs, Chip << 1); + if (Ret != EFI_SUCCESS) { + return Ret; + } + + if (Alen >= 0) { + while (Alen--) { + Ret = TransferByte (I2cRegs, (Offset >> (Alen * 8)) & 0xff); + if (Ret != EFI_SUCCESS) + return Ret; + } + } + return EFI_SUCCESS; +} + +/** + Function to check if i2c bus is idle + + @param Base Pointer to base address of I2c controller + + @retval EFI_SUCCESS + +**/ +STATIC +INT32 +I2cBusIdle ( + IN VOID *Base + ) +{ + return EFI_SUCCESS; +} + +/** + Function to initiate data transfer on i2c bus + + @param I2cRegs Pointer to i2c base registers + @param Chip Chip Address + @param Offset Slave memory's offset + @param Alen length of chip address + + @retval EFI_NOT_READY Arbitration lost + @retval EFI_TIMEOUT Failed to initialize data transfer in predefined time + @retval EFI_NOT_FOUND ACK was not recieved + @retval EFI_SUCCESS Read was successful + +**/ +STATIC +EFI_STATUS +InitDataTransfer ( + IN I2C_REGS *I2cRegs, + IN UINT8 Chip, + IN UINT32 Offset, + IN INT32 Alen + ) +{ + EFI_STATUS Status; + INT32 Retry; + + for (Retry = 0; Retry < 3; Retry++) { + Status = InitTransfer (I2cRegs, Chip, Offset, Alen); + if (Status == EFI_SUCCESS) { + return EFI_SUCCESS; + } + + I2cStop (I2cRegs); + + if (EFI_NOT_FOUND == Status) { + return Status; + } + + // Disable controller + if (Status != EFI_NOT_READY) { + MmioWrite8 ((UINTN)&I2cRegs->I2cCr, I2C_CR_IDIS); + } + + if (I2cBusIdle (I2cRegs) < 0) { + break; + } + } + return Status; +} + +/** + Function to read data using i2c bus + + @param BaseAddr I2c Controller Base Address + @param Chip Address of slave device from where data to be read + @param Offset Offset of slave memory + @param Alen Address length of slave + @param Buffer A pointer to the destination buffer for the data + @param Len Length of data to be read + + @retval EFI_NOT_READY Arbitration lost + @retval EFI_TIMEOUT Failed to initialize data transfer in predefined time + @retval EFI_NOT_FOUND ACK was not recieved + @retval EFI_SUCCESS Read was successful + +**/ +STATIC +EFI_STATUS +I2cDataRead ( + IN UINTN BaseAddr, + IN UINT8 Chip, + IN UINT32 Offset, + IN UINT32 Alen, + IN UINT8 *Buffer, + IN UINT32 Len + ) +{ + EFI_STATUS Status; + UINT32 Temp; + INT32 I; + I2C_REGS *I2cRegs; + + I2cRegs = (I2C_REGS *)(BaseAddr); + + Status = InitDataTransfer (I2cRegs, Chip, Offset, Alen); + if (Status != EFI_SUCCESS) { + return Status; + } + + Temp = MmioRead8 ((UINTN)&I2cRegs->I2cCr); + Temp |= I2C_CR_RSTA; + MmioWrite8 ((UINTN)&I2cRegs->I2cCr, Temp); + + Status = TransferByte (I2cRegs, (Chip << 1) | 1); + if (Status != EFI_SUCCESS) { + I2cStop (I2cRegs); + return Status; + } + + // setup bus to read data + Temp = MmioRead8 ((UINTN)&I2cRegs->I2cCr); + Temp &= ~(I2C_CR_MTX | I2C_CR_TX_NO_AK); + if (Len == 1) { + Temp |= I2C_CR_TX_NO_AK; + } + + MmioWrite8 ((UINTN)&I2cRegs->I2cCr, Temp); + MmioWrite8 ((UINTN)&I2cRegs->I2cSr, I2C_SR_IIF_CLEAR); + + // Dummy Read to initiate recieve operation + MmioRead8 ((UINTN)&I2cRegs->I2cDr); + + for (I = 0; I < Len; I++) { + Status = WaitForI2cState (I2cRegs, IIF); + if ((Status == EFI_TIMEOUT) || (Status == EFI_NOT_READY)) { + I2cStop (I2cRegs); + return Status; + } + // + // It must generate STOP before read I2DR to prevent + // controller from generating another clock cycle + // + if (I == (Len - 1)) { + I2cStop (I2cRegs); + } else if (I == (Len - 2)) { + Temp = MmioRead8 ((UINTN)&I2cRegs->I2cCr); + Temp |= I2C_CR_TX_NO_AK; + MmioWrite8 ((UINTN)&I2cRegs->I2cCr, Temp); + } + MmioWrite8 ((UINTN)&I2cRegs->I2cSr, I2C_SR_IIF_CLEAR); + Buffer[I] = MmioRead8 ((UINTN)&I2cRegs->I2cDr); + } + + I2cStop (I2cRegs); + + return EFI_SUCCESS; +} + +/** + Function to write data using i2c bus + + @param BaseAddr I2c Controller Base Address + @param Chip Address of slave device where data to be written + @param Offset Offset of slave memory + @param Alen Address length of slave + @param Buffer A pointer to the source buffer for the data + @param Len Length of data to be write + + @retval EFI_NOT_READY Arbitration lost + @retval EFI_TIMEOUT Failed to initialize data transfer in predefined time + @retval EFI_NOT_FOUND ACK was not recieved + @retval EFI_SUCCESS Read was successful + +**/ +STATIC +EFI_STATUS +I2cDataWrite ( + IN UINTN BaseAddr, + IN UINT8 Chip, + IN UINT32 Offset, + IN INT32 Alen, + OUT UINT8 *Buffer, + IN INT32 Len + ) +{ + EFI_STATUS Status; + I2C_REGS *I2cRegs; + INT32 I; + + I2cRegs = (I2C_REGS *)BaseAddr; + + Status = InitDataTransfer (I2cRegs, Chip, Offset, Alen); + if (Status != EFI_SUCCESS) { + return Status; + } + + // Write operation + for (I = 0; I < Len; I++) { + Status = TransferByte (I2cRegs, Buffer[I]); + if (Status != EFI_SUCCESS) { + break; + } + } + + I2cStop (I2cRegs); + return Status; +} + +/** + Function to set i2c bus frequency + + @param This Pointer to I2c master protocol + @param BusClockHertz value to be set + + @retval EFI_SUCCESS Operation successfull +**/ +STATIC +EFI_STATUS +EFIAPI +SetBusFrequency ( + IN CONST EFI_I2C_MASTER_PROTOCOL *This, + IN OUT UINTN *BusClockHertz + ) +{ + I2C_REGS *I2cRegs; + UINT8 ClkId; + UINT8 SpeedId; + NXP_I2C_MASTER *I2c; + + I2c = NXP_I2C_FROM_THIS (This); + + I2cRegs = (I2C_REGS *)(I2c->Dev->Resources[0].AddrRangeMin); + + ClkId = GetClkDiv (*BusClockHertz); + SpeedId = ClkDiv[ClkId][1]; + + // Store divider value + MmioWrite8 ((UINTN)&I2cRegs->I2cFdr, SpeedId); + + MemoryFence (); + + return EFI_SUCCESS; +} + +/** + Function to reset I2c Controller + + @param This Pointer to I2c master protocol + + @return EFI_SUCCESS Operation successfull +**/ +STATIC +EFI_STATUS +EFIAPI +Reset ( + IN CONST EFI_I2C_MASTER_PROTOCOL *This + ) +{ + I2C_REGS *I2cRegs; + NXP_I2C_MASTER *I2c; + + I2c = NXP_I2C_FROM_THIS (This); + + I2cRegs = (I2C_REGS *)(I2c->Dev->Resources[0].AddrRangeMin); + + // Reset module + MmioWrite8 ((UINTN)&I2cRegs->I2cCr, I2C_CR_IDIS); + MmioWrite8 ((UINTN)&I2cRegs->I2cSr, 0); + + MemoryFence (); + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +EFIAPI +StartRequest ( + IN CONST EFI_I2C_MASTER_PROTOCOL *This, + IN UINTN SlaveAddress, + IN EFI_I2C_REQUEST_PACKET *RequestPacket, + IN EFI_EVENT Event OPTIONAL, + OUT EFI_STATUS *I2cStatus OPTIONAL + ) +{ + NXP_I2C_MASTER *I2c; + UINT32 Count; + INT32 Ret; + UINT32 Length; + UINT8 *Buffer; + UINT32 Flag; + UINT32 RegAddress; + UINT32 OffsetLength; + + RegAddress = 0; + + I2c = NXP_I2C_FROM_THIS (This); + + if (RequestPacket->OperationCount <= 0) { + DEBUG ((DEBUG_ERROR,"%a: Operation count is not valid %d\n", + __FUNCTION__, RequestPacket->OperationCount)); + return EFI_INVALID_PARAMETER; + } + + OffsetLength = RequestPacket->Operation[0].LengthInBytes; + RegAddress = *RequestPacket->Operation[0].Buffer; + + for (Count = 1; Count < RequestPacket->OperationCount; Count++) { + Flag = RequestPacket->Operation[Count].Flags; + Length = RequestPacket->Operation[Count].LengthInBytes; + Buffer = RequestPacket->Operation[Count].Buffer; + + if (Length <= 0) { + DEBUG ((DEBUG_ERROR,"%a: Invalid length of buffer %d\n", + __FUNCTION__, Length)); + return EFI_INVALID_PARAMETER; + } + + if (Flag == I2C_FLAG_READ) { + Ret = I2cDataRead (I2c->Dev->Resources[0].AddrRangeMin, SlaveAddress, + RegAddress, OffsetLength, Buffer, Length); + if (Ret != EFI_SUCCESS) { + DEBUG ((DEBUG_ERROR,"%a: I2c read operation failed (error %d)\n", + __FUNCTION__, Ret)); + return Ret; + } + } else if (Flag == I2C_FLAG_WRITE) { + Ret = I2cDataWrite (I2c->Dev->Resources[0].AddrRangeMin, SlaveAddress, + RegAddress, OffsetLength, Buffer, Length); + if (Ret != EFI_SUCCESS) { + DEBUG ((DEBUG_ERROR,"%a: I2c write operation failed (error %d)\n", + __FUNCTION__, Ret)); + return Ret; + } + } else { + DEBUG ((DEBUG_ERROR,"%a: Invalid Flag %d\n", + __FUNCTION__, Flag)); + return EFI_INVALID_PARAMETER; + } + } + + return EFI_SUCCESS; +} + +STATIC CONST EFI_I2C_CONTROLLER_CAPABILITIES I2cControllerCapabilities = { + 0, + 0, + 0, + 0 +}; + +EFI_STATUS +NxpI2cInit ( + IN EFI_HANDLE DriverBindingHandle, + IN EFI_HANDLE ControllerHandle + ) +{ + EFI_STATUS Status; + NON_DISCOVERABLE_DEVICE *Dev; + NXP_I2C_MASTER *I2c; + + Status = gBS->OpenProtocol (ControllerHandle, + &gEdkiiNonDiscoverableDeviceProtocolGuid, + (VOID **)&Dev, DriverBindingHandle, + ControllerHandle, EFI_OPEN_PROTOCOL_BY_DRIVER); + if (EFI_ERROR (Status)) { + return Status; + } + + I2c = AllocateZeroPool (sizeof (NXP_I2C_MASTER)); + + I2c->Signature = NXP_I2C_SIGNATURE; + I2c->I2cMaster.SetBusFrequency = SetBusFrequency; + I2c->I2cMaster.Reset = Reset; + I2c->I2cMaster.StartRequest = StartRequest; + I2c->I2cMaster.I2cControllerCapabilities = &I2cControllerCapabilities; + I2c->Dev = Dev; + + CopyGuid (&I2c->DevicePath.Vendor.Guid, &gEfiCallerIdGuid); + I2c->DevicePath.MmioBase = I2c->Dev->Resources[0].AddrRangeMin; + SetDevicePathNodeLength (&I2c->DevicePath.Vendor, + sizeof (I2c->DevicePath) - sizeof (I2c->DevicePath.End)); + SetDevicePathEndNode (&I2c->DevicePath.End); + + Status = gBS->InstallMultipleProtocolInterfaces (&ControllerHandle, + &gEfiI2cMasterProtocolGuid, (VOID**)&I2c->I2cMaster, + &gEfiDevicePathProtocolGuid, &I2c->DevicePath, + NULL); + + if (EFI_ERROR (Status)) { + FreePool (I2c); + gBS->CloseProtocol (ControllerHandle, + &gEdkiiNonDiscoverableDeviceProtocolGuid, + DriverBindingHandle, + ControllerHandle); + } + + return Status; +} + +EFI_STATUS +NxpI2cRelease ( + IN EFI_HANDLE DriverBindingHandle, + IN EFI_HANDLE ControllerHandle + ) +{ + EFI_I2C_MASTER_PROTOCOL *I2cMaster; + EFI_STATUS Status; + NXP_I2C_MASTER *I2c; + + Status = gBS->HandleProtocol (ControllerHandle, + &gEfiI2cMasterProtocolGuid, + (VOID **)&I2cMaster); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + return Status; + } + + I2c = NXP_I2C_FROM_THIS (I2cMaster); + + Status = gBS->UninstallMultipleProtocolInterfaces (ControllerHandle, + &gEfiI2cMasterProtocolGuid, I2cMaster, + &gEfiDevicePathProtocolGuid, &I2c->DevicePath, + NULL); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = gBS->CloseProtocol (ControllerHandle, + &gEdkiiNonDiscoverableDeviceProtocolGuid, + DriverBindingHandle, + ControllerHandle); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + return Status; + } + + gBS->FreePool (I2c); + + return EFI_SUCCESS; +} diff --git a/Silicon/NXP/Drivers/I2cDxe/I2cDxe.h b/Silicon/NXP/Drivers/I2cDxe/I2cDxe.h new file mode 100644 index 0000000..01eeca4 --- /dev/null +++ b/Silicon/NXP/Drivers/I2cDxe/I2cDxe.h @@ -0,0 +1,96 @@ +/** I2cDxe.h + Header defining the constant, base address amd function for I2C controller + + Copyright 2017 NXP + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __I2C_DXE_H__ +#define __I2C_DXE_H__ + +#include +#include + +#include +#include + +#define I2C_CR_IIEN (1 << 6) +#define I2C_CR_MSTA (1 << 5) +#define I2C_CR_MTX (1 << 4) +#define I2C_CR_TX_NO_AK (1 << 3) +#define I2C_CR_RSTA (1 << 2) + +#define I2C_SR_ICF (1 << 7) +#define I2C_SR_IBB (1 << 5) +#define I2C_SR_IAL (1 << 4) +#define I2C_SR_IIF (1 << 1) +#define I2C_SR_RX_NO_AK (1 << 0) + +#define I2C_CR_IEN (0 << 7) +#define I2C_CR_IDIS (1 << 7) +#define I2C_SR_IIF_CLEAR (1 << 1) + +#define BUS_IDLE (0 | (I2C_SR_IBB << 8)) +#define BUS_BUSY (I2C_SR_IBB | (I2C_SR_IBB << 8)) +#define IIF (I2C_SR_IIF | (I2C_SR_IIF << 8)) + +#define I2C_FLAG_WRITE 0x0 + +#define NXP_I2C_SIGNATURE SIGNATURE_32 ('N', 'I', '2', 'C') +#define NXP_I2C_FROM_THIS(a) CR ((a), NXP_I2C_MASTER, \ + I2cMaster, NXP_I2C_SIGNATURE) +extern EFI_COMPONENT_NAME2_PROTOCOL gNxpI2cDriverComponentName2; + +#pragma pack(1) +typedef struct { + VENDOR_DEVICE_PATH Vendor; + UINT64 MmioBase; + EFI_DEVICE_PATH_PROTOCOL End; +} NXP_I2C_DEVICE_PATH; +#pragma pack() + +typedef struct { + UINT32 Signature; + EFI_I2C_MASTER_PROTOCOL I2cMaster; + NXP_I2C_DEVICE_PATH DevicePath; + NON_DISCOVERABLE_DEVICE *Dev; +} NXP_I2C_MASTER; + +/** + Record defining i2c registers +**/ +typedef struct { + UINT8 I2cAdr; + UINT8 I2cFdr; + UINT8 I2cCr; + UINT8 I2cSr; + UINT8 I2cDr; +} I2C_REGS ; + +extern +UINT64 +GetBusFrequency ( + VOID + ); + +EFI_STATUS +NxpI2cInit ( + IN EFI_HANDLE DriverBindingHandle, + IN EFI_HANDLE ControllerHandle + ); + +EFI_STATUS +NxpI2cRelease ( + IN EFI_HANDLE DriverBindingHandle, + IN EFI_HANDLE ControllerHandle + ); + +#endif diff --git a/Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf b/Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf new file mode 100644 index 0000000..0691362 --- /dev/null +++ b/Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf @@ -0,0 +1,64 @@ +# @file +# +# Component description file for I2c driver +# +# Copyright (c) 2015, Freescale Semiconductor, Inc. All rights reserved. +# Copyright 2017 NXP +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = I2cDxe + FILE_GUID = 5f2927ba-1b04-4d5f-8bef-2b50c635d1e7 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = I2cDxeEntryPoint + UNLOAD = I2cDxeUnload + +[Sources.common] + ComponentName.c + DriverBinding.c + I2cDxe.c + +[LibraryClasses] + ArmLib + BaseMemoryLib + DevicePathLib + IoLib + MemoryAllocationLib + PcdLib + SocLib + TimerLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiLib + +[Guids] + gNxpNonDiscoverableI2cMasterGuid + +[Packages] + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[Protocols] + gEdkiiNonDiscoverableDeviceProtocolGuid ## TO_START + gEfiI2cMasterProtocolGuid ## BY_START + +[Pcd] + gNxpQoriqLsTokenSpaceGuid.PcdI2cSpeed + gNxpQoriqLsTokenSpaceGuid.PcdI2c0BaseAddr + gNxpQoriqLsTokenSpaceGuid.PcdI2cSize + gNxpQoriqLsTokenSpaceGuid.PcdNumI2cController + +[Depex] + TRUE -- 1.9.1