From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=jagadeesh.ujja@arm.com; receiver=edk2-devel@lists.01.org Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id F2DE721962301 for ; Mon, 10 Dec 2018 22:22:02 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 707CC15AD; Mon, 10 Dec 2018 22:22:02 -0800 (PST) Received: from usa.arm.com (a075555-lin.blr.arm.com [10.162.2.152]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E3E003F6A8; Mon, 10 Dec 2018 22:22:00 -0800 (PST) From: Jagadeesh Ujja To: edk2-devel@lists.01.org, liming.gao@intel.com, chao.b.zhang@intel.com, leif.lindholm@linaro.org Date: Tue, 11 Dec 2018 11:51:34 +0530 Message-Id: <1544509302-1000-5-git-send-email-jagadeesh.ujja@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1544509302-1000-1-git-send-email-jagadeesh.ujja@arm.com> References: <1544509302-1000-1-git-send-email-jagadeesh.ujja@arm.com> Subject: [RFC PATCH v4 04/12] MdePkg/Library/BaseLib/AArch64: Add AsmLfence function X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 X-List-Received-Date: Tue, 11 Dec 2018 06:22:03 -0000 Variable service driver includes a call to AsmLfence. To reuse this driver on AArch64 based platforms, add an implementation of AsmLfence that acts as a wrapper on the AArch64 specific MemoryFence function. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jagadeesh Ujja --- MdePkg/Include/Library/BaseLib.h | 10 +++++ MdePkg/Library/BaseLib/AArch64/AsmLfence.S | 42 ++++++++++++++++++++ MdePkg/Library/BaseLib/AArch64/AsmLfence.asm | 41 +++++++++++++++++++ MdePkg/Library/BaseLib/BaseLib.inf | 2 + 4 files changed, 95 insertions(+) diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h index 8cc0869..595cf90 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -126,6 +126,16 @@ typedef struct { #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8 +/** + Performs a serializing operation on all load-from-memory instructions that + were issued prior the AsmLfence function. +**/ +VOID +EFIAPI +AsmLfence ( + VOID + ); + #endif // defined (MDE_CPU_AARCH64) diff --git a/MdePkg/Library/BaseLib/AArch64/AsmLfence.S b/MdePkg/Library/BaseLib/AArch64/AsmLfence.S new file mode 100644 index 0000000..2fd804b --- /dev/null +++ b/MdePkg/Library/BaseLib/AArch64/AsmLfence.S @@ -0,0 +1,42 @@ +##------------------------------------------------------------------------------ +# +# AsmLfence() for AArch64 +# +# Copyright (c) 2013-2018, ARM Ltd. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +##------------------------------------------------------------------------------ + +.text +.p2align 2 + +GCC_ASM_EXPORT(AsmLfence) + +# IMPORT +GCC_ASM_IMPORT(MemoryFence) + +#/** +# Used to serialize load and store operations. +# +# All loads and stores that proceed calls to this function are guaranteed to be +# globally visible when this function returns. +# +#**/ +#VOID +#EFIAPI +#AsmLfence ( +# VOID +# ); +# +ASM_PFX(AsmLfence): + stp x29, x30, [sp, #-16]! + bl MemoryFence + ldp x29, x30, [sp], #0x10 + ret diff --git a/MdePkg/Library/BaseLib/AArch64/AsmLfence.asm b/MdePkg/Library/BaseLib/AArch64/AsmLfence.asm new file mode 100644 index 0000000..7dd5659 --- /dev/null +++ b/MdePkg/Library/BaseLib/AArch64/AsmLfence.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; AsmLfence() for AArch64 +; +; Copyright (c) 2013-2018, ARM Ltd. All rights reserved. +; +; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;------------------------------------------------------------------------------ + + EXPORT AsmLfence + AREA BaseLib_LowLevel, CODE, READONLY + # IMPORT + GCC_ASM_IMPORT(MemoryFence) + +;/** +; Used to serialize load and store operations. +; +; All loads and stores that proceed calls to this function are guaranteed to be +; globally visible when this function returns. +; +;**/ +;VOID +;EFIAPI +;AsmLfence ( +; VOID +; ); +; +AsmLfence + stp x29, x30, [sp, #-16]! + bl MemoryFence + ldp x29, x30, [sp], #0x10 + ret + + END diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index b84e583..b7d7bcb 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -585,6 +585,7 @@ Math64.c AArch64/MemoryFence.S | GCC + AArch64/AsmLfence.S | GCC AArch64/SwitchStack.S | GCC AArch64/EnableInterrupts.S | GCC AArch64/DisableInterrupts.S | GCC @@ -593,6 +594,7 @@ AArch64/CpuBreakpoint.S | GCC AArch64/MemoryFence.asm | MSFT + AArch64/AsmLfence.asm | MSFT AArch64/SwitchStack.asm | MSFT AArch64/EnableInterrupts.asm | MSFT AArch64/DisableInterrupts.asm | MSFT -- 2.7.4