From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=tien.hock.loh@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CAE312194EB70 for ; Thu, 21 Feb 2019 23:53:13 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Feb 2019 23:53:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,398,1544515200"; d="scan'208";a="146371388" Received: from pg-iccf0308.altera.com ([10.104.2.61]) by fmsmga004.fm.intel.com with ESMTP; 21 Feb 2019 23:53:11 -0800 From: tien.hock.loh@intel.com To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, thloh85@gmail.com Date: Fri, 22 Feb 2019 15:52:45 +0800 Message-Id: <1550821967-1630-3-git-send-email-tien.hock.loh@intel.com> X-Mailer: git-send-email 2.2.2 In-Reply-To: <1550821967-1630-1-git-send-email-tien.hock.loh@intel.com> References: <1550821967-1630-1-git-send-email-tien.hock.loh@intel.com> Subject: [PATCH 2/4] EmbeddedPkg/DwEmmc: Fix SendCommand parameters X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 22 Feb 2019 07:53:14 -0000 From: "Loh, Tien Hock" Only send BIT_CMD_CHECK_RESPONSE_CRC if MMC commands needs it. Fixes parameters to ACMD6 where if CMD is application command, ie. CMD55 is sent before ACMD6, to do response instead of data transfer. Added CMD51 handling as CMD51 is a data transfer, and needs BIT_CMD_READ and BIT_CMD_DATA_EXPECTED to be set. Updates DwEmmcReceiveResponse to SendCommand only if IsPendingReadCommand or IsPendingWriteCommand is true. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Loh Tien Hock --- EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c | 59 +++++++++++++++++++++++-------- 1 file changed, 45 insertions(+), 14 deletions(-) diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c index 6d0f472..600ab01 100644 --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c @@ -45,6 +45,7 @@ DWEMMC_IDMAC_DESCRIPTOR *gpIdmacDesc; EFI_GUID mDwEmmcDevicePathGuid = EFI_CALLER_ID_GUID; STATIC UINT32 mDwEmmcCommand; STATIC UINT32 mDwEmmcArgument; +STATIC BOOLEAN mIsACmd = FALSE; EFI_STATUS DwEmmcReadBlockData ( @@ -321,68 +322,93 @@ DwEmmcSendCommand ( break; case MMC_INDX(2): Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_LONG_RESPONSE | - BIT_CMD_CHECK_RESPONSE_CRC | BIT_CMD_SEND_INIT; + BIT_CMD_SEND_INIT; break; case MMC_INDX(3): - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_SEND_INIT; break; + case MMC_INDX(6): + if(mIsACmd) { + Cmd = BIT_CMD_RESPONSE_EXPECT ; + } + else { + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_DATA_EXPECTED | + BIT_CMD_READ; + } + break; case MMC_INDX(7): if (Argument) - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; + Cmd = BIT_CMD_RESPONSE_EXPECT; else Cmd = 0; break; case MMC_INDX(8): - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | - BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_WAIT_PRVDATA_COMPLETE; break; case MMC_INDX(9): - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_LONG_RESPONSE; break; case MMC_INDX(12): - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_STOP_ABORT_CMD; break; case MMC_INDX(13): - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_WAIT_PRVDATA_COMPLETE; break; case MMC_INDX(16): - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | BIT_CMD_WAIT_PRVDATA_COMPLETE; break; case MMC_INDX(17): case MMC_INDX(18): - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | BIT_CMD_WAIT_PRVDATA_COMPLETE; break; case MMC_INDX(24): case MMC_INDX(25): - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_DATA_EXPECTED | BIT_CMD_WRITE | BIT_CMD_WAIT_PRVDATA_COMPLETE; break; case MMC_INDX(30): - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_DATA_EXPECTED; break; + case MMC_INDX(51): + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_DATA_EXPECTED | + BIT_CMD_READ | BIT_CMD_WAIT_PRVDATA_COMPLETE; + break; default: - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; + Cmd = BIT_CMD_RESPONSE_EXPECT ; break; } Cmd |= MMC_GET_INDX(MmcCmd) | BIT_CMD_USE_HOLD_REG | BIT_CMD_START; + + if(MMC_INDX(55) == MMC_GET_INDX(MmcCmd)) + mIsACmd = TRUE; + else + mIsACmd = FALSE; + + if (!(MmcCmd & MMC_CMD_NO_CRC_RESPONSE)) { + Cmd |= BIT_CMD_CHECK_RESPONSE_CRC; + } + if (IsPendingReadCommand (Cmd) || IsPendingWriteCommand (Cmd)) { mDwEmmcCommand = Cmd; mDwEmmcArgument = Argument; } else { + mDwEmmcCommand = Cmd; + mDwEmmcArgument = Argument; Status = SendCommand (Cmd, Argument); } + return Status; } @@ -393,6 +419,11 @@ DwEmmcReceiveResponse ( IN UINT32* Buffer ) { + EFI_STATUS Status = EFI_SUCCESS; + + if(IsPendingReadCommand (mDwEmmcCommand) || IsPendingWriteCommand(mDwEmmcCommand)) + Status = SendCommand (mDwEmmcCommand, mDwEmmcArgument); + if (Buffer == NULL) { return EFI_INVALID_PARAMETER; } @@ -410,7 +441,7 @@ DwEmmcReceiveResponse ( Buffer[2] = MmioRead32 (DWEMMC_RESP2); Buffer[3] = MmioRead32 (DWEMMC_RESP3); } - return EFI_SUCCESS; + return Status; } VOID -- 2.2.2