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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id v141sm2941504lfa.52.2019.04.16.02.23.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 16 Apr 2019 02:23:04 -0700 (PDT) From: "Marcin Wojtas" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com, jeremy.linton@arm.com, Jici.Gao@arm.com, Mark Kettenis Subject: [edk2-platforms: PATCH v2 1/6] Marvell/Armada7k8k: RealTimeClockLib: Update bus parameters Date: Tue, 16 Apr 2019 11:22:21 +0200 Message-Id: <1555406546-5261-2-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1555406546-5261-1-git-send-email-mw@semihalf.com> References: <1555406546-5261-1-git-send-email-mw@semihalf.com> From: Mark Kettenis Adjust bus timing parameters to make reading and updating the RTC reliable. This patch aligns the bus configuration to the one used by Linux. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h | 7 ++++++- Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c | 5 +++++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h index 922f959..ee0c303 100644 --- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h +++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h @@ -41,10 +41,15 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define RTC_IRQ_2_CONFIG_REG 0x8 #define RTC_IRQ_ALARM_EN 0x1 #define RTC_ALARM_2_REG 0x14 +#define RTC_BRIDGE_TIMING_CTRL0_REG_OFFS 0x80 #define RTC_BRIDGE_TIMING_CTRL1_REG_OFFS 0x84 #define RTC_IRQ_STATUS_REG 0x90 #define RTC_IRQ_ALARM_MASK 0x1 +#define RTC_WRITE_PERIOD_DELAY_MASK 0xFFFF +#define RTC_WRITE_PERIOD_DELAY_DEFAULT 0x3FF +#define RTC_WRITE_SETUP_DELAY_MASK (0xFFFF << 16) +#define RTC_WRITE_SETUP_DELAY_DEFAULT (0x29 << 16) #define RTC_READ_OUTPUT_DELAY_MASK 0xFFFF -#define RTC_READ_OUTPUT_DELAY_DEFAULT 0x1F +#define RTC_READ_OUTPUT_DELAY_DEFAULT 0x3F #endif /* __RTCLIB_H__ */ diff --git a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c index 087bd9a..7de5ed7 100644 --- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c +++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c @@ -250,6 +250,11 @@ LibRtcInitialize ( /* Update RTC-MBUS bridge timing parameters */ MmioAndThenOr32 ( + mArmadaRtcBase + RTC_BRIDGE_TIMING_CTRL0_REG_OFFS, + ~(RTC_WRITE_SETUP_DELAY_MASK | RTC_WRITE_PERIOD_DELAY_MASK), + (RTC_WRITE_SETUP_DELAY_DEFAULT | RTC_WRITE_PERIOD_DELAY_DEFAULT) + ); + MmioAndThenOr32 ( mArmadaRtcBase + RTC_BRIDGE_TIMING_CTRL1_REG_OFFS, ~RTC_READ_OUTPUT_DELAY_MASK, RTC_READ_OUTPUT_DELAY_DEFAULT -- 2.7.4