From: "Marcin Wojtas" <mw@semihalf.com>
To: devel@edk2.groups.io
Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org,
nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com,
jaz@semihalf.com, kostap@marvell.com, jeremy.linton@arm.com,
Jici.Gao@arm.com
Subject: [edk2-platforms: PATCH v2 6/6] Marvell/Armada80x0Db: Configure the CP1, comphy-2 to work with SFI 10G
Date: Tue, 16 Apr 2019 11:22:26 +0200 [thread overview]
Message-ID: <1555406546-5261-7-git-send-email-mw@semihalf.com> (raw)
In-Reply-To: <1555406546-5261-1-git-send-email-mw@semihalf.com>
From: Grzegorz Jaszczyk <jaz@semihalf.com>
By mistake port0 of the second PP2 controller was configured
to 5G speed, instead of 10G. Fix it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
index a28e330..c6510bb 100644
--- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
+++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
@@ -137,7 +137,7 @@
# 4: PCIE1 5 Gbps
# 5: PCIE2 5 Gbps
gMarvellTokenSpaceGuid.PcdChip1ComPhyTypes|{ $(CP_PCIE0), $(CP_SATA2), $(CP_SFI), $(CP_SATA3), $(CP_PCIE1), $(CP_PCIE2) }
- gMarvellTokenSpaceGuid.PcdChip1ComPhySpeeds|{ $(CP_5G), $(CP_5G), $(CP_5_15625G), $(CP_5G), $(CP_5G), $(CP_5G) }
+ gMarvellTokenSpaceGuid.PcdChip1ComPhySpeeds|{ $(CP_5G), $(CP_5G), $(CP_10_3125G), $(CP_5G), $(CP_5G), $(CP_5G) }
#UtmiPhy
gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled|{ 0x1, 0x1, 0x1, 0x0 }
--
2.7.4
next prev parent reply other threads:[~2019-04-16 9:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-16 9:22 [edk2-platforms: PATCH v2 0/6] Armada7k8k misc improvements Marcin Wojtas
2019-04-16 9:22 ` [edk2-platforms: PATCH v2 1/6] Marvell/Armada7k8k: RealTimeClockLib: Update bus parameters Marcin Wojtas
2019-04-16 9:22 ` [edk2-platforms: PATCH v2 2/6] Marvell/Armada7k8k: AcpiTables: Enable edge trigger of PMU interrupt Marcin Wojtas
2019-04-16 9:22 ` [edk2-platforms: PATCH v2 3/6] Marvell/Armada7k8k: Implement PMU interrupt handling Marcin Wojtas
2019-04-16 18:51 ` Ard Biesheuvel
2019-04-16 9:22 ` [edk2-platforms: PATCH v2 4/6] Marvell/Armada7k8k: Switch to software-based watchdog Marcin Wojtas
2019-04-16 9:22 ` [edk2-platforms: PATCH v2 5/6] Marvell/Armada7k8k: ArmadaSoCDescLib: Add more I2C controllers Marcin Wojtas
2019-04-16 9:22 ` Marcin Wojtas [this message]
2019-04-16 18:51 ` [edk2-platforms: PATCH v2 0/6] Armada7k8k misc improvements Ard Biesheuvel
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