From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=w0johEKJ; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.208.196, mailfrom: mw@semihalf.com) Received: from mail-lj1-f196.google.com (mail-lj1-f196.google.com [209.85.208.196]) by groups.io with SMTP; Wed, 17 Apr 2019 11:06:15 -0700 Received: by mail-lj1-f196.google.com with SMTP id v22so23297136lje.9 for ; Wed, 17 Apr 2019 11:06:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=fe5oJDwhHeoJWR9m4FLxGZ/j1GwsEckBqw5T5HJjrK0=; b=w0johEKJiJnKiTQbqL5oO7rBbbfGbq1QvgDDuugb7D7TE8jtyXmYSmT2sxuEU58AQ/ obyWIOnfhgFPoTgHIHnNCkXGZMd0mfwB3n4OwU6EjE7kMib1FE4hWzvXrKEk4D/mpBmY d+g91lhMWDtVZpoqdCgufsDm2v2fBGNwGj0CLN58S58bVx4XhabwWWjjRtJLA8wY0z6a a64YkkOPmCVLswFqVmoFVYAsAL2yEi/naEVMfGOOmD250bq8DqzvbnOXLtzsMniTaU7u Y3czOsJi3njPSAFVoT9+qvR8h5U0malNe/hp5yMrYryZ/V3ARsJDICh9LnCn0EAFabwg qtvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=fe5oJDwhHeoJWR9m4FLxGZ/j1GwsEckBqw5T5HJjrK0=; b=kGwMS97+3ceHfR5s/qwDtO0aciuHw8LpYmF/pas9jJoxuEZOSx9dWIdUeeCuzRjUKW 1kcbqLGjYWgOolLxDKuuPG0jtWOEhEKmtuA4qbZUt1bHd+CKNjO8pqw4B31D4gPNF7Ur bkP35+powuHDasIXkE1eALOy7npCb9Aowv7v9VXUumXk+mnQ+GgWs8BCeL9aW3jtLZK9 XvSBJVJ2nLsp8J/RJCiN87t15tppLUsEyaYkZhgSbBcG2iv4PfuSNmipwI25YDJHNtyd pX834kND9cgbz86xCQOvcePb6jE2sqHyONDJU7nD6cd2/oMLOZ4bXuxpxOrNBg988NTw n7Ng== X-Gm-Message-State: APjAAAXCD56N6akh4//lQJckTjvL4QtfMTMcnsm95Liq1/o1XHo+rOHr tgqHIUIwytre5iYS4lVPYSO3YfYwuR1t2g== X-Google-Smtp-Source: APXvYqwNDoDH2Ex0IA4Sec+bTCqv7PSM7H++5m+OjbFQ9oG0H4mYA8DYQ0gEgIZz09ovgpjdSPckwg== X-Received: by 2002:a2e:8e96:: with SMTP id z22mr47907301ljk.123.1555524373214; Wed, 17 Apr 2019 11:06:13 -0700 (PDT) Return-Path: Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id r3sm11147375ljr.7.2019.04.17.11.06.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 17 Apr 2019 11:06:12 -0700 (PDT) From: "Marcin Wojtas" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com, Jici.Gao@arm.com Subject: [edk2-platforms: PATCH 0/3] Armada7k8k FVB improvements Date: Wed, 17 Apr 2019 20:05:53 +0200 Message-Id: <1555524356-1740-1-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 Hi, Here's another short patchset from my stack. The changes introduce support additional method of preventing hang when accessing variables from the OS. Also a support is added for platforms with the SPI whose memory-mapped access is not configured (or even possible). The patches are available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/fvb-upstream-r20190417 I'm looking forward to your comments or remarks. Best regards, Marcin Hanna Hawa (1): Marvell/Drivers: MvFvbDxe: Change Pcd parameters to be 64 bit Kornel Duleba (1): Marvell/Drivers: Add non-mmio mode to MvFvbDxe Marcin Wojtas (1): Marvell/Drivers: MvSpiOrionDxe: Keep clock enabled at runtime Silicon/Marvell/Marvell.dec | 13 +- Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 10 +- Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf | 17 +- Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf | 3 + Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.h | 1 + Silicon/Marvell/Include/Protocol/Spi.h | 10 ++ Silicon/Marvell/Include/Protocol/SpiFlash.h | 7 + Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c | 180 ++++++++++++++++---- Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c | 11 ++ Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.c | 63 ++++++- 10 files changed, 269 insertions(+), 46 deletions(-) -- 2.7.4