From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: tien.hock.loh@intel.com) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by groups.io with SMTP; Tue, 23 Apr 2019 20:08:14 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Apr 2019 20:08:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,388,1549958400"; d="scan'208";a="138293580" Received: from pg-nx14.altera.com ([10.104.4.29]) by orsmga006.jf.intel.com with ESMTP; 23 Apr 2019 20:08:12 -0700 From: tien.hock.loh@intel.com To: devel@edk2.groups.io, thloh85@gmail.com Cc: "Tien Hock, Loh" , Jian J Wang , Hao Wu Subject: [PATCH 1/1] MdeModulePkg: BaseSerialPortLib16550: Add Mmio32 support Date: Wed, 24 Apr 2019 11:08:08 +0800 Message-Id: <1556075288-193104-1-git-send-email-tien.hock.loh@intel.com> X-Mailer: git-send-email 2.2.2 From: "Tien Hock, Loh" Some busses doesn't allow 8 bit MMIO read/write, this adds support for 32 bits read/write Signed-off-by: "Tien Hock, Loh" Cc: Jian J Wang Cc: Hao Wu -- v2: - Updates the Pcd name to PcdSerialMmio32BitAccess and access 32 bits register if PcdSerialUseMmio and PcdSerialMmio32BitAccess is set --- .../BaseSerialPortLib16550/BaseSerialPortLib16550.c | 16 ++++++++-------- .../BaseSerialPortLib16550/BaseSerialPortLib16550.inf | 2 +- MdeModulePkg/MdeModulePkg.dec | 12 +++++++----- 3 files changed, 16 insertions(+), 14 deletions(-) diff --git a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c index b242b23..f90fb55 100644 --- a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c +++ b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c @@ -76,10 +76,10 @@ SerialPortReadRegister ( UINTN Offset ) { - if (PcdGetBool (PcdSerialUseMmio32)) { - return (UINT8) MmioRead32 (Base + Offset * PcdGet32 (PcdSerialRegisterStride)); - } - else if (PcdGetBool (PcdSerialUseMmio)) { + if (PcdGetBool (PcdSerialUseMmio)) { + if (PcdGetBool (PcdSerialMmio32BitAccess)) { + return (UINT8) MmioRead32 (Base + Offset * PcdGet32 (PcdSerialRegisterStride)); + } return MmioRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride)); } else { return IoRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride)); @@ -106,10 +106,10 @@ SerialPortWriteRegister ( UINT8 Value ) { - if (PcdGetBool (PcdSerialUseMmio32)) { - return MmioWrite32 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), (UINT8)Value); - } - else if (PcdGetBool (PcdSerialUseMmio)) { + if (PcdGetBool (PcdSerialUseMmio)) { + if (PcdGetBool (PcdSerialMmio32BitAccess)) { + return (UINT8) MmioWrite32 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), (UINT8)Value); + } return MmioWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value); } else { return IoWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value); diff --git a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf index 575728a..c03d90d 100644 --- a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf +++ b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf @@ -29,7 +29,7 @@ BaseSerialPortLib16550.c [Pcd] - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio32 ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialMmio32BitAccess ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## SOMETIMES_CONSUMES diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 4e53625..f868850 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -1170,11 +1170,13 @@ # @Prompt Serial port registers use MMIO. gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE|BOOLEAN|0x00020000 - ## Indicates the 16550 serial port registers are in MMIO 32 bit space, or in I/O space. Default is I/O space.

- # TRUE - 16550 serial port registers are in MMIO 32 bit space.
- # FALSE - 16550 serial port registers are in I/O space.
- # @Prompt Serial port registers use MMIO. - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio32|FALSE|BOOLEAN|0x00020007 + ## Indicates the access mode for 16550 serial port registers when they are in MMIO space. + # The PCD is only valid if PcdSerialUseMmio is set to TRUE. + # Default is 8-bit access mode.

+ # TRUE - 16550 serial port MMIO registers are accessed in 32-bit width.
+ # FALSE - 16550 serial port MMIO registers are accessed in 8-bit width.
+ # @Prompt Serial port MMIO registers access mode. + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialMmio32BitAccess|FALSE|BOOLEAN|0x00020007 ## Indicates if the 16550 serial port hardware flow control will be enabled. Default is FALSE.

# TRUE - 16550 serial port hardware flow control will be enabled.
-- 2.2.2