From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: tien.hock.loh@intel.com) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by groups.io with SMTP; Thu, 25 Apr 2019 23:27:43 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Apr 2019 23:27:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,396,1549958400"; d="scan'208";a="137605477" Received: from pg-nx14.altera.com ([10.104.4.29]) by orsmga008.jf.intel.com with ESMTP; 25 Apr 2019 23:27:40 -0700 From: "Loh, Tien Hock" To: devel@edk2.groups.io, thloh85@gmail.com Cc: "Tien Hock, Loh" , Jian J Wang , Hao Wu Subject: [PATCH v5 1/1] MdeModulePkg: BaseSerialPortLib16550: Add Mmio32 support Date: Fri, 26 Apr 2019 14:26:44 +0800 Message-Id: <1556260004-121902-1-git-send-email-tien.hock.loh@intel.com> X-Mailer: git-send-email 2.2.2 From: "Tien Hock, Loh" Some busses doesn't allow 8 bit MMIO read/write, this adds support for 32 bits read/write Signed-off-by: "Tien Hock, Loh" Cc: Jian J Wang Cc: Hao Wu --- v5 - Updates function header comments - Change the implementation to eliminate unnecessary else clause v4 - Updates Pcd name to a better name: PcdSerialRegisterAccessWidth v3 - Updates the Pcd to be UINT8 to allow more options such as 16 bits access in the future - Updated copyright date v2 - Updates the Pcd name to PcdSerialMmio32BitAccess and access 32 bits register if PcdSerialUseMmio and PcdSerialMmio32BitAccess is set --- .../BaseSerialPortLib16550/BaseSerialPortLib16550.c | 14 +++++++++++--- .../BaseSerialPortLib16550/BaseSerialPortLib16550.inf | 3 ++- MdeModulePkg/MdeModulePkg.dec | 7 +++++++ 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c index 34df34d..bbae379 100644 --- a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c +++ b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c @@ -2,7 +2,7 @@ 16550 UART Serial Port library functions (C) Copyright 2014 Hewlett-Packard Development Company, L.P.
- Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
Copyright (c) 2018, AMD Incorporated. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -62,7 +62,8 @@ typedef struct { Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from MMIO space. If PcdSerialUseMmio is FALSE, then the value is read from I/O space. The parameter Offset is added to the base address of the 16550 registers that is specified - by PcdSerialRegisterBase. + by PcdSerialRegisterBase. PcdSerialRegisterAccessWidth specifies the MMIO space access + width and defaults to 8 bit access, and supports 8 or 32 bit access. @param Base The base address register of UART device. @param Offset The offset of the 16550 register to read. @@ -77,6 +78,9 @@ SerialPortReadRegister ( ) { if (PcdGetBool (PcdSerialUseMmio)) { + if (PcdGet8 (PcdSerialRegisterAccessWidth) == 32) { + return (UINT8) MmioRead32 (Base + Offset * PcdGet32 (PcdSerialRegisterStride)); + } return MmioRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride)); } else { return IoRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride)); @@ -87,7 +91,8 @@ SerialPortReadRegister ( Write an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is written to MMIO space. If PcdSerialUseMmio is FALSE, then the value is written to I/O space. The parameter Offset is added to the base address of the 16550 registers that is specified - by PcdSerialRegisterBase. + by PcdSerialRegisterBase. PcdSerialRegisterAccessWidth specifies the MMIO space access + width and defaults to 8 bit access, and supports 8 or 32 bit access. @param Base The base address register of UART device. @param Offset The offset of the 16550 register to write. @@ -104,6 +109,9 @@ SerialPortWriteRegister ( ) { if (PcdGetBool (PcdSerialUseMmio)) { + if (PcdGet8 (PcdSerialRegisterAccessWidth) == 32) { + return (UINT8) MmioWrite32 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), (UINT8)Value); + } return MmioWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value); } else { return IoWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value); diff --git a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf index b60779c..8b4ae3f 100644 --- a/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf +++ b/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf @@ -1,7 +1,7 @@ ## @file # SerialPortLib instance for 16550 UART. # -# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -29,6 +29,7 @@ BaseSerialPortLib16550.c [Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth ## SOMETIMES_CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## SOMETIMES_CONSUMES diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index be84916..2ef48f2 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -1170,6 +1170,13 @@ # @Prompt Serial port registers use MMIO. gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE|BOOLEAN|0x00020000 + ## Indicates the access width for 16550 serial port registers. + # Default is 8-bit access mode.

+ # 8 - 16550 serial port registers are accessed in 8-bit width.
+ # 32 - 16550 serial port registers are accessed in 32-bit width.
+ # @Prompt Serial port register access width. + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|8|UINT8|0x00020007 + ## Indicates if the 16550 serial port hardware flow control will be enabled. Default is FALSE.

# TRUE - 16550 serial port hardware flow control will be enabled.
# FALSE - 16550 serial port hardware flow control will be disabled.
-- 2.2.2