From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: tien.hock.loh@intel.com) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by groups.io with SMTP; Tue, 07 May 2019 04:09:47 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 May 2019 04:09:40 -0700 X-ExtLoop1: 1 Received: from pg-nx11.altera.com ([10.104.4.26]) by fmsmga006.fm.intel.com with ESMTP; 07 May 2019 04:09:38 -0700 From: "Loh, Tien Hock" To: devel@edk2.groups.io, thloh85@gmail.com Cc: "tien.hock.loh" , "Tien Hock, Loh" , Jian J Wang , Hao Wu , "Zhu, YongHong" Subject: [PATCH 1/1] MdeModulePkg: BaseSerialPortLib16550: Update Mmio32 to UNI Date: Tue, 7 May 2019 19:08:01 +0800 Message-Id: <1557227281-170969-1-git-send-email-tien.hock.loh@intel.com> X-Mailer: git-send-email 2.2.2 From: "tien.hock.loh" Some busses doesn't allow 8 bit MMIO read/write, this adds support for 32 bits read/write. This patch adds the UNI information on the new Pcd introduced - PcdSerialRegisterAccessWidth Signed-off-by: "Tien Hock, Loh" Cc: Jian J Wang Cc: Hao Wu Cc: "Zhu, YongHong" Signed-off-by: tien.hock.loh --- MdeModulePkg/MdeModulePkg.uni | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MdeModulePkg/MdeModulePkg.uni b/MdeModulePkg/MdeModulePkg.uni index cf2aefa7ad..654dfeadb0 100644 --- a/MdeModulePkg/MdeModulePkg.uni +++ b/MdeModulePkg/MdeModulePkg.uni @@ -160,6 +160,12 @@ "TRUE - 16550 serial port registers are in MMIO space.
\n" "FALSE - 16550 serial port registers are in I/O space.
" +#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdSerialRegisterAccessWidth_PROMPT #language en-US "Serial port registers access width" + +#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdSerialRegisterAccessWidth_HELP #language en-US "Sets the 16550 serial port registers access width in MMIO space. Default is 8 bits access.

\n" + "8 - 16550 serial port MMIO register access are in 8 bits mode.
\n" + "32 - 16550 serial port MMIO registers acess are in 32 bits mode..
" + #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdSerialUseHardwareFlowControl_PROMPT #language en-US "Enable serial port hardware flow control" #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdSerialUseHardwareFlowControl_HELP #language en-US "Indicates if the 16550 serial port hardware flow control will be enabled. Default is FALSE.

\n" -- 2.13.0