From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=xaAe1VfQ; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.208.182, mailfrom: mw@semihalf.com) Received: from mail-lj1-f182.google.com (mail-lj1-f182.google.com [209.85.208.182]) by groups.io with SMTP; Fri, 24 May 2019 08:59:30 -0700 Received: by mail-lj1-f182.google.com with SMTP id w1so9147059ljw.0 for ; Fri, 24 May 2019 08:59:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=YmG7eQFrxN4gsg18IaDfNYj6Ld49p6EIyKkHiLzwVqk=; b=xaAe1VfQmZaUCsM51wrgRwuFTqWJT+UGSSayANAZDj4/NeDGslnPaAFtA79ja4VFpO jj4H9x0wL2Y5Fz9OAnHk/rND55VtLGv6hlo/+JQT8lN3NbQbltL+fl8yIjvEc6LE2Xjj c2aXDPIC7JOMzrBddgQYKEpOn/RwQQA1TTYMlTuwEUNVMfxvCAYVNAQhk1uc8dbfuD6w APlB2J5JvMjiMM7L+d/C3UD5TKiUQXWmk1XtgtPuz2q3MqXAOAYPvSXvbEqOT1gyUBGq T1oMFO/w+1lzZBd/o4RmJ2pTx4PajMb2W7ObmwNFeAuZSdrKYq6GnS5Q3xAd7enExfc1 I93Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=YmG7eQFrxN4gsg18IaDfNYj6Ld49p6EIyKkHiLzwVqk=; b=XGmVmpfUNbtsjgno7nlgEre6BFfrRBbPsPA+jDSQzDe8YvBITUd6aSZ2ut8lJX5q59 56a3zL9Ux0W9pBTLhXn4ZSeu9iCsOKTxFrOgXQ7dUKbS9BuLt4hyuHUuDIomyyUB8wLy tjgJDmKqR6ZRwB26WKSM0PmzXESG6k6Zmml+bZffU6MEUsTr6hTqNIUieWRudpVpdEZ8 3xw4ups9+szCTGr8W+d7FIdVtLsZX40LmTUL3+i5tE8Wnex/V6kR3NtJEKhiLwcDDcsF 1XWWRYdUw+2JTEEbkiHcVrGyIrMIvnjFnLJdCITSqJVu5O1s4WqSXjqZ/UMOazZSBn6m TD/Q== X-Gm-Message-State: APjAAAXZclkKOjoQU6K+C0eIwFAaWnWp4FLxaQDzPBH6RSoFawvs4k/M 8z9zUjiIe9c14dO2cVDdf9SUw/S+HUJUgQ== X-Google-Smtp-Source: APXvYqwBu8r5DHVA/Nb34zSYAbWgEjJKchH18rg0WLhOO+bWuX5AP22biNSyVtY2FznY3RcG0WYFeQ== X-Received: by 2002:a2e:2bd7:: with SMTP id r84mr21008896ljr.91.1558713567758; Fri, 24 May 2019 08:59:27 -0700 (PDT) Return-Path: Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id d18sm685280lfl.95.2019.05.24.08.59.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 May 2019 08:59:26 -0700 (PDT) From: "Marcin Wojtas" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com, Jici.Gao@arm.com, rebecca@bluestop.org, kettenis@jive.eu Subject: [edk2-platforms: PATCH v3 00/14] Armada7k8k PCIE support Date: Fri, 24 May 2019 17:58:57 +0200 Message-Id: <1558713551-25363-1-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 Hi, The v3 of Armada PCIE support brings one change - the custom PciExpressLib was replaced with PciSegmentLib, that will allow to extend the support with more slots available on some platforms. The patches are available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/pcie-upstream-r20190524 I'm looking forward to your comments or remarks. Best regards, Marcin Changelog: v2->v3: * 6/14 - Replace PciExpressLib with PciSegmentLib * 8/14 - Adjust to new dependecies v1->v2: *All - s/PcieBaseAddress/PcieDbiAdress/ *2/14 - fix alignment in comment * 3/14 - add CONST** to library callback * 4/14 - add missing reset GPIO to McBin description * 5/15 - add CONST** to protocol callback * 6/14 - cleanup all casting in file - use MAX_UINTx macros - add Linaro copyright - use MmioWrite8 instead of volatile in PciExpressReadBuffer - correct commient in IgnoreBusDeviceFunction () - fix typo in commit message * 7/10 - correct line endings - use temporary variable for memory description in PciHostBridgeResourceConflict - use MAX_UINTx macros - add comments around stalls and MemoryFence in GPIO reset - keep the reset active for 150ms - assign translation values instead of asserting *8/14 - assign gArmTokenSpaceGuid.PcdPciIoTranslation value in .dsc * 9-11/14 - correct line endings - remove unused methods - extend commit messages with 32k shift description Marcin Wojtas (14): Marvell/Library: MvGpioLib: Extend GPIO pin description Marvell/Library: ArmadaSoCDescLib: Add PCIE information Marvell/Library: ArmadaBoardDescLib: Add PCIE information Marvell/Armada7k8k: Extend board description libraries with PCIE Marvell/Armada7k8k: MvBoardDesc: Extend protocol with PCIE support Marvell/Armada7k8k: Add PciSegmentLib implementation Marvell/Armada7k8k: Implement PciHostBridgeLib Marvell/Armada7k8k: Enable PCIE support Marvell/Armada80x0McBin: Enable ACPI PCIE support Marvell/Armada80x0Db: Enable ACPI PCIE support Marvell/Armada70x0Db: Enable ACPI PCIE support Marvell/Armada80x0McBin: DeviceTree: Use pci-host-generic driver Marvell/Armada7k8k: Remove duplication in .dsc files Marvell/Armada7k8: Add 'acpiview' shell command to build Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 15 + Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 4 +- Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 4 +- Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc | 4 +- Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 5 + Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db.inf | 1 + Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db.inf | 1 + Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf | 1 + Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.inf | 52 + Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciSegmentLib/PciSegmentLib.inf | 33 + Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Pcie.h | 26 + Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Pcie.h | 26 + Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Pcie.h | 26 + Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.h | 95 ++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 6 + Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 46 + Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 20 + Silicon/Marvell/Include/Library/MvGpioLib.h | 1 + Silicon/Marvell/Include/Protocol/BoardDesc.h | 22 + Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c | 48 + Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 4 + Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c | 48 + Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 6 + Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c | 54 + Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 1 + Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.c | 265 ++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.c | 345 +++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciSegmentLib/PciSegmentLib.c | 1390 ++++++++++++++++++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 44 + Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 86 ++ Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 108 ++ Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Mcfg.aslc | 47 + Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 108 ++ Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Mcfg.aslc | 47 + Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 108 ++ Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Mcfg.aslc | 47 + Silicon/Marvell/Armada7k8k/DeviceTree/armada-8040-mcbin.dts | 3 + 37 files changed, 3138 insertions(+), 9 deletions(-) create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.inf create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciSegmentLib/PciSegmentLib.inf create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Pcie.h create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Pcie.h create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Pcie.h create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.h create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.c create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.c create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciSegmentLib/PciSegmentLib.c create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Mcfg.aslc create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Mcfg.aslc create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Mcfg.aslc -- 2.7.4