From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=ajDe7MaU; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.208.193, mailfrom: mw@semihalf.com) Received: from mail-lj1-f193.google.com (mail-lj1-f193.google.com [209.85.208.193]) by groups.io with SMTP; Wed, 07 Aug 2019 16:30:58 -0700 Received: by mail-lj1-f193.google.com with SMTP id h10so15602605ljg.0 for ; Wed, 07 Aug 2019 16:30:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6tDCFA2Hv1ZmZ46WuoMSSwRid0bsgwASdNEO2VcgaPQ=; b=ajDe7MaUNw3DItW3UkyisiTmGB3A/tq9E6jU717Irzrl5LzeKxpYii4tXLbUpJC+cL rPIuy4YAiYSU0l3wi2swC/e/2izeRsx3LbXciO+YmfbX8CZCMzVrnK1R6ZKkhvEweCoe qNjub2nRZ/9LGOeuaHXamN52TLlgYEB+ISXYFurqPQfHXhpPtwPJ1vkWyGLVGUQZzkjx /9eOi6X+NRqKu+YH0MGVRchAWPsSnRicYRhLt/9aJU06xk6xfh/htVhG0LQYgyKJT62e h4xls4YayWf9OUYGOR3t9d4yzDKs4Ze+VR3Z14aGyUDhoFO0xmeTsYONIiqnzgxZKYSa vhAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6tDCFA2Hv1ZmZ46WuoMSSwRid0bsgwASdNEO2VcgaPQ=; b=iyUDMNI9eKjQ7PqPjCotXB192tfcpYB3A3/m59r8cK0fczQOxyPvPdWsvol0fF2FTd Wf8wIDaAV5w76q+kj3E0q0VP2tpidYnYa7qMrxRPlO2WOUGZISffkkarkqRh8PmYWK+G VzHQJLTn83//cbV1DPeyl3YYV5czBS74pn/Mo5ngC5qZw0MwjMPTklPJxWPhwAmV0dY8 VJJ60YW2WAQiF0GDDDAYifUPv/0zsHZeGWo6wSvNMmzZ+kreWYlileWZdKtLRGybM0fM jjCXhXH0V71zz5FQY2DY+Gki+9AQhKwCVvPG7wgK6TgpWpshrMQ/vC11bylUQXoezfiN x1Vg== X-Gm-Message-State: APjAAAVFoxzX/jRTbAtpwzHvKqU1mq7CJz+mJCPfGr8bXBNLdqU6GM8+ VTK0Fs+vO7rOxkeMox7opOsAVyQrV0l4kw== X-Google-Smtp-Source: APXvYqwXohBepOaWrlyaZO5NLs3NU52d7PT4p6/GpbwLrBGDlemUQ2viq/4TFu9H/eu4fUe3iLfZIw== X-Received: by 2002:a05:651c:95:: with SMTP id 21mr6335825ljq.128.1565220656702; Wed, 07 Aug 2019 16:30:56 -0700 (PDT) Return-Path: Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id i62sm18359206lji.14.2019.08.07.16.30.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 07 Aug 2019 16:30:56 -0700 (PDT) From: "Marcin Wojtas" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com Subject: [edk2-platforms: PATCH 5/9] Marvell/Library: MppLib: Allow to configure more Xenon PHYs Date: Thu, 8 Aug 2019 01:30:26 +0200 Message-Id: <1565220630-1653-6-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1565220630-1653-1-git-send-email-mw@semihalf.com> References: <1565220630-1653-1-git-send-email-mw@semihalf.com> Hitherto MppLib code assumed that there could be only two Xenon SdMmc controllers' PHYs. Remove this limitation, so that to support CN913x SoCs, which may have up to 4 of such interfaces. Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Library/MppLib/MppLib.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/Silicon/Marvell/Library/MppLib/MppLib.c b/Silicon/Marvell/Library/MppLib/MppLib.c index 40d9077..f20668d 100644 --- a/Silicon/Marvell/Library/MppLib/MppLib.c +++ b/Silicon/Marvell/Library/MppLib/MppLib.c @@ -139,11 +139,9 @@ SetSdMmcPhyMpp ( case 0: Offset = SD_MMC_PHY_AP_MPP_OFFSET; break; - case 1: + default: Offset = SD_MMC_PHY_CP0_MPP_OFFSET; break; - default: - return; } /* -- 2.7.4