From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=SS0w8uI1; spf=none, err=SPF record not found (domain: semihalf.com, ip: 209.85.208.196, mailfrom: mw@semihalf.com) Received: from mail-lj1-f196.google.com (mail-lj1-f196.google.com [209.85.208.196]) by groups.io with SMTP; Wed, 14 Aug 2019 19:54:40 -0700 Received: by mail-lj1-f196.google.com with SMTP id f9so952686ljc.13 for ; Wed, 14 Aug 2019 19:54:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6tDCFA2Hv1ZmZ46WuoMSSwRid0bsgwASdNEO2VcgaPQ=; b=SS0w8uI1Xm3VF48dm+RCHe4qgzfB/Tu1NpJ94w764rXg74jlF16vDo1mn7TEbRhW6s 0BhPDoL85g+VfLZtq4bWgI13kU9oS7Es24FcGv+s/SLG4XErFndwACir9iOQz+KS88yG 99YSk+i8mvUwfkw9wzFoj60cK2vpkwg3DOJl4THoIYrned2QARIlgdXB+WGbsq4clz+D 0VSJ/jT5XLATxq0xP7Sj9rix28KB9CaxyTzXVQQmCpWICYXGzwthw+LeiDy26EbA9MN3 EYgD18g1s/6HfK+2qR0DZw//q0+J/QMyPahf4Y47iEi+75IWYx1zKalgY3na6dgYolKA 4Deg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6tDCFA2Hv1ZmZ46WuoMSSwRid0bsgwASdNEO2VcgaPQ=; b=qmbaoOTHTeTdePATV6j7MC5St8cFKnjannNDPWhpzw5Slm2GYK21lJtIzDl4HbK53e UMbkfjkflK0wuowua5pdNOBS4N4CQdXy/H3C0TjGTDy3Lr/BZQEZ1c6KiQZfTFRieq7b fgMSm/wEfN8Md71b6onNGNshZVAvum9VXvpE04Q+3dsMhDWG1k0bolvykwhbkawly8m1 jVcFE6YMuftbhuNOJiNC5rhBxhvlARnx+12vTqr9JwCyBjYLWne2X9To5QuK/adi4KcW TrVQYWmLB+/KIg4b5s1fn1/caJOWfXB3R6BwHZ3in7Lo6oqo1UG+lmD+wqeLBxORpeTd yG1Q== X-Gm-Message-State: APjAAAWbI8Ndjc0+bEio/ibq+obeujD9ZqMoPKiuRBN0Us+bSS0lhzI4 Tyf7bbxEAVix/efdqrRfp0JM0f22owp9Yw== X-Google-Smtp-Source: APXvYqxZRKqrbN1xiL94gfPD9u8aM7io6TNtNu5zQ4UBZ2OpR6cOb3pP1lzzb8NckL4rKALW5hQpjQ== X-Received: by 2002:a2e:6101:: with SMTP id v1mr1486371ljb.42.1565837678178; Wed, 14 Aug 2019 19:54:38 -0700 (PDT) Return-Path: Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id n17sm214035lfi.37.2019.08.14.19.54.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Aug 2019 19:54:37 -0700 (PDT) From: "Marcin Wojtas" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com Subject: [edk2-platforms: PATCH v2 06/10] Marvell/Library: MppLib: Allow to configure more Xenon PHYs Date: Thu, 15 Aug 2019 04:54:10 +0200 Message-Id: <1565837654-13258-7-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1565837654-13258-1-git-send-email-mw@semihalf.com> References: <1565837654-13258-1-git-send-email-mw@semihalf.com> Hitherto MppLib code assumed that there could be only two Xenon SdMmc controllers' PHYs. Remove this limitation, so that to support CN913x SoCs, which may have up to 4 of such interfaces. Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Library/MppLib/MppLib.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/Silicon/Marvell/Library/MppLib/MppLib.c b/Silicon/Marvell/Library/MppLib/MppLib.c index 40d9077..f20668d 100644 --- a/Silicon/Marvell/Library/MppLib/MppLib.c +++ b/Silicon/Marvell/Library/MppLib/MppLib.c @@ -139,11 +139,9 @@ SetSdMmcPhyMpp ( case 0: Offset = SD_MMC_PHY_AP_MPP_OFFSET; break; - case 1: + default: Offset = SD_MMC_PHY_CP0_MPP_OFFSET; break; - default: - return; } /* -- 2.7.4