From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.143.35, mailfrom: prvs=0150651a61=abner.chang@hpe.com) Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by groups.io with SMTP; Wed, 04 Sep 2019 04:13:36 -0700 Received: from pps.filterd (m0134423.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x84BBfvk016728 for ; Wed, 4 Sep 2019 11:13:36 GMT Received: from g2t2352.austin.hpe.com (g2t2352.austin.hpe.com [15.233.44.25]) by mx0b-002e3701.pphosted.com with ESMTP id 2usra9rck8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 04 Sep 2019 11:13:36 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2352.austin.hpe.com (Postfix) with ESMTP id 6DE57B1 for ; Wed, 4 Sep 2019 11:13:35 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.44]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 848B539; Wed, 4 Sep 2019 11:13:34 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com Subject: [edk2-staging/RISC-V-V2 PATCH v1 09/22]: MdePkg/BaseCpuLib: RISC-V Base CPU library implementation. Date: Wed, 4 Sep 2019 18:43:04 +0800 Message-Id: <1567593797-26216-10-git-send-email-abner.chang@hpe.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1567593797-26216-1-git-send-email-abner.chang@hpe.com> References: <1567593797-26216-1-git-send-email-abner.chang@hpe.com> X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.70,1.0.8 definitions=2019-09-04_03:2019-09-03,2019-09-04 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 mlxscore=0 suspectscore=1 priorityscore=1501 phishscore=0 spamscore=0 adultscore=0 mlxlogscore=298 clxscore=1015 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1906280000 definitions=main-1909040113 Implement RISC-V CPU related functions in BaseCpuLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Abner Chang --- MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 4 ++++ MdePkg/Library/BaseCpuLib/RiscV/Cpu.s | 25 +++++++++++++++++++++++++ 2 files changed, 29 insertions(+) create mode 100644 MdePkg/Library/BaseCpuLib/RiscV/Cpu.s diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf index a7cb381..20ee774 100644 --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf @@ -7,6 +7,7 @@ # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
+# Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -59,6 +60,9 @@ AArch64/CpuFlushTlb.asm | MSFT AArch64/CpuSleep.asm | MSFT +[Sources.RISCV64] + RiscV/Cpu.s + [Packages] MdePkg/MdePkg.dec diff --git a/MdePkg/Library/BaseCpuLib/RiscV/Cpu.s b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.s new file mode 100644 index 0000000..9a1bf0f --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.s @@ -0,0 +1,25 @@ +//------------------------------------------------------------------------------ +// +// CpuSleep for RISC-V +// +// Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.
+// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php. +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +//------------------------------------------------------------------------------ +.data +.align 3 +.section .text + +.global ASM_PFX(_CpuSleep) + +ASM_PFX(_CpuSleep): + wfi + ret + + -- 2.7.4