From mboxrd@z Thu Jan  1 00:00:00 1970
Authentication-Results: mx.groups.io;
 dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=0150651a61=abner.chang@hpe.com)
Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86])
 by groups.io with SMTP; Wed, 04 Sep 2019 04:13:41 -0700
Received: from pps.filterd (m0134422.ppops.net [127.0.0.1])
	by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x84BBg9v017961
	for <devel@edk2.groups.io>; Wed, 4 Sep 2019 11:13:40 GMT
Received: from g2t2354.austin.hpe.com (g2t2354.austin.hpe.com [15.233.44.27])
	by mx0b-002e3701.pphosted.com with ESMTP id 2usyw7vrg5-1
	(version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT)
	for <devel@edk2.groups.io>; Wed, 04 Sep 2019 11:13:39 +0000
Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135])
	by g2t2354.austin.hpe.com (Postfix) with ESMTP id 59244BA
	for <devel@edk2.groups.io>; Wed,  4 Sep 2019 11:13:38 +0000 (UTC)
Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.44])
	by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 3A97539;
	Wed,  4 Sep 2019 11:13:37 +0000 (UTC)
From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com
Subject: [edk2-staging/RISC-V-V2 PATCH v1 11/22]: BaseTools: BaseTools changes for RISC-V platform.
Date: Wed,  4 Sep 2019 18:43:06 +0800
Message-Id: <1567593797-26216-12-git-send-email-abner.chang@hpe.com>
X-Mailer: git-send-email 2.7.4
In-Reply-To: <1567593797-26216-1-git-send-email-abner.chang@hpe.com>
References: <1567593797-26216-1-git-send-email-abner.chang@hpe.com>
X-Proofpoint-UnRewURL: 0 URL was un-rewritten
MIME-Version: 1.0
X-HPE-SCL: -1
X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.70,1.0.8
 definitions=2019-09-04_03:2019-09-03,2019-09-04 signatures=0
X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0
 suspectscore=0 mlxlogscore=999 phishscore=0 priorityscore=1501
 impostorscore=0 adultscore=0 mlxscore=0 clxscore=1015 malwarescore=0
 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1
 engine=8.12.0-1906280000 definitions=main-1909040113

BaseTools changes for building EDK2 RISC-V platform.
The changes made to build_rule.template is to avoid build errors cause by GCC711RISCV tool chain.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Abner Chang <abner.chang@hpe.com>
---
 BaseTools/Conf/build_rule.template                 |   23 +-
 BaseTools/Conf/tools_def.template                  |  108 +-
 BaseTools/Source/C/Common/BasePeCoff.c             |   19 +-
 BaseTools/Source/C/Common/PeCoffLoaderEx.c         |   96 ++
 BaseTools/Source/C/GenFv/GenFvInternalLib.c        |  281 ++++-
 BaseTools/Source/C/GenFw/Elf32Convert.c            |    6 +-
 BaseTools/Source/C/GenFw/Elf64Convert.c            |  273 ++++-
 BaseTools/Source/C/GenFw/elf_common.h              |   63 ++
 .../Source/C/Include/IndustryStandard/PeImage.h    |   10 +
 BaseTools/Source/Python/Common/DataType.py         | 1075 ++++++++++----------
 10 files changed, 1393 insertions(+), 561 deletions(-)

diff --git a/BaseTools/Conf/build_rule.template b/BaseTools/Conf/build_rule.template
index db06d3a..8e7f6e0 100755
--- a/BaseTools/Conf/build_rule.template
+++ b/BaseTools/Conf/build_rule.template
@@ -145,14 +145,6 @@
     <Command.GCC, Command.RVCT>
         "$(CC)" $(CC_FLAGS) $(CC_XIPFLAGS) -c -o ${dst} $(INC) ${src}
 
-[C-Header-File]
-    <InputFile>
-        *.h, *.H
-
-    <OutputFile>
-
-    <Command>
-
 [Assembly-Code-File.COMMON.COMMON]
     <InputFile.MSFT, InputFile.INTEL, InputFile.RVCT>
         ?.asm, ?.Asm, ?.ASM
@@ -321,6 +313,21 @@
         "$(OBJCOPY)" $(OBJCOPY_FLAGS) ${dst}
 
 
+[Static-Library-File.COMMON.RISCV64, Static-Library-File.COMMON.RISCV32]
+    <InputFile>
+        *.lib
+
+    <ExtraDependency>
+        $(MAKE_FILE)
+
+    <OutputFile>
+        $(DEBUG_DIR)(+)$(MODULE_NAME).dll
+
+    <Command.GCC>
+        "$(DLINK)" -o ${dst} $(DLINK_FLAGS) --start-group $(DLINK_SPATH) @$(STATIC_LIBRARY_FILES_LIST) --end-group $(DLINK2_FLAGS)
+        "$(OBJCOPY)" $(OBJCOPY_FLAGS) ${dst}
+
+
 [Static-Library-File.USER_DEFINED, Static-Library-File.HOST_APPLICATION]
     <InputFile>
         *.lib
diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
index 8f0e6cb..36a301a 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -3,7 +3,7 @@
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
 #  Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
 #  Copyright (c) 2015, Hewlett-Packard Development Company, L.P.<BR>
-#  (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
+#  (C) Copyright 2016-2019 Hewlett Packard Enterprise Development LP<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -114,6 +114,12 @@ DEFINE GCC49_X64_PREFIX        = ENV(GCC49_BIN)
 DEFINE GCC5_IA32_PREFIX        = ENV(GCC5_BIN)
 DEFINE GCC5_X64_PREFIX         = ENV(GCC5_BIN)
 DEFINE GCC_HOST_PREFIX         = ENV(GCC_HOST_BIN)
+#
+# RISC-V GCC toolchain
+# This is the default directory used when install official riscv-tools.
+#
+DEFINE GCCRISCV_RISCV32_PREFIX = ENV(GCC_RISCV32_BIN)
+DEFINE GCCRISCV_RISCV64_PREFIX = ENV(GCC_RISCV64_BIN)
 
 DEFINE UNIX_IASL_BIN           = ENV(IASL_PREFIX)iasl
 DEFINE WIN_IASL_BIN            = ENV(IASL_PREFIX)iasl.exe
@@ -236,6 +242,15 @@ DEFINE DTC_BIN                 = ENV(DTC_PREFIX)dtc
 #                             Required to build platforms or ACPI tables:
 #                               Intel(r) ACPI Compiler from
 #                               https://acpica.org/downloads
+#   GCCRISCV    - Linux       -  Requires:
+#                             RISC-V official release of RISC-V GNU toolchain,
+#                               https://github.com/riscv/riscv-gnu-toolchain @64879b24
+#                               The commit ID 64879b24 is the one can build RISC-V platform and boo to EFI shell.
+#                               Follow the instructions mentioned in README.md to build RISC-V tool change.
+#                             Set below environment variables to the RISC-V tool chain binaries before building RISC-V EDK2 port.
+#                               - GCC_RISCV32_BIN
+#                               - GCC_RISCV64_BIN
+#
 #   CLANG35     -Linux,Windows-  Requires:
 #                             Clang v3.5 or later, and GNU binutils targeting aarch64-linux-gnu or arm-linux-gnueabi
 #                        Optional:
@@ -1806,6 +1821,26 @@ DEFINE GCC5_ARM_ASLDLINK_FLAGS       = DEF(GCC49_ARM_ASLDLINK_FLAGS)
 DEFINE GCC5_AARCH64_ASLDLINK_FLAGS   = DEF(GCC49_AARCH64_ASLDLINK_FLAGS)
 DEFINE GCC5_ASLCC_FLAGS              = DEF(GCC49_ASLCC_FLAGS) -fno-lto
 
+DEFINE GCC_RISCV_ALL_CC_FLAGS                    = -g -fshort-wchar -fno-strict-aliasing -Wall -Werror -Wno-array-bounds -ffunction-sections -fdata-sections -c -include AutoGen.h -fno-common -DSTRING_ARRAY_NAME=$(BASE_NAME)Strings
+DEFINE GCC_RISCV_ALL_DLINK_COMMON                = -nostdlib -n -q --gc-sections -z common-page-size=0x40
+DEFINE GCC_RISCV_ALL_DLINK_FLAGS                 = DEF(GCC_RISCV_ALL_DLINK_COMMON) --entry $(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Map $(DEST_DIR_DEBUG)/$(BASE_NAME).map
+DEFINE GCC_RISCV_ALL_DLINK2_FLAGS                = --defsym=PECOFF_HEADER_SIZE=0x220 --script=$(EDK_TOOLS_PATH)/Scripts/GccBaseRiscV.lds
+DEFINE GCC_RISCV_ALL_ASM_FLAGS                   = -c -x assembler -imacros $(DEST_DIR_DEBUG)/AutoGen.h
+DEFINE GCC_RISCV_RISCV32_DLINK2_FLAGS            = --defsym=PECOFF_HEADER_SIZE=0x220 DEF(GCC_DLINK2_FLAGS_COMMON)
+
+DEFINE GCCRISCV_RISCV32_ARCH                   = rv32imafdc
+DEFINE GCCRISCV_RISCV64_ARCH                   = rv64imafdc
+DEFINE GCCRISCV_CC_FLAGS_WARNING_DISABLE       = -Wno-tautological-compare -Wno-pointer-compare
+DEFINE GCCRISCV_RISCV32_CC_FLAGS               = DEF(GCC_RISCV_ALL_CC_FLAGS) DEF(GCCRISCV_CC_FLAGS_WARNING_DISABLE) -march=DEF(GCCRISCV_RISCV32_ARCH) -malign-double -fno-stack-protector -D EFI32 -fno-asynchronous-unwind-tables -Wno-address -Wno-unused-but-set-variable -fpack-struct=8
+DEFINE GCCRISCV_RISCV64_CC_FLAGS               = DEF(GCC_RISCV_ALL_CC_FLAGS) DEF(GCCRISCV_CC_FLAGS_WARNING_DISABLE) -march=DEF(GCCRISCV_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-asynchronous-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8 -mcmodel=medany -mabi=lp64
+DEFINE GCCRISCV_RISCV32_RISCV64_DLINK_COMMON   = -nostdlib -n -q --gc-sections -z common-page-size=0x40
+DEFINE GCCRISCV_RISCV32_RISCV64_ASLDLINK_FLAGS = DEF(GCC_RISCV_ALL_DLINK_COMMON) --entry ReferenceAcpiTable -u ReferenceAcpiTable
+DEFINE GCCRISCV_RISCV32_RISCV64_DLINK_FLAGS    = DEF(GCC_RISCV_ALL_DLINK_COMMON) --entry $(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Map $(DEST_DIR_DEBUG)/$(BASE_NAME).map
+DEFINE GCCRISCV_RISCV32_DLINK2_FLAGS           = DEF(GCC_RISCV_RISCV32_DLINK2_FLAGS)
+DEFINE GCCRISCV_RISCV64_DLINK_FLAGS            = DEF(GCC_RISCV_ALL_DLINK_FLAGS)  -melf64lriscv --oformat=elf64-littleriscv --no-relax
+DEFINE GCCRISCV_RISCV64_DLINK2_FLAGS           = DEF(GCC_RISCV_ALL_DLINK2_FLAGS)
+DEFINE GCCRISCV_ASM_FLAGS                      = DEF(GCC_RISCV_ALL_ASM_FLAGS) -march=DEF(GCCRISCV_RISCV64_ARCH) -mcmodel=medany -mabi=lp64
+
 ####################################################################################
 #
 # GCC 4.8 - This configuration is used to compile under Linux to produce
@@ -2247,6 +2282,77 @@ RELEASE_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
   NOOPT_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -O0
   NOOPT_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20 -O0
 
+###################################################################################
+####################################################################################
+#
+# GCC RISC-V This configuration is used to compile under Linux to produce
+#             PE/COFF binaries using GCC RISC-V tool chain
+#         https://github.com/riscv/riscv-gnu-toolchain @64879b24
+# The commit ID 64879b24 is the one can build RISC-V platform and boo to EFI shell.
+#
+####################################################################################
+
+*_GCCRISCV_*_*_FAMILY                   = GCC
+
+*_GCCRISCV_*_MAKE_PATH                  = DEF(GCC49_IA32_PREFIX)make
+*_GCCRISCV_*_PP_FLAGS                   = DEF(GCC_PP_FLAGS)
+*_GCCRISCV_*_ASLPP_FLAGS                = DEF(GCC_ASLPP_FLAGS)
+*_GCCRISCV_*_ASLCC_FLAGS                = DEF(GCC_ASLCC_FLAGS)
+*_GCCRISCV_*_VFRPP_FLAGS                = DEF(GCC_VFRPP_FLAGS)
+*_GCCRISCV_*_APP_FLAGS                  =
+*_GCCRISCV_*_ASL_FLAGS                  = DEF(IASL_FLAGS)
+*_GCCRISCV_*_ASL_OUTFLAGS               = DEF(IASL_OUTFLAGS)
+
+##################
+# GCCRISCV RISCV32 definitions
+##################
+
+*_GCCRISCV_RISCV32_OBJCOPY_PATH         = DEF(GCCRISCV_RISCV32_PREFIX)riscv64-unknown-elf-objcopy
+*_GCCRISCV_RISCV32_SLINK_PATH           = DEF(GCCRISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc-ar
+*_GCCRISCV_RISCV32_DLINK_PATH           = DEF(GCCRISCV_RISCV32_PREFIX)riscv64-unknown-elf-ld
+*_GCCRISCV_RISCV32_ASLDLINK_PATH        = DEF(GCCRISCV_RISCV32_PREFIX)riscv64-unknown-elf-ld
+*_GCCRISCV_RISCV32_ASM_PATH             = DEF(GCCRISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV32_PP_PATH              = DEF(GCCRISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV32_VFRPP_PATH           = DEF(GCCRISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV32_ASLCC_PATH           = DEF(GCCRISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV32_ASLPP_PATH           = DEF(GCCRISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV32_RC_PATH              = DEF(GCCRISCV_RISCV32_PREFIX)riscv64-unknown-elf-objcopy
+
+*_GCCRISCV_RISCV32_ASLCC_FLAGS          = DEF(GCC_ASLCC_FLAGS) -m32
+*_GCCRISCV_RISCV32_ASLDLINK_FLAGS       = DEF(GCCRISCV_RISCV32_RISCV64_ASLDLINK_FLAGS) -m elf_i386
+*_GCCRISCV_RISCV32_ASM_FLAGS            = DEF(GCCRISCV_ASM_FLAGS) -m32 -march=i386
+*_GCCRISCV_RISCV32_CC_FLAGS             = DEF(GCCRISCV_RISCV32_CC_FLAGS) -Os
+*_GCCRISCV_RISCV32_DLINK_FLAGS          = DEF(GCCRISCV_RISCV32_RISCV64_DLINK_FLAGS) -m elf_i386 --oformat=elf32-i386
+*_GCCRISCV_RISCV32_DLINK2_FLAGS         = DEF(GCCRISCV_RISCV32_DLINK2_FLAGS)
+*_GCCRISCV_RISCV32_RC_FLAGS             = DEF(GCC_IA32_RC_FLAGS)
+*_GCCRISCV_RISCV32_OBJCOPY_FLAGS        =
+*_GCCRISCV_RISCV32_NASM_FLAGS           = -f elf32
+
+##################
+# GCCRISCV RISCV64 definitions
+##################
+*_GCCRISCV_RISCV64_OBJCOPY_PATH         = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-objcopy
+*_GCCRISCV_RISCV64_CC_PATH              = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV64_SLINK_PATH           = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc-ar
+*_GCCRISCV_RISCV64_DLINK_PATH           = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-ld
+*_GCCRISCV_RISCV64_ASLDLINK_PATH        = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-ld
+*_GCCRISCV_RISCV64_ASM_PATH             = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV64_PP_PATH              = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV64_VFRPP_PATH           = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV64_ASLCC_PATH           = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV64_ASLPP_PATH           = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCCRISCV_RISCV64_RC_PATH              = DEF(GCCRISCV_RISCV64_PREFIX)riscv64-unknown-elf-objcopy
+
+*_GCCRISCV_RISCV64_ASLCC_FLAGS          = DEF(GCC_ASLCC_FLAGS) -m64
+*_GCCRISCV_RISCV64_ASLDLINK_FLAGS       = DEF(GCCRISCV_RISCV32_RISCV64_ASLDLINK_FLAGS) -m elf_x86_64
+*_GCCRISCV_RISCV64_ASM_FLAGS            = DEF(GCCRISCV_ASM_FLAGS) 
+*_GCCRISCV_RISCV64_CC_FLAGS             = DEF(GCCRISCV_RISCV64_CC_FLAGS) -save-temps
+*_GCCRISCV_RISCV64_DLINK_FLAGS          = DEF(GCCRISCV_RISCV64_DLINK_FLAGS)
+*_GCCRISCV_RISCV64_DLINK2_FLAGS         = DEF(GCCRISCV_RISCV64_DLINK2_FLAGS)
+*_GCCRISCV_RISCV64_RC_FLAGS             = DEF(GCC_IA32_RC_FLAGS)
+*_GCCRISCV_RISCV64_OBJCOPY_FLAGS        =
+*_GCCRISCV_RISCV64_NASM_FLAGS           = -f elf64
+
 ####################################################################################
 #
 # CLANG35   - This configuration is used to compile under Linux to produce
diff --git a/BaseTools/Source/C/Common/BasePeCoff.c b/BaseTools/Source/C/Common/BasePeCoff.c
index e7566b3..e346e02 100644
--- a/BaseTools/Source/C/Common/BasePeCoff.c
+++ b/BaseTools/Source/C/Common/BasePeCoff.c
@@ -4,6 +4,7 @@
 
 Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+Portions Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -59,6 +60,14 @@ PeCoffLoaderRelocateArmImage (
   IN UINT64      Adjust
   );
 
+RETURN_STATUS
+PeCoffLoaderRelocateRiscVImage (
+  IN UINT16      *Reloc,
+  IN OUT CHAR8   *Fixup,
+  IN OUT CHAR8   **FixupData,
+  IN UINT64      Adjust
+  );
+
 STATIC
 RETURN_STATUS
 PeCoffLoaderGetPeHeader (
@@ -174,7 +183,10 @@ Returns:
       ImageContext->Machine != EFI_IMAGE_MACHINE_X64  && \
       ImageContext->Machine != EFI_IMAGE_MACHINE_ARMT && \
       ImageContext->Machine != EFI_IMAGE_MACHINE_EBC  && \
-      ImageContext->Machine != EFI_IMAGE_MACHINE_AARCH64) {
+      ImageContext->Machine != EFI_IMAGE_MACHINE_AARCH64 && \
+      ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV32 && \
+      ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV64 && \
+      ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV128) {
     if (ImageContext->Machine == IMAGE_FILE_MACHINE_ARM) {
       //
       // There are two types of ARM images. Pure ARM and ARM/Thumb.
@@ -802,6 +814,11 @@ Returns:
         case EFI_IMAGE_MACHINE_ARMT:
           Status = PeCoffLoaderRelocateArmImage (&Reloc, Fixup, &FixupData, Adjust);
           break;
+        case EFI_IMAGE_MACHINE_RISCV32:
+        case EFI_IMAGE_MACHINE_RISCV64:
+        case EFI_IMAGE_MACHINE_RISCV128:
+          Status = PeCoffLoaderRelocateRiscVImage (Reloc, Fixup, &FixupData, Adjust);
+          break;
         default:
           Status = RETURN_UNSUPPORTED;
           break;
diff --git a/BaseTools/Source/C/Common/PeCoffLoaderEx.c b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
index e367836..867c47b 100644
--- a/BaseTools/Source/C/Common/PeCoffLoaderEx.c
+++ b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
@@ -3,6 +3,7 @@ IA32 and X64 Specific relocation fixups
 
 Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 --*/
@@ -61,6 +62,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define IMM64_SIGN_INST_WORD_POS_X      27
 #define IMM64_SIGN_VAL_POS_X            63
 
+//
+// RISC-V definition.
+//
+#define RV_X(x, s, n) (((x) >> (s)) & ((1<<(n))-1))
+#define RISCV_IMM_BITS 12
+#define RISCV_IMM_REACH (1LL<<RISCV_IMM_BITS)
+#define RISCV_CONST_HIGH_PART(VALUE) \
+  (((VALUE) + (RISCV_IMM_REACH/2)) & ~(RISCV_IMM_REACH-1))
+
+UINT32 *RiscVHi20Fixup = NULL;
+
 RETURN_STATUS
 PeCoffLoaderRelocateIa32Image (
   IN UINT16      *Reloc,
@@ -94,6 +106,90 @@ Returns:
 }
 
 
+RETURN_STATUS
+PeCoffLoaderRelocateRiscVImage (
+  IN UINT16      *Reloc,
+  IN OUT CHAR8   *Fixup,
+  IN OUT CHAR8   **FixupData,
+  IN UINT64      Adjust
+  )
+/*++
+
+Routine Description:
+
+  Performs an RISC-V specific relocation fixup
+
+Arguments:
+
+  Reloc      - Pointer to the relocation record
+
+  Fixup      - Pointer to the address to fix up
+
+  FixupData  - Pointer to a buffer to log the fixups
+
+  Adjust     - The offset to adjust the fixup
+
+Returns:
+
+  Status code
+
+--*/
+{
+  UINT32 Value;
+  UINT32 Value2;
+  UINT32 OrgValue;
+
+  OrgValue = *(UINT32 *) Fixup;
+  OrgValue = OrgValue;
+  switch ((*Reloc) >> 12) {
+  case EFI_IMAGE_REL_BASED_RISCV_HI20:
+      RiscVHi20Fixup = (UINT32 *) Fixup;
+      break;
+
+  case EFI_IMAGE_REL_BASED_RISCV_LOW12I:
+      if (RiscVHi20Fixup != NULL) {
+        Value = (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12);
+        Value2 = (UINT32)(RV_X(*(UINT32 *)Fixup, 20, 12));
+        if (Value2 & (RISCV_IMM_REACH/2)) {
+          Value2 |= ~(RISCV_IMM_REACH-1);
+        }
+        Value += Value2;
+        Value += (UINT32)Adjust;
+        Value2 = RISCV_CONST_HIGH_PART (Value);
+        *(UINT32 *)RiscVHi20Fixup = (RV_X (Value2, 12, 20) << 12) | \
+                                           (RV_X (*(UINT32 *)RiscVHi20Fixup, 0, 12));
+        *(UINT32 *)Fixup = (RV_X (Value, 0, 12) << 20) | \
+                           (RV_X (*(UINT32 *)Fixup, 0, 20));
+      }
+      RiscVHi20Fixup = NULL;
+      break;
+
+  case EFI_IMAGE_REL_BASED_RISCV_LOW12S:
+      if (RiscVHi20Fixup != NULL) {
+        Value = (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12);
+        Value2 = (UINT32)(RV_X(*(UINT32 *)Fixup, 7, 5) | (RV_X(*(UINT32 *)Fixup, 25, 7) << 5));
+        if (Value2 & (RISCV_IMM_REACH/2)) {
+          Value2 |= ~(RISCV_IMM_REACH-1);
+        }
+        Value += Value2;
+        Value += (UINT32)Adjust;
+        Value2 = RISCV_CONST_HIGH_PART (Value);
+        *(UINT32 *)RiscVHi20Fixup = (RV_X (Value2, 12, 20) << 12) | \
+                                           (RV_X (*(UINT32 *)RiscVHi20Fixup, 0, 12));
+        Value2 = *(UINT32 *)Fixup & 0x01fff07f;
+        Value &= RISCV_IMM_REACH - 1;
+        *(UINT32 *)Fixup = Value2 | (UINT32)(((RV_X(Value, 0, 5) << 7) | (RV_X(Value, 5, 7) << 25)));
+      }
+      RiscVHi20Fixup = NULL;
+      break;
+
+  default:
+      return EFI_UNSUPPORTED;
+
+  }
+  return RETURN_SUCCESS;
+}
+
 /**
   Pass in a pointer to an ARM MOVT or MOVW immediate instruction and
   return the immediate data encoded in the instruction
diff --git a/BaseTools/Source/C/GenFv/GenFvInternalLib.c b/BaseTools/Source/C/GenFv/GenFvInternalLib.c
index 908740d..b1dc7ec 100644
--- a/BaseTools/Source/C/GenFv/GenFvInternalLib.c
+++ b/BaseTools/Source/C/GenFv/GenFvInternalLib.c
@@ -4,6 +4,7 @@ This file contains the internal functions required to generate a Firmware Volume
 Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
 Portions Copyright (c) 2016 HP Development Company, L.P.<BR>
+Portions Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -37,6 +38,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define ARM64_UNCONDITIONAL_JUMP_INSTRUCTION      0x14000000
 
 BOOLEAN mArm = FALSE;
+BOOLEAN mRiscV = FALSE;
 STATIC UINT32   MaxFfsAlignment = 0;
 BOOLEAN VtfFileFlag = FALSE;
 
@@ -1802,6 +1804,154 @@ if (MachineType == EFI_IMAGE_MACHINE_IA32 || MachineType == EFI_IMAGE_MACHINE_X6
 }
 
 EFI_STATUS
+RiscvPatchVtfTrapHandler (EFI_FFS_FILE_HEADER *VtfFileImage, UINTN UserTrapAddressInFile)
+/*++
+
+Routine Description:
+  This patches RISC-V trap handler in VTF.
+    0xF...FE00    Trap from user-mode
+    0xF...FE40    Trap from supervisor-mode
+    0xF...FE80    Trap from hypervisor-mode
+    0xF...FEC0    Trap from machine-mode
+    0xF...FEFC    Non-maskable interrupt(s)
+ 
+Arguments:
+  VtfFileImage            VTF file.
+  UserTrapAddressInFile   User Trap address in file image.
+
+Returns:
+
+  EFI_SUCCESS             Function Completed successfully.
+  EFI_ABORTED             Error encountered.
+  EFI_INVALID_PARAMETER   A required parameter was NULL.
+  EFI_NOT_FOUND           PEI Core file not found.
+
+--*/
+{
+  EFI_STATUS Status;
+  EFI_FILE_SECTION_POINTER  Pe32Section;
+  UINT32 EntryPoint;
+  UINT32 BaseOfCode;
+  UINT16 MachineType;
+  UINT8 *HighTrapVectorAddress;
+  UINTN TrapPrivilegeNum;
+
+  if (UserTrapAddressInFile == 0) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  Status = GetSectionByType (VtfFileImage, EFI_SECTION_PE32, 1, &Pe32Section); // Get PE32 section.
+  if (!EFI_ERROR (Status)) {
+    Status = GetPe32Info ( // Get entry point.
+        (VOID *) ((UINTN) Pe32Section.Pe32Section + GetSectionHeaderLength(Pe32Section.CommonHeader)),
+        &EntryPoint,
+        &BaseOfCode,
+        &MachineType
+        );
+    if (!EFI_ERROR (Status)) {
+      //
+      // Pacth trap handler.
+      //
+      HighTrapVectorAddress = (UINT8 *)((UINTN)EntryPoint + ((UINTN) Pe32Section.Pe32Section + GetSectionHeaderLength(Pe32Section.CommonHeader)));
+      HighTrapVectorAddress -= (0x10 + 0x100);
+
+      //
+      // Patch all privilege trap bases.
+      //
+      for (TrapPrivilegeNum = 0; TrapPrivilegeNum < 4; TrapPrivilegeNum ++) {
+        *((UINT32 *)HighTrapVectorAddress) = (*((UINT32 *)HighTrapVectorAddress) & 0xfff) | (*((UINT32 *)(UINTN)UserTrapAddressInFile) & 0xfffff000); 
+        *((UINT32 *)(HighTrapVectorAddress + 4)) = (*((UINT32 *)(HighTrapVectorAddress + 4)) & 0x000fffff) | ((*((UINT32 *)(UINTN)UserTrapAddressInFile) & 0xfff) << 20);
+        HighTrapVectorAddress += 0x40;
+        UserTrapAddressInFile += 8;
+      }
+
+      return EFI_SUCCESS;
+    } else {
+      Error (NULL, 0, 3000, "Invalid", "Patch RISC-V trap: Incorrect PE32 format of RISC-V VTF");
+    }
+  } else {
+    Error (NULL, 0, 3000, "Invalid", "atch RISC-V trap: Can't find PE32 section of RISC-V VTF.");
+  }
+  return EFI_UNSUPPORTED;
+}
+
+EFI_STATUS
+RiscvPatchVtf (EFI_FFS_FILE_HEADER *VtfFileImage, UINT32 ResetVector)
+/*++
+
+Routine Description:
+  This patches the entry point of either SecCore or 
+
+  For RISC-V ISA, the reset vector is at 0xfff~ff00h or 200h
+
+Arguments:
+  VtfFileImage  VTF file.
+  ResetVector   Entry point for reset vector.
+
+Returns:
+
+  EFI_SUCCESS             Function Completed successfully.
+  EFI_ABORTED             Error encountered.
+  EFI_INVALID_PARAMETER   A required parameter was NULL.
+  EFI_NOT_FOUND           PEI Core file not found.
+
+--*/
+{
+  EFI_STATUS Status;
+  EFI_FILE_SECTION_POINTER  Pe32Section;
+  UINT32 EntryPoint;
+  UINT8 *EntryPointAddress;
+  UINT32 *LoadHigh20BitInstrcutionAddr;
+  UINT32 *JmpLow12BitInstrcutionAddr;
+  UINT32 LoadHigh20BitAddressOffset;
+  UINT32 JmpLow12BitAddressOffset;
+  UINT32 BaseOfCode;
+  UINT16 MachineType;
+  UINT32 LoadHigh20BitOpc;
+  UINT32 JmpLow12BitOpc;
+
+  if (ResetVector == 0) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  Status = GetSectionByType (VtfFileImage, EFI_SECTION_PE32, 1, &Pe32Section); // Get PE32 section.
+  if (!EFI_ERROR (Status)) {
+    Status = GetPe32Info ( // Get entry point.
+        (VOID *) ((UINTN) Pe32Section.Pe32Section + GetSectionHeaderLength(Pe32Section.CommonHeader)),
+        &EntryPoint,
+        &BaseOfCode,
+        &MachineType
+        );
+    if (!EFI_ERROR (Status)) {
+      EntryPointAddress = (UINT8 *)((UINTN)EntryPoint + ((UINTN) Pe32Section.Pe32Section + GetSectionHeaderLength(Pe32Section.CommonHeader)));
+      LoadHigh20BitAddressOffset = *((UINT32 *)(EntryPointAddress - 16)); // (Entrypoint - 16) map to the second qword from Entrypoint
+      JmpLow12BitAddressOffset = *((UINT32 *)(EntryPointAddress - 8)); // (Entrypoint - 8) map to the second qword from Entrypoint
+      LoadHigh20BitInstrcutionAddr = (UINT32 *)(EntryPointAddress + LoadHigh20BitAddressOffset);
+      JmpLow12BitInstrcutionAddr = (UINT32 *)(EntryPointAddress + JmpLow12BitAddressOffset);
+      //
+      // Patch RISC-V instruction : li a0, 0x12345000
+      //
+      LoadHigh20BitOpc = *LoadHigh20BitInstrcutionAddr;
+      LoadHigh20BitOpc = (LoadHigh20BitOpc & 0xfff) | (ResetVector & 0xfffff000);
+      *((UINT32 *)(EntryPointAddress - 16)) = LoadHigh20BitOpc;
+      //
+      // Patch RISC-V instruction : jalr x0, a0, 0x678
+      //
+      JmpLow12BitOpc = *JmpLow12BitInstrcutionAddr;
+      JmpLow12BitOpc = (JmpLow12BitOpc & 0x000fffff) | ((ResetVector & 0xfff) << 20);
+      *((UINT32 *)(EntryPointAddress - 12)) = JmpLow12BitOpc;
+      return EFI_SUCCESS;
+    } else {
+      Error (NULL, 0, 3000, "Invalid", "Incorrect PE32 format of RISC-V VTF");
+    }
+  } else {
+    Error (NULL, 0, 3000, "Invalid", "Can't find PE32 section of RISC-V VTF.");
+  }
+  return EFI_UNSUPPORTED;
+}
+
+
+EFI_STATUS
 FindCorePeSection(
   IN VOID                       *FvImageBuffer,
   IN UINT64                     FvSize,
@@ -2274,6 +2424,106 @@ Returns:
 }
 
 EFI_STATUS
+UpdateRiscvResetVectorIfNeeded (
+  MEMORY_FILE            *FvImage,
+  FV_INFO                *FvInfo
+  )
+/*++
+
+Routine Description:
+  This parses the FV looking for SEC and patches that address into the 
+  beginning of the FV header.
+
+  For RISC-V ISA, the reset vector is at 0xfff~ff00h or 200h
+
+Arguments:
+  FvImage       Memory file for the FV memory image/
+  FvInfo        Information read from INF file.
+
+Returns:
+
+  EFI_SUCCESS             Function Completed successfully.
+  EFI_ABORTED             Error encountered.
+  EFI_INVALID_PARAMETER   A required parameter was NULL.
+  EFI_NOT_FOUND           PEI Core file not found.
+
+--*/
+{
+  EFI_STATUS                Status;
+  UINT16                    MachineType;
+  EFI_FILE_SECTION_POINTER  SecPe32;
+  EFI_PHYSICAL_ADDRESS      SecCoreEntryAddress;
+
+  UINT32 bSecCore;
+  UINT32 tmp;
+
+
+  //
+  // Verify input parameters
+  //
+  if (FvImage == NULL || FvInfo == NULL) {
+    return EFI_INVALID_PARAMETER;
+  }
+  //
+  // Initialize FV library
+  //
+  InitializeFvLib (FvImage->FileImage, FvInfo->Size);
+
+  //
+  // Find the Sec Core
+  //
+  Status = FindCorePeSection(FvImage->FileImage, FvInfo->Size, EFI_FV_FILETYPE_SECURITY_CORE, &SecPe32); 
+  if(EFI_ERROR(Status)) {
+    printf("skip because Secutiry Core not found\n");
+    return EFI_SUCCESS;
+  }
+
+  DebugMsg (NULL, 0, 9, "Update SEC core in FV Header", NULL);
+
+  Status = GetCoreMachineType(SecPe32, &MachineType);
+  if(EFI_ERROR(Status)) {
+    Error(NULL, 0, 3000, "Invalid", "Could not get the PE32 machine type for SEC core.");
+    return EFI_ABORTED;
+  }
+
+  if ((MachineType != EFI_IMAGE_MACHINE_RISCV32) && (MachineType != EFI_IMAGE_MACHINE_RISCV64)) {
+    Error(NULL, 0, 3000, "Invalid", "Could not update SEC core because Machine type is not RiscV.");
+    return EFI_ABORTED;
+  }
+
+  Status = GetCoreEntryPointAddress(FvImage->FileImage, FvInfo, SecPe32, &SecCoreEntryAddress);
+  if(EFI_ERROR(Status)) {
+    Error(NULL, 0, 3000, "Invalid", "Could not get the PE32 entry point address for SEC Core.");
+    return EFI_ABORTED;
+  }
+
+  VerboseMsg("SecCore entry point Address = 0x%llX", (unsigned long long) SecCoreEntryAddress);
+  VerboseMsg("BaseAddress = 0x%llX", (unsigned long long) FvInfo->BaseAddress);
+  bSecCore = (SecCoreEntryAddress - FvInfo->BaseAddress);
+  VerboseMsg("offset = 0x%llX", bSecCore);
+
+  if(bSecCore > 0x0fffff) {
+    Error(NULL, 0, 3000, "Invalid", "SEC Entry point must be within 1MB of start of the FV");
+    return EFI_ABORTED;
+  }
+
+  tmp = bSecCore;
+  bSecCore = 0;
+  //J-type
+  bSecCore  = (tmp&0x100000)<<11; //imm[20]    at bit[31]
+  bSecCore |= (tmp&0x0007FE)<<20; //imm[10:1]  at bit[30:21]
+  bSecCore |= (tmp&0x000800)<<9;  //imm[11]    at bit[20]
+  bSecCore |= (tmp&0x0FF000);     //imm[19:12] at bit[19:12]
+  bSecCore |= 0x6F; //JAL opcode
+
+  memcpy(FvImage->FileImage, &bSecCore, sizeof(bSecCore));
+
+  return EFI_SUCCESS;
+}
+
+
+
+EFI_STATUS
 GetPe32Info (
   IN UINT8                  *Pe32,
   OUT UINT32                *EntryPoint,
@@ -2365,7 +2615,8 @@ Returns:
   // Verify machine type is supported
   //
   if ((*MachineType != EFI_IMAGE_MACHINE_IA32) &&  (*MachineType != EFI_IMAGE_MACHINE_X64) && (*MachineType != EFI_IMAGE_MACHINE_EBC) &&
-      (*MachineType != EFI_IMAGE_MACHINE_ARMT) && (*MachineType != EFI_IMAGE_MACHINE_AARCH64)) {
+      (*MachineType != EFI_IMAGE_MACHINE_ARMT) && (*MachineType != EFI_IMAGE_MACHINE_AARCH64) &&
+      (*MachineType != EFI_IMAGE_MACHINE_RISCV32) && (*MachineType != EFI_IMAGE_MACHINE_RISCV64) && (*MachineType != EFI_IMAGE_MACHINE_RISCV128)) {
     Error (NULL, 0, 3000, "Invalid", "Unrecognized machine type in the PE32 file.");
     return EFI_UNSUPPORTED;
   }
@@ -2777,7 +3028,6 @@ Returns:
     FvHeader->Checksum      = 0;
     FvHeader->Checksum      = CalculateChecksum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength / sizeof (UINT16));
   }
-
   //
   // Add files to FV
   //
@@ -2808,7 +3058,8 @@ Returns:
       Error (NULL, 0, 4002, "Resource", "FV space is full, cannot add pad file between the last file and the VTF file.");
       goto Finish;
     }
-    if (!mArm) {
+
+    if (!mArm && !mRiscV) {
       //
       // Update reset vector (SALE_ENTRY for IPF)
       // Now for IA32 and IA64 platform, the fv which has bsf file must have the
@@ -2843,6 +3094,22 @@ Returns:
     FvHeader->Checksum = CalculateChecksum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength / sizeof (UINT16));
   }
 
+  if (mRiscV) {
+     //
+     // Update RISCV reset vector.
+     //
+     Status = UpdateRiscvResetVectorIfNeeded (&FvImageMemoryFile, &mFvDataInfo);
+     if (EFI_ERROR (Status)) {
+       Error (NULL, 0, 3000, "Invalid", "Could not update the reset vector for RISC-V.");
+       goto Finish;
+    }
+    //
+    // Update Checksum for FvHeader
+    //
+    FvHeader->Checksum = 0;
+    FvHeader->Checksum = CalculateChecksum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength / sizeof (UINT16));
+  }
+
   //
   // Update FV Alignment attribute to the largest alignment of all the FFS files in the FV
   //
@@ -3430,6 +3697,12 @@ Returns:
       mArm = TRUE;
     }
 
+    if ( (ImageContext.Machine == EFI_IMAGE_MACHINE_RISCV32) ||
+         (ImageContext.Machine == EFI_IMAGE_MACHINE_RISCV64) ||
+         (ImageContext.Machine == EFI_IMAGE_MACHINE_RISCV128)) {
+      mRiscV = TRUE;
+    }
+
     //
     // Keep Image Context for PE image in FV
     //
@@ -3583,7 +3856,7 @@ Returns:
     ImageContext.DestinationAddress = NewPe32BaseAddress;
     Status                          = PeCoffLoaderRelocateImage (&ImageContext);
     if (EFI_ERROR (Status)) {
-      Error (NULL, 0, 3000, "Invalid", "RelocateImage() call failed on rebase of %s", FileName);
+      Error (NULL, 0, 3000, "Invalid", "RelocateImage() call failed on rebase of %s Status=%d", FileName, Status);
       free ((VOID *) MemoryImagePointer);
       return Status;
     }
diff --git a/BaseTools/Source/C/GenFw/Elf32Convert.c b/BaseTools/Source/C/GenFw/Elf32Convert.c
index 46089ff..3e47475 100644
--- a/BaseTools/Source/C/GenFw/Elf32Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf32Convert.c
@@ -3,6 +3,7 @@ Elf32 Convert solution
 
 Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
 Portions copyright (c) 2013, ARM Ltd. All rights reserved.<BR>
+Portions Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -141,8 +142,9 @@ InitializeElf32 (
     Error (NULL, 0, 3000, "Unsupported", "ELF e_type not ET_EXEC or ET_DYN");
     return FALSE;
   }
-  if (!((mEhdr->e_machine == EM_386) || (mEhdr->e_machine == EM_ARM))) {
-    Error (NULL, 0, 3000, "Unsupported", "ELF e_machine not EM_386 or EM_ARM");
+
+  if (!((mEhdr->e_machine == EM_386) || (mEhdr->e_machine == EM_ARM) || (mEhdr->e_machine == EM_RISCV))) {
+    Error (NULL, 0, 3000, "Unsupported", "ELF e_machine not EM_386, EM_ARM or EM_RISCV");
     return FALSE;
   }
   if (mEhdr->e_version != EV_CURRENT) {
diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c
index 3d6319c..e65f640 100644
--- a/BaseTools/Source/C/GenFw/Elf64Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
@@ -3,6 +3,7 @@ Elf64 convert solution
 
 Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
 Portions copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>
+Portions Copyright (c) 2016 - 2017 Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -31,6 +32,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include "ElfConvert.h"
 #include "Elf64Convert.h"
 
+#define RV_X(x, s, n) (((x) >> (s)) & ((1<<(n))-1))
+#define RISCV_IMM_BITS 12
+#define RISCV_IMM_REACH (1LL<<RISCV_IMM_BITS)
+#define RISCV_CONST_HIGH_PART(VALUE) \
+  (((VALUE) + (RISCV_IMM_REACH/2)) & ~(RISCV_IMM_REACH-1))
+
 STATIC
 VOID
 ScanSections64 (
@@ -153,8 +160,9 @@ InitializeElf64 (
     Error (NULL, 0, 3000, "Unsupported", "ELF e_type not ET_EXEC or ET_DYN");
     return FALSE;
   }
-  if (!((mEhdr->e_machine == EM_X86_64) || (mEhdr->e_machine == EM_AARCH64))) {
-    Error (NULL, 0, 3000, "Unsupported", "ELF e_machine not EM_X86_64 or EM_AARCH64");
+
+  if (!((mEhdr->e_machine == EM_X86_64) || (mEhdr->e_machine == EM_AARCH64) || (mEhdr->e_machine == EM_RISCV64))) {
+    Error (NULL, 0, 3000, "Unsupported", "ELF e_machine not EM_X86_64, EM_AARCH64 or EM_RISCV64");
     return FALSE;
   }
   if (mEhdr->e_version != EV_CURRENT) {
@@ -481,6 +489,7 @@ ScanSections64 (
   switch (mEhdr->e_machine) {
   case EM_X86_64:
   case EM_AARCH64:
+  case EM_RISCV64:
     mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS64);
   break;
   default:
@@ -690,6 +699,12 @@ ScanSections64 (
     NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_AARCH64;
     NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
     break;
+
+  case EM_RISCV64:
+    NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_RISCV64;
+    NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
+    break;
+
   default:
     VerboseMsg ("%s unknown e_machine type. Assume X64", (UINTN)mEhdr->e_machine);
     NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;
@@ -769,6 +784,11 @@ WriteSections64 (
   Elf_Shdr    *SecShdr;
   UINT32      SecOffset;
   BOOLEAN     (*Filter)(Elf_Shdr *);
+  UINT32      Value;
+  UINT32      Value2;
+  UINT8       *RiscvHi20Targ = NULL;
+  Elf_Shdr    *RiscvHi20Sym = NULL;
+  Elf64_Half  RiscvSymSecIndex = 0;
   Elf64_Addr  GOTEntryRva;
 
   //
@@ -893,13 +913,14 @@ WriteSections64 (
           if (SymName == NULL) {
             SymName = (const UINT8 *)"<unknown>";
           }
-
-          Error (NULL, 0, 3000, "Invalid",
-                 "%s: Bad definition for symbol '%s'@%#llx or unsupported symbol type.  "
-                 "For example, absolute and undefined symbols are not supported.",
-                 mInImageName, SymName, Sym->st_value);
-
-          exit(EXIT_FAILURE);
+          if (mEhdr->e_machine != EM_RISCV64) {
+            Error (NULL, 0, 3000, "Invalid",
+                   "%s: Bad definition for symbol '%s'@%#llx or unsupported symbol type.  "
+                   "For example, absolute and undefined symbols are not supported.",
+                   mInImageName, SymName, Sym->st_value);
+
+            exit(EXIT_FAILURE);
+		  }
         }
         SymShdr = GetShdrByIndex(Sym->st_shndx);
 
@@ -1114,6 +1135,135 @@ WriteSections64 (
           default:
             Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s unsupported ELF EM_AARCH64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
           }
+        } else if (mEhdr->e_machine == EM_RISCV64) {
+          switch (ELF_R_TYPE(Rel->r_info)) {
+          case R_RISCV_NONE:
+            break;
+          case R_RISCV_32:
+            *(UINT32 *)Targ = (UINT32)((UINT64)(*(UINT32 *)Targ) - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]);
+            break;
+          case R_RISCV_64:
+            *(UINT64 *)Targ = *(UINT64 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
+            break;
+          case R_RISCV_HI20:
+              RiscvHi20Targ = Targ;
+              RiscvHi20Sym = SymShdr;
+              RiscvSymSecIndex = Sym->st_shndx;
+            break;
+          case R_RISCV_LO12_I:
+            if (RiscvHi20Sym == SymShdr && RiscvHi20Targ != NULL && RiscvSymSecIndex == Sym->st_shndx && RiscvSymSecIndex != 0) {
+              Value = (UINT32)(RV_X(*(UINT32 *)RiscvHi20Targ, 12, 20) << 12);
+              Value2 = (UINT32)(RV_X(*(UINT32 *)Targ, 20, 12));
+              if (Value2 & (RISCV_IMM_REACH/2)) {
+                Value2 |= ~(RISCV_IMM_REACH-1);
+              }
+              Value += Value2;
+              Value = Value - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
+              Value2 = RISCV_CONST_HIGH_PART (Value);
+              *(UINT32 *)RiscvHi20Targ = (RV_X (Value2, 12, 20) << 12) | \
+                                         (RV_X (*(UINT32 *)RiscvHi20Targ, 0, 12));
+              *(UINT32 *)Targ = (RV_X (Value, 0, 12) << 20) | \
+                                (RV_X (*(UINT32 *)Targ, 0, 20));
+            }
+            RiscvHi20Sym = NULL;
+            RiscvHi20Targ = NULL;
+            RiscvSymSecIndex = 0;
+            break;
+
+          case R_RISCV_LO12_S:
+            if (RiscvHi20Sym == SymShdr && RiscvHi20Targ != NULL && RiscvSymSecIndex == Sym->st_shndx && RiscvSymSecIndex != 0) {
+              Value = (UINT32)(RV_X(*(UINT32 *)RiscvHi20Targ, 12, 20) << 12);
+              Value2 = (UINT32)(RV_X(*(UINT32 *)Targ, 7, 5) | (RV_X(*(UINT32 *)Targ, 25, 7) << 5));
+              if (Value2 & (RISCV_IMM_REACH/2)) {
+                Value2 |= ~(RISCV_IMM_REACH-1);
+              }
+              Value += Value2;
+              Value = Value - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
+              Value2 = RISCV_CONST_HIGH_PART (Value);
+              *(UINT32 *)RiscvHi20Targ = (RV_X (Value2, 12, 20) << 12) | \
+                                         (RV_X (*(UINT32 *)RiscvHi20Targ, 0, 12));
+
+              Value2 = *(UINT32 *)Targ & 0x01fff07f;
+              Value &= RISCV_IMM_REACH - 1;
+              *(UINT32 *)Targ = Value2 | (UINT32)(((RV_X(Value, 0, 5) << 7) | (RV_X(Value, 5, 7) << 25)));
+            }
+            RiscvHi20Sym = NULL;
+            RiscvHi20Targ = NULL;
+            RiscvSymSecIndex = 0;
+            break;
+
+          case R_RISCV_PCREL_HI20:
+            RiscvHi20Targ = Targ;
+            RiscvHi20Sym = SymShdr;
+            RiscvSymSecIndex = Sym->st_shndx;
+
+            Value = (UINT32)(RV_X(*(UINT32 *)RiscvHi20Targ, 12, 20));
+            //printf("PCREL_HI20 Sym:[%s] value:0x%x SymShdr->sh_addr:0x%lx mCoffSectionOffset:%x \n", GetSymName(Sym), Value, SymShdr->sh_addr, mCoffSectionsOffset[Sym->st_shndx]);
+            break;
+          case R_RISCV_PCREL_LO12_I:
+            if (RiscvHi20Targ != NULL && RiscvHi20Sym != NULL && RiscvSymSecIndex != 0) {
+              int i;
+              Value2 = (UINT32)(RV_X(*(UINT32 *)RiscvHi20Targ, 12, 20));
+              Value = (UINT32)(RV_X(*(UINT32 *)Targ, 20, 12));
+              if(Value & (RISCV_IMM_REACH/2)) {
+                Value |= ~(RISCV_IMM_REACH-1);
+              }
+              //printf("PCREL_LO12_I Sym:[%s] value:0x%x SymShdr->sh_addr:0x%lx mCoffSectionOffset:%x \n", GetSymName(Sym), Value, SymShdr->sh_addr, mCoffSectionsOffset[Sym->st_shndx]);
+              Value = Value - RiscvHi20Sym->sh_addr + mCoffSectionsOffset[RiscvSymSecIndex];
+              if(-2048 > (INT32)Value) {           
+                i = (-Value / 4096);               
+                //Error (NULL, 0, 3000, "Invalid", "WriteSections64(): PCREL_LO12_I relocation out of range. %d i=%d", Value, i);
+                printf("WriteSections64(): PCREL_LO12_I relocation out of range. Value:%d Value2:%d i=%d\n", Value, Value2, i);
+                Value2 -= i;
+                Value += 4096 * i;
+                if(-2048 > (INT32)Value) {
+                  Value2 -= 1;
+                  Value += 4096;
+                }
+              }
+              else if( 2047 < (INT32)Value) {
+                i = (Value / 4096);
+                //Error (NULL, 0, 3000, "Invalid", "WriteSections64(): PCREL_LO12_I relocation out of range. %d i=%d", Value, i);
+                printf("WriteSections64(): PCREL_LO12_I relocation out of range. Value:%d Value2:%d i=%d\n", Value, Value2, i);
+                Value2 += i;
+                Value -= 4096 * i;
+                if(2047 < (INT32)Value) {
+                  Value2 += 1;
+                  Value -= 4096;
+                }
+              }
+
+              *(UINT32 *)Targ = (RV_X(Value, 0, 12) << 20) | (RV_X(*(UINT32*)Targ, 0, 20));
+              *(UINT32 *)RiscvHi20Targ = (RV_X(Value2, 0, 20)<<12) | (RV_X(*(UINT32 *)RiscvHi20Targ, 0, 12));
+              //printf("PCREL_LO12_I Sym:[%s] relocated value:0x%x(%d) value2:0x%x(%d) SymShdr->sh_addr:0x%lx mCoffSectionOffset:%x \n", GetSymName(Sym), Value, Value, Value2, Value2,  SymShdr->sh_addr, mCoffSectionsOffset[Sym->st_shndx]);
+            }
+            RiscvHi20Sym = NULL;
+            RiscvHi20Targ = NULL;
+            RiscvSymSecIndex = 0;
+            break;
+
+          case R_RISCV_ADD64:
+          case R_RISCV_SUB64:
+          case R_RISCV_ADD32:
+          case R_RISCV_SUB32:
+          case R_RISCV_BRANCH:
+          case R_RISCV_JAL:
+          case R_RISCV_GPREL_I:
+          case R_RISCV_GPREL_S:
+          case R_RISCV_CALL:
+          case R_RISCV_RVC_BRANCH:
+          case R_RISCV_RVC_JUMP:
+          case R_RISCV_RELAX:
+          case R_RISCV_SUB6:
+          case R_RISCV_SET6:
+          case R_RISCV_SET8:
+          case R_RISCV_SET16:
+          case R_RISCV_SET32:
+            break;
+
+          default:
+            Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s unsupported ELF EM_RISCV64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
+          }
         } else {
           Error (NULL, 0, 3000, "Invalid", "Not a supported machine type");
         }
@@ -1133,6 +1283,7 @@ WriteRelocations64 (
   UINT32                           Index;
   EFI_IMAGE_OPTIONAL_HEADER_UNION  *NtHdr;
   EFI_IMAGE_DATA_DIRECTORY         *Dir;
+  UINT32 RiscVRelType;
 
   for (Index = 0; Index < mEhdr->e_shnum; Index++) {
     Elf_Shdr *RelShdr = GetShdrByIndex(Index);
@@ -1237,8 +1388,110 @@ WriteRelocations64 (
             default:
                 Error (NULL, 0, 3000, "Invalid", "WriteRelocations64(): %s unsupported ELF EM_AARCH64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
             }
+          } else if (mEhdr->e_machine == EM_RISCV64) {
+            RiscVRelType = ELF_R_TYPE(Rel->r_info);
+            switch (RiscVRelType) {
+            case R_RISCV_NONE:
+              break;
+
+            case R_RISCV_32:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_HIGHLOW);
+              break;
+
+            case R_RISCV_64:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_DIR64);
+              break;
+
+            case R_RISCV_HI20:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_RISCV_HI20);
+              break;
+
+            case R_RISCV_LO12_I:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_RISCV_LOW12I);
+              break;
+
+            case R_RISCV_LO12_S:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_RISCV_LOW12S);
+              break;
+
+            case R_RISCV_ADD64:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_ABSOLUTE);
+              break;
+
+            case R_RISCV_SUB64:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_ABSOLUTE);
+              break;
+
+            case R_RISCV_ADD32:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_ABSOLUTE);
+              break;
+
+            case R_RISCV_SUB32:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_ABSOLUTE);
+              break;
+
+            case R_RISCV_BRANCH:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_ABSOLUTE);
+              break;
+
+            case R_RISCV_JAL:
+              CoffAddFixup(
+                (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+                + (Rel->r_offset - SecShdr->sh_addr)),
+                EFI_IMAGE_REL_BASED_ABSOLUTE);
+              break;
+
+            case R_RISCV_GPREL_I:
+            case R_RISCV_GPREL_S:
+            case R_RISCV_CALL:
+            case R_RISCV_RVC_BRANCH:
+            case R_RISCV_RVC_JUMP:
+            case R_RISCV_RELAX:
+            case R_RISCV_SUB6:
+            case R_RISCV_SET6:
+            case R_RISCV_SET8:
+            case R_RISCV_SET16:
+            case R_RISCV_SET32:
+            case R_RISCV_PCREL_HI20:
+            case R_RISCV_PCREL_LO12_I:
+              break;
+
+            default:
+              printf ("Unsupported RISCV64 ELF relocation type 0x%x, offset: %lx\n", RiscVRelType, Rel->r_offset);
+              Error (NULL, 0, 3000, "Invalid", "WriteRelocations64(): %s unsupported ELF EM_RISCV64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
+            }
           } else {
-            Error (NULL, 0, 3000, "Not Supported", "This tool does not support relocations for ELF with e_machine %u (processor type).", (unsigned) mEhdr->e_machine);
+              Error (NULL, 0, 3000, "Not Supported", "This tool does not support relocations for ELF with e_machine %u (processor type).", (unsigned) mEhdr->e_machine);
           }
         }
         if (mEhdr->e_machine == EM_X86_64 && RelShdr->sh_info == mGOTShindex) {
diff --git a/BaseTools/Source/C/GenFw/elf_common.h b/BaseTools/Source/C/GenFw/elf_common.h
index 15c9e33..5f286cc 100644
--- a/BaseTools/Source/C/GenFw/elf_common.h
+++ b/BaseTools/Source/C/GenFw/elf_common.h
@@ -3,6 +3,7 @@ Ported ELF include files from FreeBSD
 
 Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+Portion Copyright (c) 2016 - 2017, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 
@@ -178,6 +179,9 @@ typedef struct {
 #define EM_X86_64  62  /* Advanced Micro Devices x86-64 */
 #define  EM_AMD64  EM_X86_64  /* Advanced Micro Devices x86-64 (compat) */
 #define EM_AARCH64  183  /* ARM 64bit Architecture */
+#define EM_RISCV64  243 /* 64bit RISC-V Architecture */
+#define EM_RISCV    244 /* 32bit RISC-V Architecture */
+#define EM_RISCV128 245 /* 128bit RISC-V Architecture */
 
 /* Non-standard or deprecated. */
 #define EM_486    6  /* Intel i486. */
@@ -979,5 +983,64 @@ typedef struct {
 #define  R_X86_64_GOTPCRELX  41  /* Load from 32 bit signed pc relative offset to GOT entry without REX prefix, relaxable. */
 #define  R_X86_64_REX_GOTPCRELX  42  /* Load from 32 bit signed pc relative offset to GOT entry with REX prefix, relaxable. */
 
+/* 
+ * RISC-V relocation types 
+ */ 
+ 
+/* Relocation types used by the dynamic linker */
+#define R_RISCV_NONE        0
+#define R_RISCV_32          1
+#define R_RISCV_64          2
+#define R_RISCV_RELATIVE    3
+#define R_RISCV_COPY        4
+#define R_RISCV_JUMP_SLOT   5
+#define R_RISCV_TLS_DTPMOD32    6
+#define R_RISCV_TLS_DTPMOD64    7
+#define R_RISCV_TLS_DTPREL32    8
+#define R_RISCV_TLS_DTPREL64    9
+#define R_RISCV_TLS_TPREL32     10
+#define R_RISCV_TLS_TPREL64     11
 
+/* Relocation types not used by the dynamic linker */
+#define R_RISCV_BRANCH      16
+#define R_RISCV_JAL         17
+#define R_RISCV_CALL        18
+#define R_RISCV_CALL_PLT    19
+#define R_RISCV_GOT_HI20    20
+#define R_RISCV_TLS_GOT_HI20    21
+#define R_RISCV_TLS_GD_HI20     22
+#define R_RISCV_PCREL_HI20      23
+#define R_RISCV_PCREL_LO12_I    24
+#define R_RISCV_PCREL_LO12_S    25
+#define R_RISCV_HI20            26
+#define R_RISCV_LO12_I          27
+#define R_RISCV_LO12_S          28
+#define R_RISCV_TPREL_HI20      29
+#define R_RISCV_TPREL_LO12_I    30
+#define R_RISCV_TPREL_LO12_S    31
+#define R_RISCV_TPREL_ADD       32
+#define R_RISCV_ADD8            33
+#define R_RISCV_ADD16           34
+#define R_RISCV_ADD32           35
+#define R_RISCV_ADD64           36
+#define R_RISCV_SUB8            37
+#define R_RISCV_SUB16           38
+#define R_RISCV_SUB32           39
+#define R_RISCV_SUB64           40
+#define R_RISCV_GNU_VTINHERIT   41
+#define R_RISCV_GNU_VTENTRY     42
+#define R_RISCV_ALIGN           43
+#define R_RISCV_RVC_BRANCH      44
+#define R_RISCV_RVC_JUMP        45
+#define R_RISCV_RVC_LUI         46
+#define R_RISCV_GPREL_I         47
+#define R_RISCV_GPREL_S         48
+#define R_RISCV_TPREL_I         49
+#define R_RISCV_TPREL_S         50
+#define R_RISCV_RELAX           51
+#define R_RISCV_SUB6            52
+#define R_RISCV_SET6            53
+#define R_RISCV_SET8            54
+#define R_RISCV_SET16           55
+#define R_RISCV_SET32           56
 #endif /* !_SYS_ELF_COMMON_H_ */
diff --git a/BaseTools/Source/C/Include/IndustryStandard/PeImage.h b/BaseTools/Source/C/Include/IndustryStandard/PeImage.h
index 44037d1..4edf2d4 100644
--- a/BaseTools/Source/C/Include/IndustryStandard/PeImage.h
+++ b/BaseTools/Source/C/Include/IndustryStandard/PeImage.h
@@ -6,6 +6,7 @@
 
   Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
   Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+  Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -41,6 +42,9 @@
 #define IMAGE_FILE_MACHINE_ARM      0x01c0  // Thumb only
 #define IMAGE_FILE_MACHINE_ARMT     0x01c2  // 32bit Mixed ARM and Thumb/Thumb 2  Little Endian
 #define IMAGE_FILE_MACHINE_ARM64    0xAA64  // 64bit ARM Architecture, Little Endian
+#define IMAGE_FILE_MACHINE_RISCV32  0x5032  // 32bit RISC-V ISA
+#define IMAGE_FILE_MACHINE_RISCV64  0x5064  // 64bit RISC-V ISA
+#define IMAGE_FILE_MACHINE_RISCV128 0x5128  // 128bit RISC-V ISA
 
 //
 // Support old names for backward compatible
@@ -50,6 +54,9 @@
 #define EFI_IMAGE_MACHINE_X64       IMAGE_FILE_MACHINE_X64
 #define EFI_IMAGE_MACHINE_ARMT      IMAGE_FILE_MACHINE_ARMT
 #define EFI_IMAGE_MACHINE_AARCH64   IMAGE_FILE_MACHINE_ARM64
+#define EFI_IMAGE_MACHINE_RISCV32   IMAGE_FILE_MACHINE_RISCV32
+#define EFI_IMAGE_MACHINE_RISCV64   IMAGE_FILE_MACHINE_RISCV64
+#define EFI_IMAGE_MACHINE_RISCV128  IMAGE_FILE_MACHINE_RISCV128
 
 #define EFI_IMAGE_DOS_SIGNATURE     0x5A4D      // MZ
 #define EFI_IMAGE_OS2_SIGNATURE     0x454E      // NE
@@ -504,7 +511,10 @@ typedef struct {
 #define EFI_IMAGE_REL_BASED_HIGHADJ       4
 #define EFI_IMAGE_REL_BASED_MIPS_JMPADDR  5
 #define EFI_IMAGE_REL_BASED_ARM_MOV32A    5
+#define EFI_IMAGE_REL_BASED_RISCV_HI20    5
 #define EFI_IMAGE_REL_BASED_ARM_MOV32T    7
+#define EFI_IMAGE_REL_BASED_RISCV_LOW12I  7
+#define EFI_IMAGE_REL_BASED_RISCV_LOW12S  8
 #define EFI_IMAGE_REL_BASED_IA64_IMM64    9
 #define EFI_IMAGE_REL_BASED_DIR64         10
 
diff --git a/BaseTools/Source/Python/Common/DataType.py b/BaseTools/Source/Python/Common/DataType.py
index 8ae1bd2..2ee6b37 100644
--- a/BaseTools/Source/Python/Common/DataType.py
+++ b/BaseTools/Source/Python/Common/DataType.py
@@ -1,535 +1,540 @@
-## @file
-# This file is used to define common static strings used by INF/DEC/DSC files
-#
-# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
-# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-
-##
-# Common Definitions
-#
-TAB_SPLIT = '.'
-TAB_COMMENT_EDK_START = '/*'
-TAB_COMMENT_EDK_END = '*/'
-TAB_COMMENT_EDK_SPLIT = '//'
-TAB_COMMENT_SPLIT = '#'
-TAB_SPECIAL_COMMENT = '##'
-TAB_EQUAL_SPLIT = '='
-TAB_VALUE_SPLIT = '|'
-TAB_COMMA_SPLIT = ','
-TAB_SPACE_SPLIT = ' '
-TAB_SEMI_COLON_SPLIT = ';'
-TAB_SECTION_START = '['
-TAB_SECTION_END = ']'
-TAB_OPTION_START = '<'
-TAB_OPTION_END = '>'
-TAB_SLASH = '\\'
-TAB_BACK_SLASH = '/'
-TAB_STAR = '*'
-TAB_LINE_BREAK = '\n'
-TAB_PRINTCHAR_VT = '\x0b'
-TAB_PRINTCHAR_BS = '\b'
-TAB_PRINTCHAR_NUL = '\0'
-TAB_UINT8 = 'UINT8'
-TAB_UINT16 = 'UINT16'
-TAB_UINT32 = 'UINT32'
-TAB_UINT64 = 'UINT64'
-TAB_VOID = 'VOID*'
-TAB_GUID = 'GUID'
-
-TAB_PCD_CLEAN_NUMERIC_TYPES = {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UINT64}
-TAB_PCD_NUMERIC_TYPES = {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UINT64, 'BOOLEAN'}
-TAB_PCD_NUMERIC_TYPES_VOID = {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UINT64, 'BOOLEAN', TAB_VOID}
-
-TAB_WORKSPACE = '$(WORKSPACE)'
-TAB_FV_DIRECTORY = 'FV'
-
-TAB_ARCH_NULL = ''
-TAB_ARCH_COMMON = 'COMMON'
-TAB_ARCH_IA32 = 'IA32'
-TAB_ARCH_X64 = 'X64'
-TAB_ARCH_ARM = 'ARM'
-TAB_ARCH_EBC = 'EBC'
-TAB_ARCH_AARCH64 = 'AARCH64'
-
-ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC, TAB_ARCH_AARCH64, TAB_ARCH_COMMON}
-
-SUP_MODULE_BASE = 'BASE'
-SUP_MODULE_SEC = 'SEC'
-SUP_MODULE_PEI_CORE = 'PEI_CORE'
-SUP_MODULE_PEIM = 'PEIM'
-SUP_MODULE_DXE_CORE = 'DXE_CORE'
-SUP_MODULE_DXE_DRIVER = 'DXE_DRIVER'
-SUP_MODULE_DXE_RUNTIME_DRIVER = 'DXE_RUNTIME_DRIVER'
-SUP_MODULE_DXE_SAL_DRIVER = 'DXE_SAL_DRIVER'
-SUP_MODULE_DXE_SMM_DRIVER = 'DXE_SMM_DRIVER'
-SUP_MODULE_UEFI_DRIVER = 'UEFI_DRIVER'
-SUP_MODULE_UEFI_APPLICATION = 'UEFI_APPLICATION'
-SUP_MODULE_USER_DEFINED = 'USER_DEFINED'
-SUP_MODULE_HOST_APPLICATION = 'HOST_APPLICATION'
-SUP_MODULE_SMM_CORE = 'SMM_CORE'
-SUP_MODULE_MM_STANDALONE = 'MM_STANDALONE'
-SUP_MODULE_MM_CORE_STANDALONE = 'MM_CORE_STANDALONE'
-
-SUP_MODULE_LIST = [SUP_MODULE_BASE, SUP_MODULE_SEC, SUP_MODULE_PEI_CORE, SUP_MODULE_PEIM, SUP_MODULE_DXE_CORE, SUP_MODULE_DXE_DRIVER, \
-                   SUP_MODULE_DXE_RUNTIME_DRIVER, SUP_MODULE_DXE_SAL_DRIVER, SUP_MODULE_DXE_SMM_DRIVER, SUP_MODULE_UEFI_DRIVER, \
-                   SUP_MODULE_UEFI_APPLICATION, SUP_MODULE_USER_DEFINED, SUP_MODULE_HOST_APPLICATION, SUP_MODULE_SMM_CORE, SUP_MODULE_MM_STANDALONE, SUP_MODULE_MM_CORE_STANDALONE]
-SUP_MODULE_LIST_STRING = TAB_VALUE_SPLIT.join(SUP_MODULE_LIST)
-SUP_MODULE_SET_PEI = {SUP_MODULE_PEIM, SUP_MODULE_PEI_CORE}
-
-EDK_COMPONENT_TYPE_LIBRARY = 'LIBRARY'
-EDK_COMPONENT_TYPE_SECURITY_CORE = 'SECURITY_CORE'
-EDK_COMPONENT_TYPE_PEI_CORE = SUP_MODULE_PEI_CORE
-EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER = 'COMBINED_PEIM_DRIVER'
-EDK_COMPONENT_TYPE_PIC_PEIM = 'PIC_PEIM'
-EDK_COMPONENT_TYPE_RELOCATABLE_PEIM = 'RELOCATABLE_PEIM'
-EDK_COMPONENT_TYPE_BS_DRIVER = 'BS_DRIVER'
-EDK_COMPONENT_TYPE_RT_DRIVER = 'RT_DRIVER'
-EDK_COMPONENT_TYPE_SAL_RT_DRIVER = 'SAL_RT_DRIVER'
-EDK_COMPONENT_TYPE_APPLICATION = 'APPLICATION'
-EDK_NAME = 'EDK'
-EDKII_NAME = 'EDKII'
-MSG_EDKII_MAIL_ADDR = 'devel@edk2.groups.io'
-
-COMPONENT_TO_MODULE_MAP_DICT = {
-    EDK_COMPONENT_TYPE_LIBRARY               :   SUP_MODULE_BASE,
-    EDK_COMPONENT_TYPE_SECURITY_CORE         :   SUP_MODULE_SEC,
-    EDK_COMPONENT_TYPE_PEI_CORE              :   SUP_MODULE_PEI_CORE,
-    EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER  :   SUP_MODULE_PEIM,
-    EDK_COMPONENT_TYPE_PIC_PEIM              :   SUP_MODULE_PEIM,
-    EDK_COMPONENT_TYPE_RELOCATABLE_PEIM      :   SUP_MODULE_PEIM,
-    "PE32_PEIM"                              :   SUP_MODULE_PEIM,
-    EDK_COMPONENT_TYPE_BS_DRIVER             :   SUP_MODULE_DXE_DRIVER,
-    EDK_COMPONENT_TYPE_RT_DRIVER             :   SUP_MODULE_DXE_RUNTIME_DRIVER,
-    EDK_COMPONENT_TYPE_SAL_RT_DRIVER         :   SUP_MODULE_DXE_SAL_DRIVER,
-    EDK_COMPONENT_TYPE_APPLICATION           :   SUP_MODULE_UEFI_APPLICATION,
-    "LOGO"                                   :   SUP_MODULE_BASE,
-}
-
-BINARY_FILE_TYPE_FW = 'FW'
-BINARY_FILE_TYPE_GUID = 'GUID'
-BINARY_FILE_TYPE_PREEFORM = 'PREEFORM'
-BINARY_FILE_TYPE_UEFI_APP = 'UEFI_APP'
-BINARY_FILE_TYPE_UNI_UI = 'UNI_UI'
-BINARY_FILE_TYPE_UNI_VER = 'UNI_VER'
-BINARY_FILE_TYPE_LIB = 'LIB'
-BINARY_FILE_TYPE_PE32 = 'PE32'
-BINARY_FILE_TYPE_PIC = 'PIC'
-BINARY_FILE_TYPE_PEI_DEPEX = 'PEI_DEPEX'
-BINARY_FILE_TYPE_DXE_DEPEX = 'DXE_DEPEX'
-BINARY_FILE_TYPE_SMM_DEPEX = 'SMM_DEPEX'
-BINARY_FILE_TYPE_TE = 'TE'
-BINARY_FILE_TYPE_VER = 'VER'
-BINARY_FILE_TYPE_UI = 'UI'
-BINARY_FILE_TYPE_BIN = 'BIN'
-BINARY_FILE_TYPE_FV = 'FV'
-BINARY_FILE_TYPE_RAW = 'RAW_BINARY'
-
-PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS = 'LIBRARY_CLASS'
-PLATFORM_COMPONENT_TYPE_MODULE = 'MODULE'
-
-TAB_SOURCES = 'Sources'
-TAB_SOURCES_COMMON = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_SOURCES_IA32 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_IA32
-TAB_SOURCES_X64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_X64
-TAB_SOURCES_ARM = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_ARM
-TAB_SOURCES_EBC = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_EBC
-TAB_SOURCES_AARCH64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_BINARIES = 'Binaries'
-TAB_BINARIES_COMMON = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_BINARIES_IA32 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_IA32
-TAB_BINARIES_X64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_X64
-TAB_BINARIES_ARM = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_ARM
-TAB_BINARIES_EBC = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_EBC
-TAB_BINARIES_AARCH64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_INCLUDES = 'Includes'
-TAB_INCLUDES_COMMON = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_INCLUDES_IA32 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_IA32
-TAB_INCLUDES_X64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_X64
-TAB_INCLUDES_ARM = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_ARM
-TAB_INCLUDES_EBC = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_EBC
-TAB_INCLUDES_AARCH64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_GUIDS = 'Guids'
-TAB_GUIDS_COMMON = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_GUIDS_IA32 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_IA32
-TAB_GUIDS_X64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_X64
-TAB_GUIDS_ARM = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_ARM
-TAB_GUIDS_EBC = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_EBC
-TAB_GUIDS_AARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_PROTOCOLS = 'Protocols'
-TAB_PROTOCOLS_COMMON = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_PROTOCOLS_IA32 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_IA32
-TAB_PROTOCOLS_X64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_X64
-TAB_PROTOCOLS_ARM = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_ARM
-TAB_PROTOCOLS_EBC = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_EBC
-TAB_PROTOCOLS_AARCH64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_PPIS = 'Ppis'
-TAB_PPIS_COMMON = TAB_PPIS + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_PPIS_IA32 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_IA32
-TAB_PPIS_X64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_X64
-TAB_PPIS_ARM = TAB_PPIS + TAB_SPLIT + TAB_ARCH_ARM
-TAB_PPIS_EBC = TAB_PPIS + TAB_SPLIT + TAB_ARCH_EBC
-TAB_PPIS_AARCH64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_LIBRARY_CLASSES = 'LibraryClasses'
-TAB_LIBRARY_CLASSES_COMMON = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_LIBRARY_CLASSES_IA32 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_IA32
-TAB_LIBRARY_CLASSES_X64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_X64
-TAB_LIBRARY_CLASSES_ARM = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_ARM
-TAB_LIBRARY_CLASSES_EBC = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_EBC
-TAB_LIBRARY_CLASSES_AARCH64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_PACKAGES = 'Packages'
-TAB_PACKAGES_COMMON = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_PACKAGES_IA32 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_IA32
-TAB_PACKAGES_X64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_X64
-TAB_PACKAGES_ARM = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_ARM
-TAB_PACKAGES_EBC = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_EBC
-TAB_PACKAGES_AARCH64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_PCDS = 'Pcds'
-TAB_PCDS_FIXED_AT_BUILD = 'FixedAtBuild'
-TAB_PCDS_PATCHABLE_IN_MODULE = 'PatchableInModule'
-TAB_PCDS_FEATURE_FLAG = 'FeatureFlag'
-TAB_PCDS_DYNAMIC_EX = 'DynamicEx'
-TAB_PCDS_DYNAMIC_EX_DEFAULT = 'DynamicExDefault'
-TAB_PCDS_DYNAMIC_EX_VPD = 'DynamicExVpd'
-TAB_PCDS_DYNAMIC_EX_HII = 'DynamicExHii'
-TAB_PCDS_DYNAMIC = 'Dynamic'
-TAB_PCDS_DYNAMIC_DEFAULT = 'DynamicDefault'
-TAB_PCDS_DYNAMIC_VPD = 'DynamicVpd'
-TAB_PCDS_DYNAMIC_HII = 'DynamicHii'
-
-PCD_DYNAMIC_TYPE_SET = {TAB_PCDS_DYNAMIC, TAB_PCDS_DYNAMIC_DEFAULT, TAB_PCDS_DYNAMIC_VPD, TAB_PCDS_DYNAMIC_HII}
-PCD_DYNAMIC_EX_TYPE_SET = {TAB_PCDS_DYNAMIC_EX, TAB_PCDS_DYNAMIC_EX_DEFAULT, TAB_PCDS_DYNAMIC_EX_VPD, TAB_PCDS_DYNAMIC_EX_HII}
-
-# leave as a list for order
-PCD_TYPE_LIST = [TAB_PCDS_FIXED_AT_BUILD, TAB_PCDS_PATCHABLE_IN_MODULE, TAB_PCDS_FEATURE_FLAG, TAB_PCDS_DYNAMIC, TAB_PCDS_DYNAMIC_EX]
-
-TAB_PCDS_FIXED_AT_BUILD_NULL = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD
-TAB_PCDS_FIXED_AT_BUILD_COMMON = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_PCDS_FIXED_AT_BUILD_IA32 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_IA32
-TAB_PCDS_FIXED_AT_BUILD_X64 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_X64
-TAB_PCDS_FIXED_AT_BUILD_ARM = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_ARM
-TAB_PCDS_FIXED_AT_BUILD_EBC = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_EBC
-TAB_PCDS_FIXED_AT_BUILD_AARCH64 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_PCDS_PATCHABLE_IN_MODULE_NULL = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE
-TAB_PCDS_PATCHABLE_IN_MODULE_COMMON = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_PCDS_PATCHABLE_IN_MODULE_IA32 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_IA32
-TAB_PCDS_PATCHABLE_IN_MODULE_X64 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_X64
-TAB_PCDS_PATCHABLE_IN_MODULE_ARM = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_ARM
-TAB_PCDS_PATCHABLE_IN_MODULE_EBC = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_EBC
-TAB_PCDS_PATCHABLE_IN_MODULE_AARCH64 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_PCDS_FEATURE_FLAG_NULL = TAB_PCDS + TAB_PCDS_FEATURE_FLAG
-TAB_PCDS_FEATURE_FLAG_COMMON = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_PCDS_FEATURE_FLAG_IA32 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_IA32
-TAB_PCDS_FEATURE_FLAG_X64 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_X64
-TAB_PCDS_FEATURE_FLAG_ARM = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_ARM
-TAB_PCDS_FEATURE_FLAG_EBC = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_EBC
-TAB_PCDS_FEATURE_FLAG_AARCH64 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_PCDS_DYNAMIC_EX_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_EX
-TAB_PCDS_DYNAMIC_EX_DEFAULT_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_EX_DEFAULT
-TAB_PCDS_DYNAMIC_EX_HII_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_EX_HII
-TAB_PCDS_DYNAMIC_EX_VPD_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_EX_VPD
-TAB_PCDS_DYNAMIC_EX_COMMON = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_PCDS_DYNAMIC_EX_IA32 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_IA32
-TAB_PCDS_DYNAMIC_EX_X64 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_X64
-TAB_PCDS_DYNAMIC_EX_ARM = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_ARM
-TAB_PCDS_DYNAMIC_EX_EBC = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_EBC
-TAB_PCDS_DYNAMIC_EX_AARCH64 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_PCDS_DYNAMIC_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC
-TAB_PCDS_DYNAMIC_DEFAULT_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_DEFAULT
-TAB_PCDS_DYNAMIC_HII_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_HII
-TAB_PCDS_DYNAMIC_VPD_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_VPD
-TAB_PCDS_DYNAMIC_COMMON = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_PCDS_DYNAMIC_IA32 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_IA32
-TAB_PCDS_DYNAMIC_X64 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_X64
-TAB_PCDS_DYNAMIC_ARM = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_ARM
-TAB_PCDS_DYNAMIC_EBC = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_EBC
-TAB_PCDS_DYNAMIC_AARCH64 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_PEI_PAGE_SIZE = 'PcdLoadFixAddressPeiCodePageNumber'
-TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_PEI_PAGE_SIZE_DATA_TYPE = 'UINT32'
-TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_DXE_PAGE_SIZE = 'PcdLoadFixAddressBootTimeCodePageNumber'
-TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_DXE_PAGE_SIZE_DATA_TYPE = 'UINT32'
-TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_RUNTIME_PAGE_SIZE = 'PcdLoadFixAddressRuntimeCodePageNumber'
-TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_RUNTIME_PAGE_SIZE_DATA_TYPE = 'UINT32'
-TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SMM_PAGE_SIZE = 'PcdLoadFixAddressSmmCodePageNumber'
-TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SMM_PAGE_SIZE_DATA_TYPE = 'UINT32'
-TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SET =  {TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_PEI_PAGE_SIZE, \
-                                            TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_DXE_PAGE_SIZE, \
-                                            TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_RUNTIME_PAGE_SIZE, \
-                                            TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SMM_PAGE_SIZE}
-
-## The mapping dictionary from datum type to its maximum number.
-MAX_VAL_TYPE = {"BOOLEAN":0x01, TAB_UINT8:0xFF, TAB_UINT16:0xFFFF, TAB_UINT32:0xFFFFFFFF, TAB_UINT64:0xFFFFFFFFFFFFFFFF}
-## The mapping dictionary from datum type to size string.
-MAX_SIZE_TYPE = {"BOOLEAN":1, TAB_UINT8:1, TAB_UINT16:2, TAB_UINT32:4, TAB_UINT64:8}
-
-TAB_DEPEX = 'Depex'
-TAB_DEPEX_COMMON = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_DEPEX_IA32 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_IA32
-TAB_DEPEX_X64 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_X64
-TAB_DEPEX_ARM = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_ARM
-TAB_DEPEX_EBC = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_EBC
-TAB_DEPEX_AARCH64 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_SKUIDS = 'SkuIds'
-TAB_DEFAULT_STORES = 'DefaultStores'
-TAB_DEFAULT_STORES_DEFAULT = 'STANDARD'
-
-TAB_LIBRARIES = 'Libraries'
-TAB_LIBRARIES_COMMON = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_LIBRARIES_IA32 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_IA32
-TAB_LIBRARIES_X64 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_X64
-TAB_LIBRARIES_ARM = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_ARM
-TAB_LIBRARIES_EBC = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_EBC
-TAB_LIBRARIES_AARCH64 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_COMPONENTS = 'Components'
-TAB_COMPONENTS_COMMON = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_COMMON
-TAB_COMPONENTS_IA32 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_IA32
-TAB_COMPONENTS_X64 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_X64
-TAB_COMPONENTS_ARM = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_ARM
-TAB_COMPONENTS_EBC = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_EBC
-TAB_COMPONENTS_AARCH64 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_AARCH64
-
-TAB_BUILD_OPTIONS = 'BuildOptions'
-
-TAB_DEFINE = 'DEFINE'
-TAB_NMAKE = 'Nmake'
-TAB_USER_EXTENSIONS = 'UserExtensions'
-TAB_INCLUDE = '!include'
-TAB_DEFAULT = 'DEFAULT'
-TAB_COMMON = 'COMMON'
-
-#
-# Common Define
-#
-TAB_COMMON_DEFINES = 'Defines'
-
-#
-# Inf Definitions
-#
-TAB_INF_DEFINES = TAB_COMMON_DEFINES
-TAB_INF_DEFINES_INF_VERSION = 'INF_VERSION'
-TAB_INF_DEFINES_BASE_NAME = 'BASE_NAME'
-TAB_INF_DEFINES_FILE_GUID = 'FILE_GUID'
-TAB_INF_DEFINES_MODULE_TYPE = 'MODULE_TYPE'
-TAB_INF_DEFINES_EFI_SPECIFICATION_VERSION = 'EFI_SPECIFICATION_VERSION'
-TAB_INF_DEFINES_UEFI_SPECIFICATION_VERSION = 'UEFI_SPECIFICATION_VERSION'
-TAB_INF_DEFINES_PI_SPECIFICATION_VERSION = 'PI_SPECIFICATION_VERSION'
-TAB_INF_DEFINES_EDK_RELEASE_VERSION = 'EDK_RELEASE_VERSION'
-TAB_INF_DEFINES_BINARY_MODULE = 'BINARY_MODULE'
-TAB_INF_DEFINES_LIBRARY_CLASS = 'LIBRARY_CLASS'
-TAB_INF_DEFINES_COMPONENT_TYPE = 'COMPONENT_TYPE'
-TAB_INF_DEFINES_MAKEFILE_NAME = 'MAKEFILE_NAME'
-TAB_INF_DEFINES_DPX_SOURCE = 'DPX_SOURCE'
-TAB_INF_DEFINES_BUILD_NUMBER = 'BUILD_NUMBER'
-TAB_INF_DEFINES_BUILD_TYPE = 'BUILD_TYPE'
-TAB_INF_DEFINES_FFS_EXT = 'FFS_EXT'
-TAB_INF_DEFINES_FV_EXT = 'FV_EXT'
-TAB_INF_DEFINES_SOURCE_FV = 'SOURCE_FV'
-TAB_INF_DEFINES_VERSION_NUMBER = 'VERSION_NUMBER'
-TAB_INF_DEFINES_VERSION = 'VERSION'          # for Edk inf, the same as VERSION_NUMBER
-TAB_INF_DEFINES_VERSION_STRING = 'VERSION_STRING'
-TAB_INF_DEFINES_PCD_IS_DRIVER = 'PCD_IS_DRIVER'
-TAB_INF_DEFINES_TIANO_EDK_FLASHMAP_H = 'TIANO_EDK_FLASHMAP_H'
-TAB_INF_DEFINES_ENTRY_POINT = 'ENTRY_POINT'
-TAB_INF_DEFINES_UNLOAD_IMAGE = 'UNLOAD_IMAGE'
-TAB_INF_DEFINES_CONSTRUCTOR = 'CONSTRUCTOR'
-TAB_INF_DEFINES_DESTRUCTOR = 'DESTRUCTOR'
-TAB_INF_DEFINES_DEFINE = 'DEFINE'
-TAB_INF_DEFINES_SPEC = 'SPEC'
-TAB_INF_DEFINES_CUSTOM_MAKEFILE = 'CUSTOM_MAKEFILE'
-TAB_INF_DEFINES_MACRO = '__MACROS__'
-TAB_INF_DEFINES_SHADOW = 'SHADOW'
-TAB_INF_FIXED_PCD = 'FixedPcd'
-TAB_INF_FEATURE_PCD = 'FeaturePcd'
-TAB_INF_PATCH_PCD = 'PatchPcd'
-TAB_INF_PCD = 'Pcd'
-TAB_INF_PCD_EX = 'PcdEx'
-TAB_INF_USAGE_PRO = 'PRODUCES'
-TAB_INF_USAGE_SOME_PRO = 'SOMETIMES_PRODUCES'
-TAB_INF_USAGE_CON = 'CONSUMES'
-TAB_INF_USAGE_SOME_CON = 'SOMETIMES_CONSUMES'
-TAB_INF_USAGE_NOTIFY = 'NOTIFY'
-TAB_INF_USAGE_TO_START = 'TO_START'
-TAB_INF_USAGE_BY_START = 'BY_START'
-TAB_INF_GUIDTYPE_EVENT = 'Event'
-TAB_INF_GUIDTYPE_FILE = 'File'
-TAB_INF_GUIDTYPE_FV = 'FV'
-TAB_INF_GUIDTYPE_GUID = 'GUID'
-TAB_INF_GUIDTYPE_HII = 'HII'
-TAB_INF_GUIDTYPE_HOB = 'HOB'
-TAB_INF_GUIDTYPE_ST = 'SystemTable'
-TAB_INF_GUIDTYPE_TSG = 'TokenSpaceGuid'
-TAB_INF_GUIDTYPE_VAR = 'Variable'
-TAB_INF_GUIDTYPE_PROTOCOL = 'PROTOCOL'
-TAB_INF_GUIDTYPE_PPI = 'PPI'
-TAB_INF_USAGE_UNDEFINED = 'UNDEFINED'
-
-#
-# Dec Definitions
-#
-TAB_DEC_DEFINES = TAB_COMMON_DEFINES
-TAB_DEC_DEFINES_DEC_SPECIFICATION = 'DEC_SPECIFICATION'
-TAB_DEC_DEFINES_PACKAGE_NAME = 'PACKAGE_NAME'
-TAB_DEC_DEFINES_PACKAGE_GUID = 'PACKAGE_GUID'
-TAB_DEC_DEFINES_PACKAGE_VERSION = 'PACKAGE_VERSION'
-TAB_DEC_DEFINES_PKG_UNI_FILE = 'PKG_UNI_FILE'
-
-#
-# Dsc Definitions
-#
-TAB_DSC_DEFINES = TAB_COMMON_DEFINES
-TAB_DSC_DEFINES_PLATFORM_NAME = 'PLATFORM_NAME'
-TAB_DSC_DEFINES_PLATFORM_GUID = 'PLATFORM_GUID'
-TAB_DSC_DEFINES_PLATFORM_VERSION = 'PLATFORM_VERSION'
-TAB_DSC_DEFINES_DSC_SPECIFICATION = 'DSC_SPECIFICATION'
-TAB_DSC_DEFINES_OUTPUT_DIRECTORY = 'OUTPUT_DIRECTORY'
-TAB_DSC_DEFINES_SUPPORTED_ARCHITECTURES = 'SUPPORTED_ARCHITECTURES'
-TAB_DSC_DEFINES_BUILD_TARGETS = 'BUILD_TARGETS'
-TAB_DSC_DEFINES_SKUID_IDENTIFIER = 'SKUID_IDENTIFIER'
-TAB_DSC_DEFINES_PCD_INFO_GENERATION = 'PCD_INFO_GENERATION'
-TAB_DSC_DEFINES_PCD_VAR_CHECK_GENERATION = 'PCD_VAR_CHECK_GENERATION'
-TAB_DSC_DEFINES_FLASH_DEFINITION = 'FLASH_DEFINITION'
-TAB_DSC_DEFINES_BUILD_NUMBER = 'BUILD_NUMBER'
-TAB_DSC_DEFINES_MAKEFILE_NAME = 'MAKEFILE_NAME'
-TAB_DSC_DEFINES_BS_BASE_ADDRESS = 'BsBaseAddress'
-TAB_DSC_DEFINES_RT_BASE_ADDRESS = 'RtBaseAddress'
-TAB_DSC_DEFINES_RFC_LANGUAGES = 'RFC_LANGUAGES'
-TAB_DSC_DEFINES_ISO_LANGUAGES = 'ISO_LANGUAGES'
-TAB_DSC_DEFINES_DEFINE = 'DEFINE'
-TAB_DSC_DEFINES_VPD_TOOL_GUID = 'VPD_TOOL_GUID'
-TAB_FIX_LOAD_TOP_MEMORY_ADDRESS = 'FIX_LOAD_TOP_MEMORY_ADDRESS'
-TAB_DSC_DEFINES_EDKGLOBAL = 'EDK_GLOBAL'
-TAB_DSC_PREBUILD = 'PREBUILD'
-TAB_DSC_POSTBUILD = 'POSTBUILD'
-#
-# TargetTxt Definitions
-#
-TAB_TAT_DEFINES_ACTIVE_PLATFORM = 'ACTIVE_PLATFORM'
-TAB_TAT_DEFINES_ACTIVE_MODULE = 'ACTIVE_MODULE'
-TAB_TAT_DEFINES_TOOL_CHAIN_CONF = 'TOOL_CHAIN_CONF'
-TAB_TAT_DEFINES_MAX_CONCURRENT_THREAD_NUMBER = 'MAX_CONCURRENT_THREAD_NUMBER'
-TAB_TAT_DEFINES_TARGET = 'TARGET'
-TAB_TAT_DEFINES_TOOL_CHAIN_TAG = 'TOOL_CHAIN_TAG'
-TAB_TAT_DEFINES_TARGET_ARCH = 'TARGET_ARCH'
-TAB_TAT_DEFINES_BUILD_RULE_CONF = "BUILD_RULE_CONF"
-
-#
-# ToolDef Definitions
-#
-TAB_TOD_DEFINES_TARGET = 'TARGET'
-TAB_TOD_DEFINES_TOOL_CHAIN_TAG = 'TOOL_CHAIN_TAG'
-TAB_TOD_DEFINES_TARGET_ARCH = 'TARGET_ARCH'
-TAB_TOD_DEFINES_COMMAND_TYPE = 'COMMAND_TYPE'
-TAB_TOD_DEFINES_FAMILY = 'FAMILY'
-TAB_TOD_DEFINES_BUILDRULEFAMILY = 'BUILDRULEFAMILY'
-TAB_TOD_DEFINES_BUILDRULEORDER = 'BUILDRULEORDER'
-
-#
-# Conditional Statements
-#
-TAB_IF = '!if'
-TAB_END_IF = '!endif'
-TAB_ELSE_IF = '!elseif'
-TAB_ELSE = '!else'
-TAB_IF_DEF = '!ifdef'
-TAB_IF_N_DEF = '!ifndef'
-TAB_IF_EXIST = '!if exist'
-TAB_ERROR = '!error'
-
-#
-# Unknown section
-#
-TAB_UNKNOWN = 'UNKNOWN'
-
-#
-# Build database path
-#
-DATABASE_PATH = ":memory:" #"BuildDatabase.db"
-
-# used by ECC
-MODIFIER_SET = {'IN', 'OUT', 'OPTIONAL', 'UNALIGNED', 'EFI_RUNTIMESERVICE', 'EFI_BOOTSERVICE', 'EFIAPI'}
-
-# Dependency Opcodes
-DEPEX_OPCODE_BEFORE = "BEFORE"
-DEPEX_OPCODE_AFTER = "AFTER"
-DEPEX_OPCODE_PUSH = "PUSH"
-DEPEX_OPCODE_AND = "AND"
-DEPEX_OPCODE_OR = "OR"
-DEPEX_OPCODE_NOT = "NOT"
-DEPEX_OPCODE_END = "END"
-DEPEX_OPCODE_SOR = "SOR"
-DEPEX_OPCODE_TRUE = "TRUE"
-DEPEX_OPCODE_FALSE = "FALSE"
-
-# Dependency Expression
-DEPEX_SUPPORTED_OPCODE_SET = {"BEFORE", "AFTER", "PUSH", "AND", "OR", "NOT", "END", "SOR", "TRUE", "FALSE", '(', ')'}
-
-TAB_STATIC_LIBRARY = "STATIC-LIBRARY-FILE"
-TAB_DYNAMIC_LIBRARY = "DYNAMIC-LIBRARY-FILE"
-TAB_FRAMEWORK_IMAGE = "EFI-IMAGE-FILE"
-TAB_C_CODE_FILE = "C-CODE-FILE"
-TAB_C_HEADER_FILE = "C-HEADER-FILE"
-TAB_UNICODE_FILE = "UNICODE-TEXT-FILE"
-TAB_IMAGE_FILE = "IMAGE-DEFINITION-FILE"
-TAB_DEPENDENCY_EXPRESSION_FILE = "DEPENDENCY-EXPRESSION-FILE"
-TAB_UNKNOWN_FILE = "UNKNOWN-TYPE-FILE"
-TAB_DEFAULT_BINARY_FILE = "_BINARY_FILE_"
-TAB_OBJECT_FILE = "OBJECT-FILE"
-TAB_VFR_FILE = 'VISUAL-FORM-REPRESENTATION-FILE'
-
-# used by BRG
-TAB_BRG_PCD = 'PCD'
-TAB_BRG_LIBRARY = 'Library'
-
-#
-# Build Rule File Version Definition
-#
-TAB_BUILD_RULE_VERSION = "build_rule_version"
-
-# section name for PCDs
-PCDS_DYNAMIC_DEFAULT = "PcdsDynamicDefault"
-PCDS_DYNAMIC_VPD = "PcdsDynamicVpd"
-PCDS_DYNAMIC_HII = "PcdsDynamicHii"
-PCDS_DYNAMICEX_DEFAULT = "PcdsDynamicExDefault"
-PCDS_DYNAMICEX_VPD = "PcdsDynamicExVpd"
-PCDS_DYNAMICEX_HII = "PcdsDynamicExHii"
-
-SECTIONS_HAVE_ITEM_PCD_SET = {PCDS_DYNAMIC_DEFAULT.upper(), PCDS_DYNAMIC_VPD.upper(), PCDS_DYNAMIC_HII.upper(), \
-                              PCDS_DYNAMICEX_DEFAULT.upper(), PCDS_DYNAMICEX_VPD.upper(), PCDS_DYNAMICEX_HII.upper()}
-# Section allowed to have items after arch
-SECTIONS_HAVE_ITEM_AFTER_ARCH_SET = {TAB_LIBRARY_CLASSES.upper(), TAB_DEPEX.upper(), TAB_USER_EXTENSIONS.upper(),
-                                 PCDS_DYNAMIC_DEFAULT.upper(),
-                                 PCDS_DYNAMIC_VPD.upper(),
-                                 PCDS_DYNAMIC_HII.upper(),
-                                 PCDS_DYNAMICEX_DEFAULT.upper(),
-                                 PCDS_DYNAMICEX_VPD.upper(),
-                                 PCDS_DYNAMICEX_HII.upper(),
-                                 TAB_BUILD_OPTIONS.upper(),
-                                 TAB_INCLUDES.upper()}
-
-#
-# pack codes as used in PcdDb and elsewhere
-#
-PACK_PATTERN_GUID = '=LHHBBBBBBBB'
-PACK_CODE_BY_SIZE = {8:'=Q',
-                     4:'=L',
-                     2:'=H',
-                     1:'=B',
-                     0:'=B',
-                    16:""}
-
-TAB_COMPILER_MSFT = 'MSFT'
\ No newline at end of file
+## @file
+# This file is used to define common static strings used by INF/DEC/DSC files
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+# Portions Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+
+##
+# Common Definitions
+#
+TAB_SPLIT = '.'
+TAB_COMMENT_EDK_START = '/*'
+TAB_COMMENT_EDK_END = '*/'
+TAB_COMMENT_EDK_SPLIT = '//'
+TAB_COMMENT_SPLIT = '#'
+TAB_SPECIAL_COMMENT = '##'
+TAB_EQUAL_SPLIT = '='
+TAB_VALUE_SPLIT = '|'
+TAB_COMMA_SPLIT = ','
+TAB_SPACE_SPLIT = ' '
+TAB_SEMI_COLON_SPLIT = ';'
+TAB_SECTION_START = '['
+TAB_SECTION_END = ']'
+TAB_OPTION_START = '<'
+TAB_OPTION_END = '>'
+TAB_SLASH = '\\'
+TAB_BACK_SLASH = '/'
+TAB_STAR = '*'
+TAB_LINE_BREAK = '\n'
+TAB_PRINTCHAR_VT = '\x0b'
+TAB_PRINTCHAR_BS = '\b'
+TAB_PRINTCHAR_NUL = '\0'
+TAB_UINT8 = 'UINT8'
+TAB_UINT16 = 'UINT16'
+TAB_UINT32 = 'UINT32'
+TAB_UINT64 = 'UINT64'
+TAB_VOID = 'VOID*'
+TAB_GUID = 'GUID'
+
+TAB_PCD_CLEAN_NUMERIC_TYPES = {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UINT64}
+TAB_PCD_NUMERIC_TYPES = {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UINT64, 'BOOLEAN'}
+TAB_PCD_NUMERIC_TYPES_VOID = {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UINT64, 'BOOLEAN', TAB_VOID}
+
+TAB_WORKSPACE = '$(WORKSPACE)'
+TAB_FV_DIRECTORY = 'FV'
+
+TAB_ARCH_NULL = ''
+TAB_ARCH_COMMON = 'COMMON'
+TAB_ARCH_IA32 = 'IA32'
+TAB_ARCH_X64 = 'X64'
+TAB_ARCH_ARM = 'ARM'
+TAB_ARCH_EBC = 'EBC'
+TAB_ARCH_AARCH64 = 'AARCH64'
+
+TAB_ARCH_RISCV32 = 'RISCV32'
+TAB_ARCH_RISCV64 = 'RISCV64'
+TAB_ARCH_RISCV128 = 'RISCV128'
+
+ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC, TAB_ARCH_AARCH64, TAB_ARCH_RISCV32, TAB_ARCH_RISCV64, TAB_ARCH_RISCV128, TAB_ARCH_COMMON}
+
+SUP_MODULE_BASE = 'BASE'
+SUP_MODULE_SEC = 'SEC'
+SUP_MODULE_PEI_CORE = 'PEI_CORE'
+SUP_MODULE_PEIM = 'PEIM'
+SUP_MODULE_DXE_CORE = 'DXE_CORE'
+SUP_MODULE_DXE_DRIVER = 'DXE_DRIVER'
+SUP_MODULE_DXE_RUNTIME_DRIVER = 'DXE_RUNTIME_DRIVER'
+SUP_MODULE_DXE_SAL_DRIVER = 'DXE_SAL_DRIVER'
+SUP_MODULE_DXE_SMM_DRIVER = 'DXE_SMM_DRIVER'
+SUP_MODULE_UEFI_DRIVER = 'UEFI_DRIVER'
+SUP_MODULE_UEFI_APPLICATION = 'UEFI_APPLICATION'
+SUP_MODULE_USER_DEFINED = 'USER_DEFINED'
+SUP_MODULE_HOST_APPLICATION = 'HOST_APPLICATION'
+SUP_MODULE_SMM_CORE = 'SMM_CORE'
+SUP_MODULE_MM_STANDALONE = 'MM_STANDALONE'
+SUP_MODULE_MM_CORE_STANDALONE = 'MM_CORE_STANDALONE'
+
+SUP_MODULE_LIST = [SUP_MODULE_BASE, SUP_MODULE_SEC, SUP_MODULE_PEI_CORE, SUP_MODULE_PEIM, SUP_MODULE_DXE_CORE, SUP_MODULE_DXE_DRIVER, \
+                   SUP_MODULE_DXE_RUNTIME_DRIVER, SUP_MODULE_DXE_SAL_DRIVER, SUP_MODULE_DXE_SMM_DRIVER, SUP_MODULE_UEFI_DRIVER, \
+                   SUP_MODULE_UEFI_APPLICATION, SUP_MODULE_USER_DEFINED, SUP_MODULE_HOST_APPLICATION, SUP_MODULE_SMM_CORE, SUP_MODULE_MM_STANDALONE, SUP_MODULE_MM_CORE_STANDALONE]
+SUP_MODULE_LIST_STRING = TAB_VALUE_SPLIT.join(SUP_MODULE_LIST)
+SUP_MODULE_SET_PEI = {SUP_MODULE_PEIM, SUP_MODULE_PEI_CORE}
+
+EDK_COMPONENT_TYPE_LIBRARY = 'LIBRARY'
+EDK_COMPONENT_TYPE_SECURITY_CORE = 'SECURITY_CORE'
+EDK_COMPONENT_TYPE_PEI_CORE = SUP_MODULE_PEI_CORE
+EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER = 'COMBINED_PEIM_DRIVER'
+EDK_COMPONENT_TYPE_PIC_PEIM = 'PIC_PEIM'
+EDK_COMPONENT_TYPE_RELOCATABLE_PEIM = 'RELOCATABLE_PEIM'
+EDK_COMPONENT_TYPE_BS_DRIVER = 'BS_DRIVER'
+EDK_COMPONENT_TYPE_RT_DRIVER = 'RT_DRIVER'
+EDK_COMPONENT_TYPE_SAL_RT_DRIVER = 'SAL_RT_DRIVER'
+EDK_COMPONENT_TYPE_APPLICATION = 'APPLICATION'
+EDK_NAME = 'EDK'
+EDKII_NAME = 'EDKII'
+MSG_EDKII_MAIL_ADDR = 'devel@edk2.groups.io'
+
+COMPONENT_TO_MODULE_MAP_DICT = {
+    EDK_COMPONENT_TYPE_LIBRARY               :   SUP_MODULE_BASE,
+    EDK_COMPONENT_TYPE_SECURITY_CORE         :   SUP_MODULE_SEC,
+    EDK_COMPONENT_TYPE_PEI_CORE              :   SUP_MODULE_PEI_CORE,
+    EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER  :   SUP_MODULE_PEIM,
+    EDK_COMPONENT_TYPE_PIC_PEIM              :   SUP_MODULE_PEIM,
+    EDK_COMPONENT_TYPE_RELOCATABLE_PEIM      :   SUP_MODULE_PEIM,
+    "PE32_PEIM"                              :   SUP_MODULE_PEIM,
+    EDK_COMPONENT_TYPE_BS_DRIVER             :   SUP_MODULE_DXE_DRIVER,
+    EDK_COMPONENT_TYPE_RT_DRIVER             :   SUP_MODULE_DXE_RUNTIME_DRIVER,
+    EDK_COMPONENT_TYPE_SAL_RT_DRIVER         :   SUP_MODULE_DXE_SAL_DRIVER,
+    EDK_COMPONENT_TYPE_APPLICATION           :   SUP_MODULE_UEFI_APPLICATION,
+    "LOGO"                                   :   SUP_MODULE_BASE,
+}
+
+BINARY_FILE_TYPE_FW = 'FW'
+BINARY_FILE_TYPE_GUID = 'GUID'
+BINARY_FILE_TYPE_PREEFORM = 'PREEFORM'
+BINARY_FILE_TYPE_UEFI_APP = 'UEFI_APP'
+BINARY_FILE_TYPE_UNI_UI = 'UNI_UI'
+BINARY_FILE_TYPE_UNI_VER = 'UNI_VER'
+BINARY_FILE_TYPE_LIB = 'LIB'
+BINARY_FILE_TYPE_PE32 = 'PE32'
+BINARY_FILE_TYPE_PIC = 'PIC'
+BINARY_FILE_TYPE_PEI_DEPEX = 'PEI_DEPEX'
+BINARY_FILE_TYPE_DXE_DEPEX = 'DXE_DEPEX'
+BINARY_FILE_TYPE_SMM_DEPEX = 'SMM_DEPEX'
+BINARY_FILE_TYPE_TE = 'TE'
+BINARY_FILE_TYPE_VER = 'VER'
+BINARY_FILE_TYPE_UI = 'UI'
+BINARY_FILE_TYPE_BIN = 'BIN'
+BINARY_FILE_TYPE_FV = 'FV'
+BINARY_FILE_TYPE_RAW = 'RAW_BINARY'
+
+PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS = 'LIBRARY_CLASS'
+PLATFORM_COMPONENT_TYPE_MODULE = 'MODULE'
+
+TAB_SOURCES = 'Sources'
+TAB_SOURCES_COMMON = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_SOURCES_IA32 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_IA32
+TAB_SOURCES_X64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_X64
+TAB_SOURCES_ARM = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_ARM
+TAB_SOURCES_EBC = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_EBC
+TAB_SOURCES_AARCH64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_BINARIES = 'Binaries'
+TAB_BINARIES_COMMON = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_BINARIES_IA32 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_IA32
+TAB_BINARIES_X64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_X64
+TAB_BINARIES_ARM = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_ARM
+TAB_BINARIES_EBC = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_EBC
+TAB_BINARIES_AARCH64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_INCLUDES = 'Includes'
+TAB_INCLUDES_COMMON = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_INCLUDES_IA32 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_IA32
+TAB_INCLUDES_X64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_X64
+TAB_INCLUDES_ARM = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_ARM
+TAB_INCLUDES_EBC = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_EBC
+TAB_INCLUDES_AARCH64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_GUIDS = 'Guids'
+TAB_GUIDS_COMMON = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_GUIDS_IA32 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_IA32
+TAB_GUIDS_X64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_X64
+TAB_GUIDS_ARM = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_ARM
+TAB_GUIDS_EBC = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_EBC
+TAB_GUIDS_AARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_PROTOCOLS = 'Protocols'
+TAB_PROTOCOLS_COMMON = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_PROTOCOLS_IA32 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_IA32
+TAB_PROTOCOLS_X64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_X64
+TAB_PROTOCOLS_ARM = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_ARM
+TAB_PROTOCOLS_EBC = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_EBC
+TAB_PROTOCOLS_AARCH64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_PPIS = 'Ppis'
+TAB_PPIS_COMMON = TAB_PPIS + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_PPIS_IA32 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_IA32
+TAB_PPIS_X64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_X64
+TAB_PPIS_ARM = TAB_PPIS + TAB_SPLIT + TAB_ARCH_ARM
+TAB_PPIS_EBC = TAB_PPIS + TAB_SPLIT + TAB_ARCH_EBC
+TAB_PPIS_AARCH64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_LIBRARY_CLASSES = 'LibraryClasses'
+TAB_LIBRARY_CLASSES_COMMON = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_LIBRARY_CLASSES_IA32 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_IA32
+TAB_LIBRARY_CLASSES_X64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_X64
+TAB_LIBRARY_CLASSES_ARM = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_ARM
+TAB_LIBRARY_CLASSES_EBC = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_EBC
+TAB_LIBRARY_CLASSES_AARCH64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_PACKAGES = 'Packages'
+TAB_PACKAGES_COMMON = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_PACKAGES_IA32 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_IA32
+TAB_PACKAGES_X64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_X64
+TAB_PACKAGES_ARM = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_ARM
+TAB_PACKAGES_EBC = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_EBC
+TAB_PACKAGES_AARCH64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_PCDS = 'Pcds'
+TAB_PCDS_FIXED_AT_BUILD = 'FixedAtBuild'
+TAB_PCDS_PATCHABLE_IN_MODULE = 'PatchableInModule'
+TAB_PCDS_FEATURE_FLAG = 'FeatureFlag'
+TAB_PCDS_DYNAMIC_EX = 'DynamicEx'
+TAB_PCDS_DYNAMIC_EX_DEFAULT = 'DynamicExDefault'
+TAB_PCDS_DYNAMIC_EX_VPD = 'DynamicExVpd'
+TAB_PCDS_DYNAMIC_EX_HII = 'DynamicExHii'
+TAB_PCDS_DYNAMIC = 'Dynamic'
+TAB_PCDS_DYNAMIC_DEFAULT = 'DynamicDefault'
+TAB_PCDS_DYNAMIC_VPD = 'DynamicVpd'
+TAB_PCDS_DYNAMIC_HII = 'DynamicHii'
+
+PCD_DYNAMIC_TYPE_SET = {TAB_PCDS_DYNAMIC, TAB_PCDS_DYNAMIC_DEFAULT, TAB_PCDS_DYNAMIC_VPD, TAB_PCDS_DYNAMIC_HII}
+PCD_DYNAMIC_EX_TYPE_SET = {TAB_PCDS_DYNAMIC_EX, TAB_PCDS_DYNAMIC_EX_DEFAULT, TAB_PCDS_DYNAMIC_EX_VPD, TAB_PCDS_DYNAMIC_EX_HII}
+
+# leave as a list for order
+PCD_TYPE_LIST = [TAB_PCDS_FIXED_AT_BUILD, TAB_PCDS_PATCHABLE_IN_MODULE, TAB_PCDS_FEATURE_FLAG, TAB_PCDS_DYNAMIC, TAB_PCDS_DYNAMIC_EX]
+
+TAB_PCDS_FIXED_AT_BUILD_NULL = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD
+TAB_PCDS_FIXED_AT_BUILD_COMMON = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_PCDS_FIXED_AT_BUILD_IA32 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_IA32
+TAB_PCDS_FIXED_AT_BUILD_X64 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_X64
+TAB_PCDS_FIXED_AT_BUILD_ARM = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_ARM
+TAB_PCDS_FIXED_AT_BUILD_EBC = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_EBC
+TAB_PCDS_FIXED_AT_BUILD_AARCH64 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_PCDS_PATCHABLE_IN_MODULE_NULL = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE
+TAB_PCDS_PATCHABLE_IN_MODULE_COMMON = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_PCDS_PATCHABLE_IN_MODULE_IA32 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_IA32
+TAB_PCDS_PATCHABLE_IN_MODULE_X64 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_X64
+TAB_PCDS_PATCHABLE_IN_MODULE_ARM = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_ARM
+TAB_PCDS_PATCHABLE_IN_MODULE_EBC = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_EBC
+TAB_PCDS_PATCHABLE_IN_MODULE_AARCH64 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_PCDS_FEATURE_FLAG_NULL = TAB_PCDS + TAB_PCDS_FEATURE_FLAG
+TAB_PCDS_FEATURE_FLAG_COMMON = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_PCDS_FEATURE_FLAG_IA32 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_IA32
+TAB_PCDS_FEATURE_FLAG_X64 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_X64
+TAB_PCDS_FEATURE_FLAG_ARM = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_ARM
+TAB_PCDS_FEATURE_FLAG_EBC = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_EBC
+TAB_PCDS_FEATURE_FLAG_AARCH64 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_PCDS_DYNAMIC_EX_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_EX
+TAB_PCDS_DYNAMIC_EX_DEFAULT_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_EX_DEFAULT
+TAB_PCDS_DYNAMIC_EX_HII_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_EX_HII
+TAB_PCDS_DYNAMIC_EX_VPD_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_EX_VPD
+TAB_PCDS_DYNAMIC_EX_COMMON = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_PCDS_DYNAMIC_EX_IA32 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_IA32
+TAB_PCDS_DYNAMIC_EX_X64 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_X64
+TAB_PCDS_DYNAMIC_EX_ARM = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_ARM
+TAB_PCDS_DYNAMIC_EX_EBC = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_EBC
+TAB_PCDS_DYNAMIC_EX_AARCH64 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_PCDS_DYNAMIC_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC
+TAB_PCDS_DYNAMIC_DEFAULT_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_DEFAULT
+TAB_PCDS_DYNAMIC_HII_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_HII
+TAB_PCDS_DYNAMIC_VPD_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_VPD
+TAB_PCDS_DYNAMIC_COMMON = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_PCDS_DYNAMIC_IA32 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_IA32
+TAB_PCDS_DYNAMIC_X64 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_X64
+TAB_PCDS_DYNAMIC_ARM = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_ARM
+TAB_PCDS_DYNAMIC_EBC = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_EBC
+TAB_PCDS_DYNAMIC_AARCH64 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_PEI_PAGE_SIZE = 'PcdLoadFixAddressPeiCodePageNumber'
+TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_PEI_PAGE_SIZE_DATA_TYPE = 'UINT32'
+TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_DXE_PAGE_SIZE = 'PcdLoadFixAddressBootTimeCodePageNumber'
+TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_DXE_PAGE_SIZE_DATA_TYPE = 'UINT32'
+TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_RUNTIME_PAGE_SIZE = 'PcdLoadFixAddressRuntimeCodePageNumber'
+TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_RUNTIME_PAGE_SIZE_DATA_TYPE = 'UINT32'
+TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SMM_PAGE_SIZE = 'PcdLoadFixAddressSmmCodePageNumber'
+TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SMM_PAGE_SIZE_DATA_TYPE = 'UINT32'
+TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SET =  {TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_PEI_PAGE_SIZE, \
+                                            TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_DXE_PAGE_SIZE, \
+                                            TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_RUNTIME_PAGE_SIZE, \
+                                            TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SMM_PAGE_SIZE}
+
+## The mapping dictionary from datum type to its maximum number.
+MAX_VAL_TYPE = {"BOOLEAN":0x01, TAB_UINT8:0xFF, TAB_UINT16:0xFFFF, TAB_UINT32:0xFFFFFFFF, TAB_UINT64:0xFFFFFFFFFFFFFFFF}
+## The mapping dictionary from datum type to size string.
+MAX_SIZE_TYPE = {"BOOLEAN":1, TAB_UINT8:1, TAB_UINT16:2, TAB_UINT32:4, TAB_UINT64:8}
+
+TAB_DEPEX = 'Depex'
+TAB_DEPEX_COMMON = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_DEPEX_IA32 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_IA32
+TAB_DEPEX_X64 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_X64
+TAB_DEPEX_ARM = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_ARM
+TAB_DEPEX_EBC = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_EBC
+TAB_DEPEX_AARCH64 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_SKUIDS = 'SkuIds'
+TAB_DEFAULT_STORES = 'DefaultStores'
+TAB_DEFAULT_STORES_DEFAULT = 'STANDARD'
+
+TAB_LIBRARIES = 'Libraries'
+TAB_LIBRARIES_COMMON = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_LIBRARIES_IA32 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_IA32
+TAB_LIBRARIES_X64 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_X64
+TAB_LIBRARIES_ARM = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_ARM
+TAB_LIBRARIES_EBC = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_EBC
+TAB_LIBRARIES_AARCH64 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_COMPONENTS = 'Components'
+TAB_COMPONENTS_COMMON = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_COMMON
+TAB_COMPONENTS_IA32 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_IA32
+TAB_COMPONENTS_X64 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_X64
+TAB_COMPONENTS_ARM = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_ARM
+TAB_COMPONENTS_EBC = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_EBC
+TAB_COMPONENTS_AARCH64 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_AARCH64
+
+TAB_BUILD_OPTIONS = 'BuildOptions'
+
+TAB_DEFINE = 'DEFINE'
+TAB_NMAKE = 'Nmake'
+TAB_USER_EXTENSIONS = 'UserExtensions'
+TAB_INCLUDE = '!include'
+TAB_DEFAULT = 'DEFAULT'
+TAB_COMMON = 'COMMON'
+
+#
+# Common Define
+#
+TAB_COMMON_DEFINES = 'Defines'
+
+#
+# Inf Definitions
+#
+TAB_INF_DEFINES = TAB_COMMON_DEFINES
+TAB_INF_DEFINES_INF_VERSION = 'INF_VERSION'
+TAB_INF_DEFINES_BASE_NAME = 'BASE_NAME'
+TAB_INF_DEFINES_FILE_GUID = 'FILE_GUID'
+TAB_INF_DEFINES_MODULE_TYPE = 'MODULE_TYPE'
+TAB_INF_DEFINES_EFI_SPECIFICATION_VERSION = 'EFI_SPECIFICATION_VERSION'
+TAB_INF_DEFINES_UEFI_SPECIFICATION_VERSION = 'UEFI_SPECIFICATION_VERSION'
+TAB_INF_DEFINES_PI_SPECIFICATION_VERSION = 'PI_SPECIFICATION_VERSION'
+TAB_INF_DEFINES_EDK_RELEASE_VERSION = 'EDK_RELEASE_VERSION'
+TAB_INF_DEFINES_BINARY_MODULE = 'BINARY_MODULE'
+TAB_INF_DEFINES_LIBRARY_CLASS = 'LIBRARY_CLASS'
+TAB_INF_DEFINES_COMPONENT_TYPE = 'COMPONENT_TYPE'
+TAB_INF_DEFINES_MAKEFILE_NAME = 'MAKEFILE_NAME'
+TAB_INF_DEFINES_DPX_SOURCE = 'DPX_SOURCE'
+TAB_INF_DEFINES_BUILD_NUMBER = 'BUILD_NUMBER'
+TAB_INF_DEFINES_BUILD_TYPE = 'BUILD_TYPE'
+TAB_INF_DEFINES_FFS_EXT = 'FFS_EXT'
+TAB_INF_DEFINES_FV_EXT = 'FV_EXT'
+TAB_INF_DEFINES_SOURCE_FV = 'SOURCE_FV'
+TAB_INF_DEFINES_VERSION_NUMBER = 'VERSION_NUMBER'
+TAB_INF_DEFINES_VERSION = 'VERSION'          # for Edk inf, the same as VERSION_NUMBER
+TAB_INF_DEFINES_VERSION_STRING = 'VERSION_STRING'
+TAB_INF_DEFINES_PCD_IS_DRIVER = 'PCD_IS_DRIVER'
+TAB_INF_DEFINES_TIANO_EDK_FLASHMAP_H = 'TIANO_EDK_FLASHMAP_H'
+TAB_INF_DEFINES_ENTRY_POINT = 'ENTRY_POINT'
+TAB_INF_DEFINES_UNLOAD_IMAGE = 'UNLOAD_IMAGE'
+TAB_INF_DEFINES_CONSTRUCTOR = 'CONSTRUCTOR'
+TAB_INF_DEFINES_DESTRUCTOR = 'DESTRUCTOR'
+TAB_INF_DEFINES_DEFINE = 'DEFINE'
+TAB_INF_DEFINES_SPEC = 'SPEC'
+TAB_INF_DEFINES_CUSTOM_MAKEFILE = 'CUSTOM_MAKEFILE'
+TAB_INF_DEFINES_MACRO = '__MACROS__'
+TAB_INF_DEFINES_SHADOW = 'SHADOW'
+TAB_INF_FIXED_PCD = 'FixedPcd'
+TAB_INF_FEATURE_PCD = 'FeaturePcd'
+TAB_INF_PATCH_PCD = 'PatchPcd'
+TAB_INF_PCD = 'Pcd'
+TAB_INF_PCD_EX = 'PcdEx'
+TAB_INF_USAGE_PRO = 'PRODUCES'
+TAB_INF_USAGE_SOME_PRO = 'SOMETIMES_PRODUCES'
+TAB_INF_USAGE_CON = 'CONSUMES'
+TAB_INF_USAGE_SOME_CON = 'SOMETIMES_CONSUMES'
+TAB_INF_USAGE_NOTIFY = 'NOTIFY'
+TAB_INF_USAGE_TO_START = 'TO_START'
+TAB_INF_USAGE_BY_START = 'BY_START'
+TAB_INF_GUIDTYPE_EVENT = 'Event'
+TAB_INF_GUIDTYPE_FILE = 'File'
+TAB_INF_GUIDTYPE_FV = 'FV'
+TAB_INF_GUIDTYPE_GUID = 'GUID'
+TAB_INF_GUIDTYPE_HII = 'HII'
+TAB_INF_GUIDTYPE_HOB = 'HOB'
+TAB_INF_GUIDTYPE_ST = 'SystemTable'
+TAB_INF_GUIDTYPE_TSG = 'TokenSpaceGuid'
+TAB_INF_GUIDTYPE_VAR = 'Variable'
+TAB_INF_GUIDTYPE_PROTOCOL = 'PROTOCOL'
+TAB_INF_GUIDTYPE_PPI = 'PPI'
+TAB_INF_USAGE_UNDEFINED = 'UNDEFINED'
+
+#
+# Dec Definitions
+#
+TAB_DEC_DEFINES = TAB_COMMON_DEFINES
+TAB_DEC_DEFINES_DEC_SPECIFICATION = 'DEC_SPECIFICATION'
+TAB_DEC_DEFINES_PACKAGE_NAME = 'PACKAGE_NAME'
+TAB_DEC_DEFINES_PACKAGE_GUID = 'PACKAGE_GUID'
+TAB_DEC_DEFINES_PACKAGE_VERSION = 'PACKAGE_VERSION'
+TAB_DEC_DEFINES_PKG_UNI_FILE = 'PKG_UNI_FILE'
+
+#
+# Dsc Definitions
+#
+TAB_DSC_DEFINES = TAB_COMMON_DEFINES
+TAB_DSC_DEFINES_PLATFORM_NAME = 'PLATFORM_NAME'
+TAB_DSC_DEFINES_PLATFORM_GUID = 'PLATFORM_GUID'
+TAB_DSC_DEFINES_PLATFORM_VERSION = 'PLATFORM_VERSION'
+TAB_DSC_DEFINES_DSC_SPECIFICATION = 'DSC_SPECIFICATION'
+TAB_DSC_DEFINES_OUTPUT_DIRECTORY = 'OUTPUT_DIRECTORY'
+TAB_DSC_DEFINES_SUPPORTED_ARCHITECTURES = 'SUPPORTED_ARCHITECTURES'
+TAB_DSC_DEFINES_BUILD_TARGETS = 'BUILD_TARGETS'
+TAB_DSC_DEFINES_SKUID_IDENTIFIER = 'SKUID_IDENTIFIER'
+TAB_DSC_DEFINES_PCD_INFO_GENERATION = 'PCD_INFO_GENERATION'
+TAB_DSC_DEFINES_PCD_VAR_CHECK_GENERATION = 'PCD_VAR_CHECK_GENERATION'
+TAB_DSC_DEFINES_FLASH_DEFINITION = 'FLASH_DEFINITION'
+TAB_DSC_DEFINES_BUILD_NUMBER = 'BUILD_NUMBER'
+TAB_DSC_DEFINES_MAKEFILE_NAME = 'MAKEFILE_NAME'
+TAB_DSC_DEFINES_BS_BASE_ADDRESS = 'BsBaseAddress'
+TAB_DSC_DEFINES_RT_BASE_ADDRESS = 'RtBaseAddress'
+TAB_DSC_DEFINES_RFC_LANGUAGES = 'RFC_LANGUAGES'
+TAB_DSC_DEFINES_ISO_LANGUAGES = 'ISO_LANGUAGES'
+TAB_DSC_DEFINES_DEFINE = 'DEFINE'
+TAB_DSC_DEFINES_VPD_TOOL_GUID = 'VPD_TOOL_GUID'
+TAB_FIX_LOAD_TOP_MEMORY_ADDRESS = 'FIX_LOAD_TOP_MEMORY_ADDRESS'
+TAB_DSC_DEFINES_EDKGLOBAL = 'EDK_GLOBAL'
+TAB_DSC_PREBUILD = 'PREBUILD'
+TAB_DSC_POSTBUILD = 'POSTBUILD'
+#
+# TargetTxt Definitions
+#
+TAB_TAT_DEFINES_ACTIVE_PLATFORM = 'ACTIVE_PLATFORM'
+TAB_TAT_DEFINES_ACTIVE_MODULE = 'ACTIVE_MODULE'
+TAB_TAT_DEFINES_TOOL_CHAIN_CONF = 'TOOL_CHAIN_CONF'
+TAB_TAT_DEFINES_MAX_CONCURRENT_THREAD_NUMBER = 'MAX_CONCURRENT_THREAD_NUMBER'
+TAB_TAT_DEFINES_TARGET = 'TARGET'
+TAB_TAT_DEFINES_TOOL_CHAIN_TAG = 'TOOL_CHAIN_TAG'
+TAB_TAT_DEFINES_TARGET_ARCH = 'TARGET_ARCH'
+TAB_TAT_DEFINES_BUILD_RULE_CONF = "BUILD_RULE_CONF"
+
+#
+# ToolDef Definitions
+#
+TAB_TOD_DEFINES_TARGET = 'TARGET'
+TAB_TOD_DEFINES_TOOL_CHAIN_TAG = 'TOOL_CHAIN_TAG'
+TAB_TOD_DEFINES_TARGET_ARCH = 'TARGET_ARCH'
+TAB_TOD_DEFINES_COMMAND_TYPE = 'COMMAND_TYPE'
+TAB_TOD_DEFINES_FAMILY = 'FAMILY'
+TAB_TOD_DEFINES_BUILDRULEFAMILY = 'BUILDRULEFAMILY'
+TAB_TOD_DEFINES_BUILDRULEORDER = 'BUILDRULEORDER'
+
+#
+# Conditional Statements
+#
+TAB_IF = '!if'
+TAB_END_IF = '!endif'
+TAB_ELSE_IF = '!elseif'
+TAB_ELSE = '!else'
+TAB_IF_DEF = '!ifdef'
+TAB_IF_N_DEF = '!ifndef'
+TAB_IF_EXIST = '!if exist'
+TAB_ERROR = '!error'
+
+#
+# Unknown section
+#
+TAB_UNKNOWN = 'UNKNOWN'
+
+#
+# Build database path
+#
+DATABASE_PATH = ":memory:" #"BuildDatabase.db"
+
+# used by ECC
+MODIFIER_SET = {'IN', 'OUT', 'OPTIONAL', 'UNALIGNED', 'EFI_RUNTIMESERVICE', 'EFI_BOOTSERVICE', 'EFIAPI'}
+
+# Dependency Opcodes
+DEPEX_OPCODE_BEFORE = "BEFORE"
+DEPEX_OPCODE_AFTER = "AFTER"
+DEPEX_OPCODE_PUSH = "PUSH"
+DEPEX_OPCODE_AND = "AND"
+DEPEX_OPCODE_OR = "OR"
+DEPEX_OPCODE_NOT = "NOT"
+DEPEX_OPCODE_END = "END"
+DEPEX_OPCODE_SOR = "SOR"
+DEPEX_OPCODE_TRUE = "TRUE"
+DEPEX_OPCODE_FALSE = "FALSE"
+
+# Dependency Expression
+DEPEX_SUPPORTED_OPCODE_SET = {"BEFORE", "AFTER", "PUSH", "AND", "OR", "NOT", "END", "SOR", "TRUE", "FALSE", '(', ')'}
+
+TAB_STATIC_LIBRARY = "STATIC-LIBRARY-FILE"
+TAB_DYNAMIC_LIBRARY = "DYNAMIC-LIBRARY-FILE"
+TAB_FRAMEWORK_IMAGE = "EFI-IMAGE-FILE"
+TAB_C_CODE_FILE = "C-CODE-FILE"
+TAB_C_HEADER_FILE = "C-HEADER-FILE"
+TAB_UNICODE_FILE = "UNICODE-TEXT-FILE"
+TAB_IMAGE_FILE = "IMAGE-DEFINITION-FILE"
+TAB_DEPENDENCY_EXPRESSION_FILE = "DEPENDENCY-EXPRESSION-FILE"
+TAB_UNKNOWN_FILE = "UNKNOWN-TYPE-FILE"
+TAB_DEFAULT_BINARY_FILE = "_BINARY_FILE_"
+TAB_OBJECT_FILE = "OBJECT-FILE"
+TAB_VFR_FILE = 'VISUAL-FORM-REPRESENTATION-FILE'
+
+# used by BRG
+TAB_BRG_PCD = 'PCD'
+TAB_BRG_LIBRARY = 'Library'
+
+#
+# Build Rule File Version Definition
+#
+TAB_BUILD_RULE_VERSION = "build_rule_version"
+
+# section name for PCDs
+PCDS_DYNAMIC_DEFAULT = "PcdsDynamicDefault"
+PCDS_DYNAMIC_VPD = "PcdsDynamicVpd"
+PCDS_DYNAMIC_HII = "PcdsDynamicHii"
+PCDS_DYNAMICEX_DEFAULT = "PcdsDynamicExDefault"
+PCDS_DYNAMICEX_VPD = "PcdsDynamicExVpd"
+PCDS_DYNAMICEX_HII = "PcdsDynamicExHii"
+
+SECTIONS_HAVE_ITEM_PCD_SET = {PCDS_DYNAMIC_DEFAULT.upper(), PCDS_DYNAMIC_VPD.upper(), PCDS_DYNAMIC_HII.upper(), \
+                              PCDS_DYNAMICEX_DEFAULT.upper(), PCDS_DYNAMICEX_VPD.upper(), PCDS_DYNAMICEX_HII.upper()}
+# Section allowed to have items after arch
+SECTIONS_HAVE_ITEM_AFTER_ARCH_SET = {TAB_LIBRARY_CLASSES.upper(), TAB_DEPEX.upper(), TAB_USER_EXTENSIONS.upper(),
+                                 PCDS_DYNAMIC_DEFAULT.upper(),
+                                 PCDS_DYNAMIC_VPD.upper(),
+                                 PCDS_DYNAMIC_HII.upper(),
+                                 PCDS_DYNAMICEX_DEFAULT.upper(),
+                                 PCDS_DYNAMICEX_VPD.upper(),
+                                 PCDS_DYNAMICEX_HII.upper(),
+                                 TAB_BUILD_OPTIONS.upper(),
+                                 TAB_INCLUDES.upper()}
+
+#
+# pack codes as used in PcdDb and elsewhere
+#
+PACK_PATTERN_GUID = '=LHHBBBBBBBB'
+PACK_CODE_BY_SIZE = {8:'=Q',
+                     4:'=L',
+                     2:'=H',
+                     1:'=B',
+                     0:'=B',
+                    16:""}
+
+TAB_COMPILER_MSFT = 'MSFT'
-- 
2.7.4