From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=0163abfc0e=abner.chang@hpe.com) Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by groups.io with SMTP; Mon, 16 Sep 2019 23:54:57 -0700 Received: from pps.filterd (m0150241.ppops.net [127.0.0.1]) by mx0a-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x8H6pRCo018716; Tue, 17 Sep 2019 06:54:56 GMT Received: from g4t3426.houston.hpe.com (g4t3426.houston.hpe.com [15.241.140.75]) by mx0a-002e3701.pphosted.com with ESMTP id 2v2c13j22k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Sep 2019 06:54:56 +0000 Received: from g4t3433.houston.hpecorp.net (g4t3433.houston.hpecorp.net [16.208.49.245]) by g4t3426.houston.hpe.com (Postfix) with ESMTP id E73AE61; Tue, 17 Sep 2019 06:54:55 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.44]) by g4t3433.houston.hpecorp.net (Postfix) with ESMTP id E2ECC45; Tue, 17 Sep 2019 06:54:53 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Michael D Kinney , Liming Gao , Leif Lindholm , Gilbert Chen Subject: [PATCH] MdePkg:Include: Update SmBios header file Date: Tue, 17 Sep 2019 14:24:30 +0800 Message-Id: <1568701470-19480-1-git-send-email-abner.chang@hpe.com> X-Mailer: git-send-email 2.7.4 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.70,1.0.8 definitions=2019-09-17_04:2019-09-11,2019-09-17 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 mlxscore=0 suspectscore=1 bulkscore=0 impostorscore=0 spamscore=0 mlxlogscore=999 clxscore=1011 priorityscore=1501 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1908290000 definitions=main-1909170075 Update SmBios header file to conform with SMBIOS v3.3.0. The major update is to add definitions of SMBIOS Type 44h record. Signed-off-by: Abner Chang Cc: Michael D Kinney Cc: Liming Gao Cc: Leif Lindholm Cc: Gilbert Chen --- MdePkg/Include/IndustryStandard/SmBios.h | 74 +++++++++++++++++++++++++++++++- 1 file changed, 72 insertions(+), 2 deletions(-) diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h index f3b6f18..ebf0ceb 100644 --- a/MdePkg/Include/IndustryStandard/SmBios.h +++ b/MdePkg/Include/IndustryStandard/SmBios.h @@ -3,6 +3,7 @@ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
+(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -46,7 +47,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF // -// SMBIOS type macros which is according to SMBIOS 2.7 specification. +// SMBIOS type macros which is according to SMBIOS 3.3.0 specification. // #define SMBIOS_TYPE_BIOS_INFORMATION 0 #define SMBIOS_TYPE_SYSTEM_INFORMATION 1 @@ -92,6 +93,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41 #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42 #define SMBIOS_TYPE_TPM_DEVICE 43 +#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44 /// /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43. @@ -727,7 +729,10 @@ typedef enum { ProcessorFamilyMII = 0x012E, ProcessorFamilyWinChip = 0x0140, ProcessorFamilyDSP = 0x015E, - ProcessorFamilyVideoProcessor = 0x01F4 + ProcessorFamilyVideoProcessor = 0x01F4, + ProcessorFamilyRiscvRV32 = 0x0200, ///< SMBIOS spec 3.3.0 added + ProcessorFamilyRiscVRV64 = 0x0201, ///< SMBIOS spec 3.3.0 added + ProcessorFamilyRiscVRV128 = 0x0202 ///< SMBIOS spec 3.3.0 added } PROCESSOR_FAMILY2_DATA; /// @@ -857,6 +862,19 @@ typedef struct { } PROCESSOR_FEATURE_FLAGS; typedef struct { + UINT32 ProcessorReserved1 :1; + UINT32 ProcessorUnknown :1; + UINT32 Processor64BitCapble :1; + UINT32 ProcessorMultiCore :1; + UINT32 ProcessorHardwareThread :1; + UINT32 ProcessorExecuteProtection :1; + UINT32 ProcessorEnhancedVirtulization :1; + UINT32 ProcessorPowerPerformanceCtrl :1; + UINT32 Processor128bitCapble :1; + UINT32 ProcessorReserved2 :7; +} PROCESSOR_CHARACTERISTIC_FLAGS; + +typedef struct { PROCESSOR_SIGNATURE Signature; PROCESSOR_FEATURE_FLAGS FeatureFlags; } PROCESSOR_ID_DATA; @@ -2508,6 +2526,57 @@ typedef struct { UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes } SMBIOS_TABLE_TYPE42; + +/// +/// Processor Specific Block - Processor Architecture Type +/// +typedef enum{ + ProcessorSpecificBlockArchTypeReserved = 0x00, + ProcessorSpecificBlockArchTypeIa32 = 0x01, + ProcessorSpecificBlockArchTypeX64 = 0x02, + ProcessorSpecificBlockArchTypeItanium = 0x03, + ProcessorSpecificBlockArchTypeAarch32 = 0x04, + ProcessorSpecificBlockArchTypeAarch64 = 0x05, + ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06, + ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07, + ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08 +} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE; + +/// +/// Processor Specific Block is the standard container of processor-specific data. +/// +typedef struct { + UINT8 Length; + UINT8 ProcessorArchType; + /// + /// Below followed by Processor-specific data + /// + /// +} PROCESSOR_SPECIFIC_BLOCK; + +/// +/// Processor Additional Information(Type 44). +/// +/// The information in this structure defines the processor additional information in case +/// SMBIOS type 4 is not sufficient to describe processor characteristics. +/// The SMBIOS type 44 structure has a reference handle field to link back to the related +/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the +/// same SMBIOS type 4 structure. For example, when cores are not identical in a processor, +/// SMBIOS type 44 structures describe different core-specific information. +/// +/// SMBIOS type 44 defines the standard header for the processor-specific block, while the +/// contents of processor-specific data are maintained by processor +/// architecture workgroups or vendors in separate documents. +/// +typedef struct { + SMBIOS_STRUCTURE Hdr; + SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4 + /// + /// Below followed by Processor-specific block + /// + PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock; +} SMBIOS_TABLE_TYPE44; + /// /// TPM Device (Type 43). /// @@ -2586,6 +2655,7 @@ typedef union { SMBIOS_TABLE_TYPE41 *Type41; SMBIOS_TABLE_TYPE42 *Type42; SMBIOS_TABLE_TYPE43 *Type43; + SMBIOS_TABLE_TYPE44 *Type44; SMBIOS_TABLE_TYPE126 *Type126; SMBIOS_TABLE_TYPE127 *Type127; UINT8 *Raw; -- 2.7.4