From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.143.35, mailfrom: prvs=01695bccdc=abner.chang@hpe.com) Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by groups.io with SMTP; Sun, 22 Sep 2019 18:02:59 -0700 Received: from pps.filterd (m0148664.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x8N115aY006863 for ; Mon, 23 Sep 2019 01:02:59 GMT Received: from g4t3427.houston.hpe.com (g4t3427.houston.hpe.com [15.241.140.73]) by mx0b-002e3701.pphosted.com with ESMTP id 2v5emfmb6u-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 23 Sep 2019 01:02:58 +0000 Received: from g4t3433.houston.hpecorp.net (g4t3433.houston.hpecorp.net [16.208.49.245]) by g4t3427.houston.hpe.com (Postfix) with ESMTP id 7720B57 for ; Mon, 23 Sep 2019 01:02:58 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.44]) by g4t3433.houston.hpecorp.net (Postfix) with ESMTP id 8F5C149; Mon, 23 Sep 2019 01:02:57 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com Subject: [edk2-staging/RISC-V-V2 PATCH v2 19/29] RiscVPkg/Library: RISC-V platform level DxeIPL libraries. Date: Mon, 23 Sep 2019 08:31:45 +0800 Message-Id: <1569198715-31552-21-git-send-email-abner.chang@hpe.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1569198715-31552-1-git-send-email-abner.chang@hpe.com> References: <1569198715-31552-1-git-send-email-abner.chang@hpe.com> X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.70,1.0.8 definitions=2019-09-22_09:2019-09-20,2019-09-22 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=1 malwarescore=0 bulkscore=0 phishscore=0 adultscore=0 priorityscore=1501 mlxscore=0 mlxlogscore=999 spamscore=0 clxscore=1015 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1908290000 definitions=main-1909230006 RiscVDxeIplHandoffLib.inf: Simply use stack switch to hand off to DXE phase. RiscVDxeIplHandoffOpenSbiLib.inf: Hand off to DXE phase using OpenSBI interface. Signed-off-by: Abner Chang --- .../RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.c | 41 +++++++++ .../RiscVDxeIplHandoffLib.inf | 32 +++++++ .../RiscVDxeIplHandoffOpenSbiLib.c | 102 +++++++++++++++++++++ .../RiscVDxeIplHandoffOpenSbiLib.inf | 33 +++++++ 4 files changed, 208 insertions(+) create mode 100644 RiscVPkg/Library/RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.c create mode 100644 RiscVPkg/Library/RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.inf create mode 100644 RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.c create mode 100644 RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.inf diff --git a/RiscVPkg/Library/RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.c b/RiscVPkg/Library/RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.c new file mode 100644 index 0000000..211b4e8 --- /dev/null +++ b/RiscVPkg/Library/RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.c @@ -0,0 +1,41 @@ +/** @file + RISC-V platform level DXE core hand off library + + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +/** + RISC-V platform DXE IPL to DXE core handoff process. + + This function performs a CPU architecture specific operations to execute + the entry point of DxeCore with the parameters of HobList. + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase. + + @param BaseOfStack Base address of stack + @param TopOfStack Top address of stack + @param DxeCoreEntryPoint The entry point of DxeCore. + @param HobList The start of HobList passed to DxeCore. + +**/ + +VOID +RiscVPlatformHandOffToDxeCore ( + IN VOID *BaseOfStack, + IN VOID *TopOfStack, + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint, + IN EFI_PEI_HOB_POINTERS HobList + ) +{ + + // + // Transfer the control to the entry point of DxeCore. + // + SwitchStack ( + (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint, + HobList.Raw, + NULL, + TopOfStack + ); +} diff --git a/RiscVPkg/Library/RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.inf b/RiscVPkg/Library/RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.inf new file mode 100644 index 0000000..986db1d --- /dev/null +++ b/RiscVPkg/Library/RiscVDxeIplHandoffLib/RiscVDxeIplHandoffLib.inf @@ -0,0 +1,32 @@ +## @file +# Instance of RISC-V DXE IPL to DXE core handoff platform library +# +# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +[Defines] + INF_VERSION = 0x0001001b + BASE_NAME = RiscVPlatformDxeIplLib + FILE_GUID = 2A77EE71-9F55-43F9-8773-7854A5B56086 + MODULE_TYPE = PEIM + VERSION_STRING = 1.0 + LIBRARY_CLASS = RiscVPlatformDxeIplLib|PEIM PEI_CORE + +# +# VALID_ARCHITECTURES = RISCV64 +# + +[Sources] + RiscVDxeIplHandoffLib.c + +[Packages] + MdePkg/MdePkg.dec + RiscVPkg/RiscVPkg.dec + +[LibraryClasses] + DebugLib + RiscVCpuLib + RiscVOpensbiLib + diff --git a/RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.c b/RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.c new file mode 100644 index 0000000..c640fd2 --- /dev/null +++ b/RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.c @@ -0,0 +1,102 @@ +/** @file + RISC-V DXE IPL to DXE core handoff platform library using OpenSBI + + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +/** + RISC-V platform DXE IPL to DXE OpenSBI mdoe switch handler. + This function is executed in RISC-V Supervisor mode. + + This function performs a CPU architecture specific operations to execute + the entry point of DxeCore with the parameters of HobList. + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase. + + @param BaseOfStack Base address of stack + @param TopOfStack Top address of stack + @param DxeCoreEntryPoint The entry point of DxeCore. + @param HobList The start of HobList passed to DxeCore. + +**/ +VOID +RiscVDxeIplHandoffOpenSbiHandler ( + IN UINTN HardId, + IN OPENSBI_SWITCH_MODE_CONTEXT *ThisSwitchContext + ) +{ + DEBUG ((DEBUG_INFO, "[OpenSBI]: OpenSBI mode switch DXE IPL Handoff handler entry\n")); + + SwitchStack ( + (SWITCH_STACK_ENTRY_POINT)(UINTN)ThisSwitchContext->DxeCoreEntryPoint, + ThisSwitchContext->HobList.Raw, + NULL, + ThisSwitchContext->TopOfStack + ); + + // + // Shold never came back. + // + __builtin_unreachable(); +} + + +/** + RISC-V platform DXE IPL to DXE core handoff process. + + This function performs a CPU architecture specific operations to execute + the entry point of DxeCore with the parameters of HobList. + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase. + + @param BaseOfStack Base address of stack + @param TopOfStack Top address of stack + @param DxeCoreEntryPoint The entry point of DxeCore. + @param HobList The start of HobList passed to DxeCore. + +**/ +VOID +RiscVPlatformHandOffToDxeCore ( + IN VOID *BaseOfStack, + IN VOID *TopOfStack, + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint, + IN EFI_PEI_HOB_POINTERS HobList + ) +{ + struct sbi_scratch *ThisScratch; + OPENSBI_SWITCH_MODE_CONTEXT OpenSbiSwitchModeContext; + + DEBUG ((DEBUG_INFO, "[OpenSBI]: DXE IPL to DXE Core using OpenSBI\n")); + // + // Setup next address in OpenSBI scratch + // + OpenSbiSwitchModeContext.BaseOfStack = BaseOfStack; + OpenSbiSwitchModeContext.TopOfStack = TopOfStack; + OpenSbiSwitchModeContext.HobList = HobList; + OpenSbiSwitchModeContext.DxeCoreEntryPoint = DxeCoreEntryPoint; + ThisScratch = sbi_scratch_thishart_ptr (); + ThisScratch->next_arg1 = (unsigned long)(UINTN)&OpenSbiSwitchModeContext; + ThisScratch->next_addr = (unsigned long)(UINTN)RiscVDxeIplHandoffOpenSbiHandler; + ThisScratch->next_mode = PRV_S; + + DEBUG ((DEBUG_INFO, " Base address of satck: 0x%x\n", BaseOfStack)); + DEBUG ((DEBUG_INFO, " Top address of satck: 0x%x\n", TopOfStack)); + DEBUG ((DEBUG_INFO, " HOB list address: 0x%x\n", &HobList)); + DEBUG ((DEBUG_INFO, " DXE core entry pointer: 0x%x\n", DxeCoreEntryPoint)); + DEBUG ((DEBUG_INFO, " OpenSBI Switch mode arg1: 0x%x\n", (UINTN)&OpenSbiSwitchModeContext)); + DEBUG ((DEBUG_INFO, " OpenSBI Switch mode handler address: 0x%x\n", (UINTN)RiscVDxeIplHandoffOpenSbiHandler)); + DEBUG ((DEBUG_INFO, " OpenSBI Switch mode to privilege 0x%x\n", PRV_S)); + sbi_init (ThisScratch); +} diff --git a/RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.inf b/RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.inf new file mode 100644 index 0000000..262071d --- /dev/null +++ b/RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.inf @@ -0,0 +1,33 @@ +## @file +# Instance of RISC-V DXE IPL to DXE core handoff platform library using OpenSBI +# +# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x0001001b + BASE_NAME = RiscVPlatformDxeIplLib + FILE_GUID = 906A4BB9-8DE2-4CE0-A609-23818A8FF514 + MODULE_TYPE = PEIM + VERSION_STRING = 1.0 + LIBRARY_CLASS = RiscVPlatformDxeIplLib|PEIM PEI_CORE + +# +# VALID_ARCHITECTURES = RISCV64 +# + +[Sources] + RiscVDxeIplHandoffOpenSbiLib.c + +[Packages] + MdePkg/MdePkg.dec + RiscVPkg/RiscVPkg.dec + +[LibraryClasses] + DebugLib + RiscVCpuLib + RiscVOpensbiLib + -- 2.7.4