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From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com,
	Michael D Kinney <michael.d.kinney@intel.com>,
	Liming Gao <liming.gao@intel.com>,
	Leif Lindholm <leif.lindholm@linaro.org>,
	Gilbert Chen <gilbert.chen@hpe.com>
Subject: [edk2-staging/RISC-V-V2 PATCH v3 09/39] MdePkg/BaseIoLibIntrinsic: RISC-V I/O intrinsic functions.
Date: Mon, 28 Oct 2019 09:58:47 +0800	[thread overview]
Message-ID: <1572227957-13169-10-git-send-email-abner.chang@hpe.com> (raw)
In-Reply-To: <1572227957-13169-1-git-send-email-abner.chang@hpe.com>

RISC-V MMIO library instance.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
---
 .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf      |  12 +-
 MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c       | 593 ---------------------
 MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c      | 593 +++++++++++++++++++++
 3 files changed, 601 insertions(+), 597 deletions(-)
 delete mode 100644 MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
 create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
index 457cce9..db349c2 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -4,11 +4,12 @@
 #  I/O Library that uses compiler intrinsics to perform IN and OUT instructions
 #  for IA-32 and x64.  On IPF, I/O port requests are translated into MMIO requests.
 #  MMIO requests are forwarded directly to memory.  For EBC, I/O port requests
-#  ASSERT().
+#  ASSERT(). For ARM and RISC-V, I/O library only provides non I/O read and write.
 #
 #  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+#  Portinos Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -25,7 +26,7 @@
 
 
 #
-#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64
+#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64 RISCV64
 #
 
 [Sources]
@@ -50,10 +51,13 @@
   IoLib.c
 
 [Sources.ARM]
-  IoLibArm.c
+  IoLibNoIo.c
 
 [Sources.AARCH64]
-  IoLibArm.c
+  IoLibNoIo.c
+
+[Sources.RISCV64]
+  IoLibNoIo.c
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
deleted file mode 100644
index c6b8224..0000000
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
+++ /dev/null
@@ -1,593 +0,0 @@
-/** @file
-  I/O Library for ARM.
-
-  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-
-//
-// Include common header file for this module.
-//
-#include "BaseIoLibIntrinsicInternal.h"
-
-/**
-  Reads an 8-bit I/O port.
-
-  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
-  This function must guarantee that all I/O read and write operations are
-  serialized.
-
-  If 8-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port  The I/O port to read.
-
-  @return The value read.
-
-**/
-UINT8
-EFIAPI
-IoRead8 (
-  IN      UINTN                     Port
-  )
-{
-  ASSERT (FALSE);
-  return 0;
-}
-
-/**
-  Writes an 8-bit I/O port.
-
-  Writes the 8-bit I/O port specified by Port with the value specified by Value
-  and returns Value. This function must guarantee that all I/O read and write
-  operations are serialized.
-
-  If 8-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port  The I/O port to write.
-  @param  Value The value to write to the I/O port.
-
-  @return The value written the I/O port.
-
-**/
-UINT8
-EFIAPI
-IoWrite8 (
-  IN      UINTN                     Port,
-  IN      UINT8                     Value
-  )
-{
-  ASSERT (FALSE);
-  return Value;
-}
-
-/**
-  Reads a 16-bit I/O port.
-
-  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
-  This function must guarantee that all I/O read and write operations are
-  serialized.
-
-  If 16-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port  The I/O port to read.
-
-  @return The value read.
-
-**/
-UINT16
-EFIAPI
-IoRead16 (
-  IN      UINTN                     Port
-  )
-{
-  ASSERT (FALSE);
-  return 0;
-}
-
-/**
-  Writes a 16-bit I/O port.
-
-  Writes the 16-bit I/O port specified by Port with the value specified by Value
-  and returns Value. This function must guarantee that all I/O read and write
-  operations are serialized.
-
-  If 16-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port  The I/O port to write.
-  @param  Value The value to write to the I/O port.
-
-  @return The value written the I/O port.
-
-**/
-UINT16
-EFIAPI
-IoWrite16 (
-  IN      UINTN                     Port,
-  IN      UINT16                    Value
-  )
-{
-  ASSERT (FALSE);
-  return Value;
-}
-
-/**
-  Reads a 32-bit I/O port.
-
-  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
-  This function must guarantee that all I/O read and write operations are
-  serialized.
-
-  If 32-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port  The I/O port to read.
-
-  @return The value read.
-
-**/
-UINT32
-EFIAPI
-IoRead32 (
-  IN      UINTN                     Port
-  )
-{
-  ASSERT (FALSE);
-  return 0;
-}
-
-/**
-  Writes a 32-bit I/O port.
-
-  Writes the 32-bit I/O port specified by Port with the value specified by Value
-  and returns Value. This function must guarantee that all I/O read and write
-  operations are serialized.
-
-  If 32-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port  The I/O port to write.
-  @param  Value The value to write to the I/O port.
-
-  @return The value written the I/O port.
-
-**/
-UINT32
-EFIAPI
-IoWrite32 (
-  IN      UINTN                     Port,
-  IN      UINT32                    Value
-  )
-{
-  ASSERT (FALSE);
-  return Value;
-}
-
-/**
-  Reads a 64-bit I/O port.
-
-  Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
-  This function must guarantee that all I/O read and write operations are
-  serialized.
-
-  If 64-bit I/O port operations are not supported, then ASSERT().
-  If Port is not aligned on a 64-bit boundary, then ASSERT().
-
-  @param  Port  The I/O port to read.
-
-  @return The value read.
-
-**/
-UINT64
-EFIAPI
-IoRead64 (
-  IN      UINTN                     Port
-  )
-{
-  ASSERT (FALSE);
-  return 0;
-}
-
-/**
-  Writes a 64-bit I/O port.
-
-  Writes the 64-bit I/O port specified by Port with the value specified by Value
-  and returns Value. This function must guarantee that all I/O read and write
-  operations are serialized.
-
-  If 64-bit I/O port operations are not supported, then ASSERT().
-  If Port is not aligned on a 64-bit boundary, then ASSERT().
-
-  @param  Port  The I/O port to write.
-  @param  Value The value to write to the I/O port.
-
-  @return The value written to the I/O port.
-
-**/
-UINT64
-EFIAPI
-IoWrite64 (
-  IN      UINTN                     Port,
-  IN      UINT64                    Value
-  )
-{
-  ASSERT (FALSE);
-  return 0;
-}
-
-/**
-  Reads an 8-bit I/O port fifo into a block of memory.
-
-  Reads the 8-bit I/O fifo port specified by Port.
-  The port is read Count times, and the read data is
-  stored in the provided Buffer.
-
-  This function must guarantee that all I/O read and write operations are
-  serialized.
-
-  If 8-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port    The I/O port to read.
-  @param  Count   The number of times to read I/O port.
-  @param  Buffer  The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo8 (
-  IN      UINTN                     Port,
-  IN      UINTN                     Count,
-  OUT     VOID                      *Buffer
-  )
-{
-  ASSERT (FALSE);
-}
-
-/**
-  Writes a block of memory into an 8-bit I/O port fifo.
-
-  Writes the 8-bit I/O fifo port specified by Port.
-  The port is written Count times, and the write data is
-  retrieved from the provided Buffer.
-
-  This function must guarantee that all I/O write and write operations are
-  serialized.
-
-  If 8-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port    The I/O port to write.
-  @param  Count   The number of times to write I/O port.
-  @param  Buffer  The buffer to retrieve the write data from.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo8 (
-  IN      UINTN                     Port,
-  IN      UINTN                     Count,
-  IN      VOID                      *Buffer
-  )
-{
-  ASSERT (FALSE);
-}
-
-/**
-  Reads a 16-bit I/O port fifo into a block of memory.
-
-  Reads the 16-bit I/O fifo port specified by Port.
-  The port is read Count times, and the read data is
-  stored in the provided Buffer.
-
-  This function must guarantee that all I/O read and write operations are
-  serialized.
-
-  If 16-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port    The I/O port to read.
-  @param  Count   The number of times to read I/O port.
-  @param  Buffer  The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo16 (
-  IN      UINTN                     Port,
-  IN      UINTN                     Count,
-  OUT     VOID                      *Buffer
-  )
-{
-  ASSERT (FALSE);
-}
-
-/**
-  Writes a block of memory into a 16-bit I/O port fifo.
-
-  Writes the 16-bit I/O fifo port specified by Port.
-  The port is written Count times, and the write data is
-  retrieved from the provided Buffer.
-
-  This function must guarantee that all I/O write and write operations are
-  serialized.
-
-  If 16-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port    The I/O port to write.
-  @param  Count   The number of times to write I/O port.
-  @param  Buffer  The buffer to retrieve the write data from.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo16 (
-  IN      UINTN                     Port,
-  IN      UINTN                     Count,
-  IN      VOID                      *Buffer
-  )
-{
-  ASSERT (FALSE);
-}
-
-/**
-  Reads a 32-bit I/O port fifo into a block of memory.
-
-  Reads the 32-bit I/O fifo port specified by Port.
-  The port is read Count times, and the read data is
-  stored in the provided Buffer.
-
-  This function must guarantee that all I/O read and write operations are
-  serialized.
-
-  If 32-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port    The I/O port to read.
-  @param  Count   The number of times to read I/O port.
-  @param  Buffer  The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo32 (
-  IN      UINTN                     Port,
-  IN      UINTN                     Count,
-  OUT     VOID                      *Buffer
-  )
-{
-  ASSERT (FALSE);
-}
-
-/**
-  Writes a block of memory into a 32-bit I/O port fifo.
-
-  Writes the 32-bit I/O fifo port specified by Port.
-  The port is written Count times, and the write data is
-  retrieved from the provided Buffer.
-
-  This function must guarantee that all I/O write and write operations are
-  serialized.
-
-  If 32-bit I/O port operations are not supported, then ASSERT().
-
-  @param  Port    The I/O port to write.
-  @param  Count   The number of times to write I/O port.
-  @param  Buffer  The buffer to retrieve the write data from.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo32 (
-  IN      UINTN                     Port,
-  IN      UINTN                     Count,
-  IN      VOID                      *Buffer
-  )
-{
-  ASSERT (FALSE);
-}
-
-/**
-  Reads an 8-bit MMIO register.
-
-  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
-  returned. This function must guarantee that all MMIO read and write
-  operations are serialized.
-
-  If 8-bit MMIO register operations are not supported, then ASSERT().
-
-  @param  Address The MMIO register to read.
-
-  @return The value read.
-
-**/
-UINT8
-EFIAPI
-MmioRead8 (
-  IN      UINTN                     Address
-  )
-{
-  UINT8                             Value;
-
-  Value = *(volatile UINT8*)Address;
-  return Value;
-}
-
-/**
-  Writes an 8-bit MMIO register.
-
-  Writes the 8-bit MMIO register specified by Address with the value specified
-  by Value and returns Value. This function must guarantee that all MMIO read
-  and write operations are serialized.
-
-  If 8-bit MMIO register operations are not supported, then ASSERT().
-
-  @param  Address The MMIO register to write.
-  @param  Value   The value to write to the MMIO register.
-
-**/
-UINT8
-EFIAPI
-MmioWrite8 (
-  IN      UINTN                     Address,
-  IN      UINT8                     Value
-  )
-{
-  *(volatile UINT8*)Address = Value;
-  return Value;
-}
-
-/**
-  Reads a 16-bit MMIO register.
-
-  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
-  returned. This function must guarantee that all MMIO read and write
-  operations are serialized.
-
-  If 16-bit MMIO register operations are not supported, then ASSERT().
-
-  @param  Address The MMIO register to read.
-
-  @return The value read.
-
-**/
-UINT16
-EFIAPI
-MmioRead16 (
-  IN      UINTN                     Address
-  )
-{
-  UINT16                            Value;
-
-  ASSERT ((Address & 1) == 0);
-  Value = *(volatile UINT16*)Address;
-  return Value;
-}
-
-/**
-  Writes a 16-bit MMIO register.
-
-  Writes the 16-bit MMIO register specified by Address with the value specified
-  by Value and returns Value. This function must guarantee that all MMIO read
-  and write operations are serialized.
-
-  If 16-bit MMIO register operations are not supported, then ASSERT().
-
-  @param  Address The MMIO register to write.
-  @param  Value   The value to write to the MMIO register.
-
-**/
-UINT16
-EFIAPI
-MmioWrite16 (
-  IN      UINTN                     Address,
-  IN      UINT16                    Value
-  )
-{
-  ASSERT ((Address & 1) == 0);
-  *(volatile UINT16*)Address = Value;
-  return Value;
-}
-
-/**
-  Reads a 32-bit MMIO register.
-
-  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
-  returned. This function must guarantee that all MMIO read and write
-  operations are serialized.
-
-  If 32-bit MMIO register operations are not supported, then ASSERT().
-
-  @param  Address The MMIO register to read.
-
-  @return The value read.
-
-**/
-UINT32
-EFIAPI
-MmioRead32 (
-  IN      UINTN                     Address
-  )
-{
-  UINT32                            Value;
-
-  ASSERT ((Address & 3) == 0);
-  Value = *(volatile UINT32*)Address;
-  return Value;
-}
-
-/**
-  Writes a 32-bit MMIO register.
-
-  Writes the 32-bit MMIO register specified by Address with the value specified
-  by Value and returns Value. This function must guarantee that all MMIO read
-  and write operations are serialized.
-
-  If 32-bit MMIO register operations are not supported, then ASSERT().
-
-  @param  Address The MMIO register to write.
-  @param  Value   The value to write to the MMIO register.
-
-**/
-UINT32
-EFIAPI
-MmioWrite32 (
-  IN      UINTN                     Address,
-  IN      UINT32                    Value
-  )
-{
-  ASSERT ((Address & 3) == 0);
-  *(volatile UINT32*)Address = Value;
-  return Value;
-}
-
-/**
-  Reads a 64-bit MMIO register.
-
-  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
-  returned. This function must guarantee that all MMIO read and write
-  operations are serialized.
-
-  If 64-bit MMIO register operations are not supported, then ASSERT().
-
-  @param  Address The MMIO register to read.
-
-  @return The value read.
-
-**/
-UINT64
-EFIAPI
-MmioRead64 (
-  IN      UINTN                     Address
-  )
-{
-  UINT64                            Value;
-
-  ASSERT ((Address & 7) == 0);
-  Value = *(volatile UINT64*)Address;
-  return Value;
-}
-
-/**
-  Writes a 64-bit MMIO register.
-
-  Writes the 64-bit MMIO register specified by Address with the value specified
-  by Value and returns Value. This function must guarantee that all MMIO read
-  and write operations are serialized.
-
-  If 64-bit MMIO register operations are not supported, then ASSERT().
-
-  @param  Address The MMIO register to write.
-  @param  Value   The value to write to the MMIO register.
-
-**/
-UINT64
-EFIAPI
-MmioWrite64 (
-  IN      UINTN                     Address,
-  IN      UINT64                    Value
-  )
-{
-  ASSERT ((Address & 7) == 0);
-  *(volatile UINT64*)Address = Value;
-  return Value;
-}
-
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
new file mode 100644
index 0000000..c6b8224
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
@@ -0,0 +1,593 @@
+/** @file
+  I/O Library for ARM.
+
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+//
+// Include common header file for this module.
+//
+#include "BaseIoLibIntrinsicInternal.h"
+
+/**
+  Reads an 8-bit I/O port.
+
+  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes an 8-bit I/O port.
+
+  Writes the 8-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+  IN      UINTN                     Port,
+  IN      UINT8                     Value
+  )
+{
+  ASSERT (FALSE);
+  return Value;
+}
+
+/**
+  Reads a 16-bit I/O port.
+
+  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 16-bit I/O port.
+
+  Writes the 16-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+  IN      UINTN                     Port,
+  IN      UINT16                    Value
+  )
+{
+  ASSERT (FALSE);
+  return Value;
+}
+
+/**
+  Reads a 32-bit I/O port.
+
+  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 32-bit I/O port.
+
+  Writes the 32-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+  IN      UINTN                     Port,
+  IN      UINT32                    Value
+  )
+{
+  ASSERT (FALSE);
+  return Value;
+}
+
+/**
+  Reads a 64-bit I/O port.
+
+  Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 64-bit I/O port.
+
+  Writes the 64-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+  IN      UINTN                     Port,
+  IN      UINT64                    Value
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Reads an 8-bit I/O port fifo into a block of memory.
+
+  Reads the 8-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into an 8-bit I/O port fifo.
+
+  Writes the 8-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads a 16-bit I/O port fifo into a block of memory.
+
+  Reads the 16-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into a 16-bit I/O port fifo.
+
+  Writes the 16-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads a 32-bit I/O port fifo into a block of memory.
+
+  Reads the 32-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into a 32-bit I/O port fifo.
+
+  Writes the 32-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads an 8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+  IN      UINTN                     Address
+  )
+{
+  UINT8                             Value;
+
+  Value = *(volatile UINT8*)Address;
+  return Value;
+}
+
+/**
+  Writes an 8-bit MMIO register.
+
+  Writes the 8-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+  IN      UINTN                     Address,
+  IN      UINT8                     Value
+  )
+{
+  *(volatile UINT8*)Address = Value;
+  return Value;
+}
+
+/**
+  Reads a 16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+  IN      UINTN                     Address
+  )
+{
+  UINT16                            Value;
+
+  ASSERT ((Address & 1) == 0);
+  Value = *(volatile UINT16*)Address;
+  return Value;
+}
+
+/**
+  Writes a 16-bit MMIO register.
+
+  Writes the 16-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+  IN      UINTN                     Address,
+  IN      UINT16                    Value
+  )
+{
+  ASSERT ((Address & 1) == 0);
+  *(volatile UINT16*)Address = Value;
+  return Value;
+}
+
+/**
+  Reads a 32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+  IN      UINTN                     Address
+  )
+{
+  UINT32                            Value;
+
+  ASSERT ((Address & 3) == 0);
+  Value = *(volatile UINT32*)Address;
+  return Value;
+}
+
+/**
+  Writes a 32-bit MMIO register.
+
+  Writes the 32-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    Value
+  )
+{
+  ASSERT ((Address & 3) == 0);
+  *(volatile UINT32*)Address = Value;
+  return Value;
+}
+
+/**
+  Reads a 64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+  IN      UINTN                     Address
+  )
+{
+  UINT64                            Value;
+
+  ASSERT ((Address & 7) == 0);
+  Value = *(volatile UINT64*)Address;
+  return Value;
+}
+
+/**
+  Writes a 64-bit MMIO register.
+
+  Writes the 64-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+  IN      UINTN                     Address,
+  IN      UINT64                    Value
+  )
+{
+  ASSERT ((Address & 7) == 0);
+  *(volatile UINT64*)Address = Value;
+  return Value;
+}
+
-- 
2.7.4


  parent reply	other threads:[~2019-10-28  2:31 UTC|newest]

Thread overview: 77+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-28  1:58 [edk2-staging/RISC-V-V2 PATCH v3 00/39] RISC-V EDK2 Port on Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 01/39] RiscVPkg: RISC-V processor package Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 02/39] RiscVPkg/Include: Add header files of RISC-V CPU package Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 03/39] RiscVPkg/opensbi: EDK2 RISC-V OpenSBI support Abner Chang
2019-11-21 16:24   ` Leif Lindholm
2019-12-19  4:09     ` [edk2-devel] " Abner Chang
2019-12-19 13:21       ` Leif Lindholm
2019-12-19 14:48         ` Abner Chang
     [not found]         ` <15E1CD20DD2FE7F1.29030@groups.io>
2019-12-20  3:04           ` Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 04/39] MdePkg: RISC-V RV64 binding in MdePkg Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 05/39] MdePkg/Include: RISC-V definitions Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 06/39] MdeModulePkg/CapsuleRuntimeDxe: Add RISCV64 arch Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 07/39] MdePkg/BaseLib: BaseLib for RISC-V RV64 Processor Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 08/39] MdePkg/BaseCacheMaintenanceLib: RISC-V cache maintenance implementation Abner Chang
2019-10-28  1:58 ` Abner Chang [this message]
2019-11-21 16:36   ` [edk2-staging/RISC-V-V2 PATCH v3 09/39] MdePkg/BaseIoLibIntrinsic: RISC-V I/O intrinsic functions Leif Lindholm
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 10/39] MdePkg/BasePeCoff: Add RISC-V PE/Coff related code Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 11/39] MdePkg/BaseCpuLib: RISC-V Base CPU library implementation Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 12/39] MdePkg/BaseSynchronizationLib: RISC-V cache related code Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 13/39] MdeModulePkg/Logo Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 14/39] NetworkPkg Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 15/39] RiscVPkg/Library: RISC-V CPU library Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 16/39] RiscVPkg/Library: Add RISC-V exception library Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 17/39] RiscVPkg/Library: Add RISC-V timer library Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 18/39] RiscVPkg/Library: Add EDK2 RISC-V OpenSBI library Abner Chang
2019-11-21 16:48   ` [edk2-devel] " Leif Lindholm
2019-12-19  6:00     ` Abner Chang
2019-12-20 15:04       ` Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 19/39] RiscVPkg/Library: RISC-V platform level DxeIPL libraries Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 20/39] MdeModulePkg/DxeIplPeim : RISC-V platform level DxeIPL Abner Chang
2019-10-28  1:58 ` [edk2-staging/RISC-V-V2 PATCH v3 21/39] RiscVPkg/PeiServicesTablePointerLibOpenSbi: RISC-V PEI Service Table Pointer library Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 22/39] RiscVPlatformPkg/RiscVPlatformTempMemoryInit: RISC-V Platform Temporary Memory library Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 23/39] RiscVPkg/CpuDxe: Add RISC-V CPU DXE driver Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 24/39] BaseTools: BaseTools changes for RISC-V platform Abner Chang
2019-11-21 16:55   ` Leif Lindholm
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 25/39] BaseTools/Scripts Abner Chang
2019-11-19 18:17   ` [edk2-devel] " Mark Salter
2019-11-20  8:23     ` Abner Chang
2019-11-21  7:40       ` Abner Chang
2019-11-21 16:56   ` Leif Lindholm
2019-11-22  3:49     ` Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 26/39] RiscVPkg/SmbiosDxe: Generic SMBIOS DXE driver for RISC-V platforms Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 27/39] RiscVPkg/RiscVOpensbLlib: Add submodule opensbi Abner Chang
2019-11-21 17:00   ` Leif Lindholm
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 28/39] RiscVPlatformPkg/FirmwareContextProcessorSpecificLib:Add FirmwareContextProcessorSpecificLib module Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 29/39] RiscVPlatformPkg/RealTimeClockLibNull: Null instance of RTC lib Abner Chang
2019-11-21 17:02   ` Leif Lindholm
2019-11-22 12:28     ` Abner Chang
2019-11-22 14:08       ` Leif Lindholm
2019-11-22 14:19         ` Abner Chang
2019-11-22 14:55           ` Leif Lindholm
2019-11-22 16:05             ` [edk2-devel] " Abner Chang
2019-11-22 16:32               ` Leif Lindholm
2019-11-23  7:38                 ` Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 30/39] RiscVPlatformPkg/OpensbiPlatformLibNull: NULL instance of RiscVOpensbiPlatformLib Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 31/39] RiscVPlatformPkg/PlatformMemoryTestLibNull: NULL instance of PlatformMemoryTestLib Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 32/39] RiscVPlatformPkg/PlatformUpdateProgressLibNull: NULL instance of PlatformUpdateProgressLib Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 33/39] RiscVPlatformPkg/PlatformBootManagerLib: Platform Boot Manager library Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 34/39] RiscVPkg/RiscVPlatformTimerLibNull: NULL instance of RISC-V platform timer library Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 35/39] RiscVPlatformPkg/SecMain: RISC-V SecMain module Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 36/39] RiscVPlatformPkg: Add RiscVPlatformPkg Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 37/39] edk2-staging:RISC-V-V2: Add RiscVEdk2Readme.md Abner Chang
2019-11-21 17:09   ` Leif Lindholm
2019-11-22  3:57     ` [edk2-devel] " Abner Chang
2019-11-22  9:34       ` Leif Lindholm
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 38/39] edk2-staging: Revise Maintainers.txt for RISC-V packages Abner Chang
2019-10-29  1:05   ` [edk2-devel] " Laszlo Ersek
2019-10-29  1:31     ` Abner Chang
2019-10-28  1:59 ` [edk2-staging/RISC-V-V2 PATCH v3 39/39] edk2-staging: Revise Readme.md Abner Chang
2019-10-29  1:07   ` [edk2-devel] " Laszlo Ersek
2019-10-29  1:35     ` Abner Chang
2019-10-29  2:01     ` Leif Lindholm
2019-10-31  8:20       ` Laszlo Ersek
2019-11-21 17:15   ` Leif Lindholm
2019-11-22  2:05     ` Abner Chang
2019-11-22  9:42       ` Leif Lindholm
2019-11-22 11:46         ` Abner Chang

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