[edk2-staging/RISC-V-V2 PATCH v3-2] BaseTools: Fix edk2 RISC-V binary hangs at POST with the latest toolchain

[edk2-staging/RISC-V-V2 PATCH v3-2] BaseTools: Fix edk2 RISC-V binary hangs at POST with the latest toolchain

[Abner Chang]

This commit fixes the edk2 RISC-V binary hangs at early POST with latest
riscv-gnu-toolchain issue.

- Add compiler option -msmall-data-limit=0 to disable small data is placed
in .sdata2 section which causes the relocation is not fixed in correctly on
edk2 build tool.
- Remove GccBaseRiscV.lds, the GccBase.lds works fine with latest toolchain.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
---
 RiscVEdk2Readme.md                 | 14 ++-----
 BaseTools/Conf/tools_def.template  |  7 ++--
 BaseTools/Scripts/GccBaseRiscV.lds | 79 --------------------------------------
 3 files changed, 6 insertions(+), 94 deletions(-)
 delete mode 100644 BaseTools/Scripts/GccBaseRiscV.lds

diff --git a/RiscVEdk2Readme.md b/RiscVEdk2Readme.md
index ebd7495..6136905 100644
--- a/RiscVEdk2Readme.md
+++ b/RiscVEdk2Readme.md
@@ -32,21 +32,13 @@ RiscVPlatformPkg  - RISC-V platform package. This package provides RISC-V
                     platform common modules, libraries, PCDs and definitoins.
 ```
 ## Toolchain of RISC-V EDK2 port
-Due to not yet tracked down bugs, only the following toolchain is known to
-produce bootoable binaries.
-https://github.com/riscv/riscv-gnu-toolchain at commit ID 64879b24.
-The commit ID 64879b24 of riscv-gnu-toolchain repository is verified to build
-RISC-V edk2 platform and boot to EFI SHELL successfully.
-You have to clone the toolchain from above link and check out commit:64879b24
-for building RISC-V edk2 port.
-The commit later than 64879b24 causes system hangs at the PEI phase to DXE phase
-transition. We are still figuring out the root cause.
+https://github.com/riscv/riscv-gnu-toolchain
+You have to clone the toolchain from above link for building RISC-V edk2 port.
 
 ## EDK2 Build Target
 "RISCV64" ARCH is the RISC-V architecture which currently supported and verified.
 The verified RISC-V toolchain is https://github.com/riscv/riscv-gnu-toolchain
-@64879b24 as mentioned above, toolchain tag is "GCC5" which is declared in
-tools_def.txt.
+and the toolchain tag is "GCC5" which is declared in tools_def.txt.
 Below is the edk2 build options for building RISC-V RV64 platform,
 ```
 build -a RISCV64 -p Platform/{Vendor}/{Platform}/{Platform}.dsc -t GCC5
diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
index 8adfab0..2fa85ba 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -1808,17 +1808,16 @@ DEFINE GCC5_ARM_ASLDLINK_FLAGS       = DEF(GCC49_ARM_ASLDLINK_FLAGS)
 DEFINE GCC5_AARCH64_ASLDLINK_FLAGS   = DEF(GCC49_AARCH64_ASLDLINK_FLAGS)
 DEFINE GCC5_ASLCC_FLAGS              = DEF(GCC49_ASLCC_FLAGS) -fno-lto
 
-DEFINE GCC5_RISCV_ALL_CC_FLAGS                    = -g -fshort-wchar -fno-strict-aliasing -Wall -Werror -Wno-array-bounds -ffunction-sections -fdata-sections -c -include AutoGen.h -fno-common -DSTRING_ARRAY_NAME=$(BASE_NAME)Strings
+DEFINE GCC5_RISCV_ALL_CC_FLAGS                    = -g -fshort-wchar -fno-strict-aliasing -Wall -Werror -Wno-array-bounds -ffunction-sections -fdata-sections -c -include AutoGen.h -fno-common -DSTRING_ARRAY_NAME=$(BASE_NAME)Strings -msmall-data-limit=0
 DEFINE GCC5_RISCV_ALL_DLINK_COMMON                = -nostdlib -n -q --gc-sections -z common-page-size=0x40
 DEFINE GCC5_RISCV_ALL_DLINK_FLAGS                 = DEF(GCC5_RISCV_ALL_DLINK_COMMON) --entry $(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Map $(DEST_DIR_DEBUG)/$(BASE_NAME).map
-DEFINE GCC5_RISCV_ALL_DLINK2_FLAGS                = --defsym=PECOFF_HEADER_SIZE=0x220 --script=$(EDK_TOOLS_PATH)/Scripts/GccBaseRiscV.lds
+DEFINE GCC5_RISCV_ALL_DLINK2_FLAGS                = --defsym=PECOFF_HEADER_SIZE=0x220 --script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
 DEFINE GCC5_RISCV_ALL_ASM_FLAGS                   = -c -x assembler -imacros $(DEST_DIR_DEBUG)/AutoGen.h
 DEFINE GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE    = -Wno-tautological-compare -Wno-pointer-compare
 
 DEFINE GCC5_RISCV64_ARCH                   = rv64imafdc
 DEFINE GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS = DEF(GCC5_RISCV_ALL_DLINK_COMMON) --entry ReferenceAcpiTable -u ReferenceAcpiTable
-DEFINE GCC5_RISCV32_RISCV64_DLINK_FLAGS    = DEF(GCC5_RISCV_ALL_DLINK_COMMON) --entry $(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Map $(DEST_DIR_DEBUG)/$(BASE_NAME).map
-DEFINE GCC5_RISCV64_CC_FLAGS               = DEF(GCC5_RISCV_ALL_CC_FLAGS) DEF(GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE) -march=DEF(GCC5_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-asynchronous-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8 -mcmodel=medany -mabi=lp64
+DEFINE GCC5_RISCV64_CC_FLAGS               = DEF(GCC5_RISCV_ALL_CC_FLAGS) DEF(GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE) -march=DEF(GCC5_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-asynchronous-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8 -mcmodel=medany -mabi=lp64 -mno-relax
 DEFINE GCC5_RISCV64_DLINK_FLAGS            = DEF(GCC5_RISCV_ALL_DLINK_FLAGS)  -melf64lriscv --oformat=elf64-littleriscv --no-relax
 DEFINE GCC5_RISCV64_DLINK2_FLAGS           = DEF(GCC5_RISCV_ALL_DLINK2_FLAGS)
 DEFINE GCC5_ASM_FLAGS                      = DEF(GCC5_RISCV_ALL_ASM_FLAGS) -march=DEF(GCC5_RISCV64_ARCH) -mcmodel=medany -mabi=lp64
diff --git a/BaseTools/Scripts/GccBaseRiscV.lds b/BaseTools/Scripts/GccBaseRiscV.lds
deleted file mode 100644
index 91937aa..0000000
--- a/BaseTools/Scripts/GccBaseRiscV.lds
+++ /dev/null
@@ -1,79 +0,0 @@
-/** @file
-
-  Unified linker script for GCC based builds
-
-  Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
-  Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR>
-  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-SECTIONS {
-
-  /*
-   * The PE/COFF binary consists of DOS and PE/COFF headers, and a sequence of
-   * section headers adding up to PECOFF_HEADER_SIZE bytes (which differs
-   * between 32-bit and 64-bit builds). The actual start of the .text section
-   * will be rounded up based on its actual alignment.
-   */
-  . = PECOFF_HEADER_SIZE;
-
-  .text : ALIGN(CONSTANT(COMMONPAGESIZE)) {
-    *(.text .text.* .stub .gnu.linkonce.t.*)
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-    *(.got .got.*)
-
-    /*
-     * The contents of AutoGen.c files are mostly constant from the POV of the
-     * program, but most of it ends up in .data or .bss by default since few of
-     * the variable definitions that get emitted are declared as CONST.
-     * Unfortunately, we cannot pull it into the .text section entirely, since
-     * patchable PCDs are also emitted here, but we can at least move all of the
-     * emitted GUIDs here.
-     */
-    *:AutoGen.obj(.data.g*Guid)
-  }
-
-  /*
-   * The alignment of the .data section should be less than or equal to the
-   * alignment of the .text section. This ensures that the relative offset
-   * between these sections is the same in the ELF and the PE/COFF versions of
-   * this binary.
-   */
-  .data ALIGN(ALIGNOF(.text)) : ALIGN(CONSTANT(COMMONPAGESIZE)) {
-    *(.data .data.* .gnu.linkonce.d.*)
-    *(.bss .bss.*)
-  }
-
-  .eh_frame ALIGN(CONSTANT(COMMONPAGESIZE)) : {
-    KEEP (*(.eh_frame))
-  }
-
-  .rela ALIGN(CONSTANT(COMMONPAGESIZE)) : {
-    *(.rela .rela.*)
-  }
-
-  .hii : ALIGN(CONSTANT(COMMONPAGESIZE)) {
-    KEEP (*(.hii))
-  }
-
-  /*
-   * Retain the GNU build id but in a non-allocatable section so GenFw
-   * does not copy it into the PE/COFF image.
-   */
-  .build-id (INFO) : { *(.note.gnu.build-id) }
-
-  /DISCARD/ : {
-    *(.note.GNU-stack)
-    *(.gnu_debuglink)
-    *(.interp)
-    *(.dynsym)
-    *(.dynstr)
-    *(.dynamic)
-    *(.hash .gnu.hash)
-    *(.comment)
-    *(COMMON)
-  }
-}
-- 
2.7.4