From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by mx.groups.io with SMTP id smtpd.web12.22054.1574332901521801784 for ; Thu, 21 Nov 2019 02:41:42 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: nxp.com, ip: 92.121.34.13, mailfrom: meenakshi.aggarwal@nxp.com) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 1D9FD1A07D7; Thu, 21 Nov 2019 11:41:40 +0100 (CET) Received: from inv0113.in-blr01.nxp.com (inv0113.in-blr01.nxp.com [165.114.116.118]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 9B2EE1A0009; Thu, 21 Nov 2019 11:41:39 +0100 (CET) Received: from uefi-OptiPlex-790.ap.freescale.net (uefi-OptiPlex-790.ap.freescale.net [10.232.132.78]) by inv0113.in-blr01.nxp.com (Postfix) with ESMTP id 9111C341; Thu, 21 Nov 2019 16:11:38 +0530 (IST) From: "Meenakshi Aggarwal" To: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, michael.d.kinney@intel.com, devel@edk2.groups.io Cc: v.sethi@nxp.com, Meenakshi Aggarwal Subject: [edk2-platforms] [PATCH v2 01/11] Silicon/NXP: Add Library to provide Mmio APIs with swapped data. Date: Thu, 21 Nov 2019 21:55:04 +0530 Message-Id: <1574353514-23986-2-git-send-email-meenakshi.aggarwal@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1574353514-23986-1-git-send-email-meenakshi.aggarwal@nxp.com> References: <1570639758-30355-1-git-send-email-meenakshi.aggarwal@nxp.com> <1574353514-23986-1-git-send-email-meenakshi.aggarwal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP This library provided MMIO APIs for modules need swapping. Signed-off-by: Meenakshi Aggarwal Reviewed-by: Leif Lindholm --- Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf | 26 ++ Silicon/NXP/Include/Library/IoAccessLib.h | 248 ++++++++++++++++ Silicon/NXP/Library/IoAccessLib/IoAccessLib.c | 302 ++++++++++++++++++++ 3 files changed, 576 insertions(+) diff --git a/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf new file mode 100644 index 000000000000..4f3af4647e95 --- /dev/null +++ b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf @@ -0,0 +1,26 @@ +## @IoAccessLib.inf + +# Copyright 2017-2019 NXP +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = IoAccessLib + FILE_GUID = 28d77333-77eb-4faf-8735-130e5eb3e343 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = IoAccessLib + +[Sources.common] + IoAccessLib.c + +[Packages] + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[LibraryClasses] + IoLib diff --git a/Silicon/NXP/Include/Library/IoAccessLib.h b/Silicon/NXP/Include/Library/IoAccessLib.h new file mode 100644 index 000000000000..b72e65c83091 --- /dev/null +++ b/Silicon/NXP/Include/Library/IoAccessLib.h @@ -0,0 +1,248 @@ +/** @file + * + * Copyright 2017-2019 NXP + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + * + **/ + +#ifndef IO_ACCESS_LIB_H_ +#define IO_ACCESS_LIB_H_ + +#include + +/** + MmioRead16 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT16 +EFIAPI +SwapMmioRead16 ( + IN UINTN Address + ); + +/** + MmioRead32 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT32 +EFIAPI +SwapMmioRead32 ( + IN UINTN Address + ); + +/** + MmioRead64 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT64 +EFIAPI +SwapMmioRead64 ( + IN UINTN Address + ); + +/** + MmioWrite16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioWrite16 ( + IN UINTN Address, + IN UINT16 Value + ); + +/** + MmioWrite32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioWrite32 ( + IN UINTN Address, + IN UINT32 Value + ); + +/** + MmioWrite64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioWrite64 ( + IN UINTN Address, + IN UINT64 Value + ); + +/** + MmioAndThenOr16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioAndThenOr16 ( + IN UINTN Address, + IN UINT16 AndData, + IN UINT16 OrData + ); + +/** + MmioAndThenOr32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioAndThenOr32 ( + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData + ); + +/** + MmioAndThenOr64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioAndThenOr64 ( + IN UINTN Address, + IN UINT64 AndData, + IN UINT64 OrData + ); + +/** + MmioOr16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioOr16 ( + IN UINTN Address, + IN UINT16 OrData + ); + +/** + MmioOr32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioOr32 ( + IN UINTN Address, + IN UINT32 OrData + ); + +/** + MmioOr64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioOr64 ( + IN UINTN Address, + IN UINT64 OrData + ); + +/** + MmioAnd16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioAnd16 ( + IN UINTN Address, + IN UINT16 AndData + ); + +/** + MmioAnd32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioAnd32 ( + IN UINTN Address, + IN UINT32 AndData + ); + +/** + MmioAnd64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioAnd64 ( + IN UINTN Address, + IN UINT64 AndData + ); + +#endif /* IO_ACCESS_LIB_H_ */ diff --git a/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c new file mode 100644 index 000000000000..e9e535fc2f85 --- /dev/null +++ b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c @@ -0,0 +1,302 @@ +/** IoAccessLib.c + + Provide MMIO APIs for BE modules. + + Copyright 2017-2019 NXP + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include + +/** + MmioRead16 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT16 +EFIAPI +SwapMmioRead16 ( + IN UINTN Address + ) +{ + return SwapBytes16 (MmioRead16 (Address)); +} + +/** + MmioRead32 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT32 +EFIAPI +SwapMmioRead32 ( + IN UINTN Address + ) +{ + return SwapBytes32 (MmioRead32 (Address)); +} + +/** + MmioRead64 for Big-Endian modules. + + @param Address The MMIO register to read. + + @return The value read. + +**/ +UINT64 +EFIAPI +SwapMmioRead64 ( + IN UINTN Address + ) +{ + return SwapBytes64 (MmioRead64 (Address)); +} + +/** + MmioWrite16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioWrite16 ( + IN UINTN Address, + IN UINT16 Value + ) +{ + return MmioWrite16 (Address, SwapBytes16 (Value)); +} + +/** + MmioWrite32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioWrite32 ( + IN UINTN Address, + IN UINT32 Value + ) +{ + return MmioWrite32 (Address, SwapBytes32 (Value)); +} + +/** + MmioWrite64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param Value The value to write to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioWrite64 ( + IN UINTN Address, + IN UINT64 Value + ) +{ + return MmioWrite64 (Address, SwapBytes64 (Value)); +} + +/** + MmioAndThenOr16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioAndThenOr16 ( + IN UINTN Address, + IN UINT16 AndData, + IN UINT16 OrData + ) +{ + AndData = SwapBytes16 (AndData); + OrData = SwapBytes16 (OrData); + + return MmioAndThenOr16 (Address, AndData, OrData); +} + +/** + MmioAndThenOr32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioAndThenOr32 ( + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData + ) +{ + AndData = SwapBytes32 (AndData); + OrData = SwapBytes32 (OrData); + + return MmioAndThenOr32 (Address, AndData, OrData); +} + +/** + MmioAndThenOr64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + @param OrData The value to OR with the result of the AND operation. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioAndThenOr64 ( + IN UINTN Address, + IN UINT64 AndData, + IN UINT64 OrData + ) +{ + AndData = SwapBytes64 (AndData); + OrData = SwapBytes64 (OrData); + + return MmioAndThenOr64 (Address, AndData, OrData); +} + +/** + MmioOr16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioOr16 ( + IN UINTN Address, + IN UINT16 OrData + ) +{ + return MmioOr16 (Address, SwapBytes16 (OrData)); +} + +/** + MmioOr32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioOr32 ( + IN UINTN Address, + IN UINT32 OrData + ) +{ + return MmioOr32 (Address, SwapBytes32 (OrData)); +} + +/** + MmioOr64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param OrData The value to OR with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioOr64 ( + IN UINTN Address, + IN UINT64 OrData + ) +{ + return MmioOr64 (Address, SwapBytes64 (OrData)); +} + +/** + MmioAnd16 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT16 +EFIAPI +SwapMmioAnd16 ( + IN UINTN Address, + IN UINT16 AndData + ) +{ + return MmioAnd16 (Address, SwapBytes16 (AndData)); +} + +/** + MmioAnd32 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT32 +EFIAPI +SwapMmioAnd32 ( + IN UINTN Address, + IN UINT32 AndData + ) +{ + return MmioAnd32 (Address, SwapBytes32 (AndData)); +} + +/** + MmioAnd64 for Big-Endian modules. + + @param Address The MMIO register to write. + @param AndData The value to AND with the read value from the MMIO register. + + @return The value written back to the MMIO register. + +**/ +UINT64 +EFIAPI +SwapMmioAnd64 ( + IN UINTN Address, + IN UINT64 AndData + ) +{ + return MmioAnd64 (Address, SwapBytes64 (AndData)); +} -- 1.9.1