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From: Wasim Khan <wasim.khan@oss.nxp.com>
To: devel@edk2.groups.io, meenakshi.aggarwal@nxp.com,
	vabhav.sharma@nxp.com, V.Sethi@nxp.com, ard.biesheuvel@arm.com,
	leif@nuviainc.com, jon@solid-run.com
Cc: Wasim Khan <wasim.khan@nxp.com>
Subject: [PATCH edk2-platforms 08/16] Silicon/NXP: PciHostBridgeLib: Dump Layerscale iATU windows
Date: Fri, 22 May 2020 04:32:11 +0530	[thread overview]
Message-ID: <1590102139-16588-9-git-send-email-wasim.khan@oss.nxp.com> (raw)
In-Reply-To: <1590102139-16588-1-git-send-email-wasim.khan@oss.nxp.com>

From: Wasim Khan <wasim.khan@nxp.com>

Dump ATU windows for PCIe Layerscape controller if PcdPciDebug
is enabled.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 .../Library/PciHostBridgeLib/PciHostBridgeLib.c    | 42 ++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
index 1de20c621dc0..3ad526218bcf 100644
--- a/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
+++ b/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
@@ -297,6 +297,44 @@ PcieOutboundSet (
 }
 
 /**
+  Dump PCIe Layerscape ATU
+
+  @param Pcie     Address of PCIe host controller.
+**/
+VOID LsDumpAtu (
+  IN EFI_PHYSICAL_ADDRESS Pcie
+  )
+{
+  UINT32 Cnt;
+  for (Cnt = 0; Cnt <= IATU_REGION_INDEX7; Cnt++) {
+    MmioWrite32 ((UINTN)Pcie + IATU_VIEWPORT_OFF,
+                  (UINT32)(IATU_VIEWPORT_OUTBOUND | Cnt));
+
+    DEBUG ((DEBUG_INFO, "iATU%d:\n",Cnt));
+    DEBUG ((DEBUG_INFO, "\tLOWER PHYS 0x%08x\n",
+            MmioRead32 ((UINTN)Pcie + IATU_LWR_BASE_ADDR_OFF_OUTBOUND_0)));
+
+    DEBUG ((DEBUG_INFO, "\tUPPER PHYS 0x%08x\n",
+            MmioRead32 ((UINTN)Pcie + IATU_UPPER_BASE_ADDR_OFF_OUTBOUND_0)));
+
+    DEBUG ((DEBUG_INFO, "\tLOWER BUS 0x%08x\n",
+            MmioRead32 ((UINTN)Pcie + IATU_LWR_TARGET_ADDR_OFF_OUTBOUND_0)));
+
+    DEBUG ((DEBUG_INFO, "\tUPPER BUS 0x%08x\n",
+            MmioRead32 ((UINTN)Pcie + IATU_UPPER_TARGET_ADDR_OFF_OUTBOUND_0)));
+
+    DEBUG ((DEBUG_INFO, "\tLIMIT     0x%08x\n",
+            MmioRead32 ((UINTN)Pcie + IATU_LIMIT_ADDR_OFF_OUTBOUND_0)));
+
+    DEBUG ((DEBUG_INFO, "\tCR1       0x%08x\n",
+            MmioRead32 ((UINTN)Pcie + IATU_REGION_CTRL_1_OFF_OUTBOUND_0)));
+
+    DEBUG ((DEBUG_INFO, "\tCR2       0x%08x\n",
+            MmioRead32 ((UINTN)Pcie + IATU_REGION_CTRL_2_OFF_OUTBOUND_0)));
+  }
+}
+
+/**
   Function to set-up iATU windows for Layerscape PCIe controller
 
   @param Pcie      Address of PCIe host controller
@@ -410,6 +448,10 @@ PcieLsSetupAtu (
     SEG_IO_BUS,
     SEG_IO_SIZE
     );
+
+  if (FixedPcdGetBool (PcdPciDebug) == TRUE) {
+    LsDumpAtu (Pcie);
+  }
 }
 
 /**
-- 
2.7.4


  parent reply	other threads:[~2020-05-21 23:03 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-21 23:02 [PATCH edk2-platforms 00/16] Add PCIe Support Wasim Khan
2020-05-21 23:02 ` [PATCH edk2-platforms 01/16] Silicon/NXP/NxpQoriqLs.dec: Add PCIe related PCDs Wasim Khan
2020-05-22  9:12   ` Ard Biesheuvel
2020-05-24 18:31     ` Wasim Khan (OSS)
2020-05-26  6:16       ` Ard Biesheuvel
2020-05-21 23:02 ` [PATCH edk2-platforms 02/16] Silicon/NXP: LS1043A: Define " Wasim Khan
2020-05-21 23:02 ` [PATCH edk2-platforms 03/16] Silicon/NXP: Implement PciHostBridgeLib support Wasim Khan
2020-05-22  9:20   ` Ard Biesheuvel
2020-05-21 23:02 ` [PATCH edk2-platforms 04/16] Silicon/NXP: PciHostBridgeLib: CFG Shift feature support for PCIeLS Ctrl Wasim Khan
2020-05-22  9:22   ` Ard Biesheuvel
2020-05-21 23:02 ` [PATCH edk2-platforms 05/16] Silicon/NXP: PciHostBridgeLib: Setup PCIe LsGen4 Controller and ATU Windows Wasim Khan
2020-05-22  9:24   ` Ard Biesheuvel
2020-05-24 18:31     ` Wasim Khan (OSS)
2020-05-21 23:02 ` [PATCH edk2-platforms 06/16] Silicon/NXP: PciHostBridgeLib: add Workaround for A-011451 Wasim Khan
2020-05-21 23:02 ` [PATCH edk2-platforms 07/16] Silicon/NXP: PciHostBridgeLib: Dump Layerscale Gen4 ATU windows Wasim Khan
2020-05-22  9:33   ` Ard Biesheuvel
2020-05-21 23:02 ` Wasim Khan [this message]
2020-05-22  9:31   ` [PATCH edk2-platforms 08/16] Silicon/NXP: PciHostBridgeLib: Dump Layerscale iATU windows Ard Biesheuvel
2020-05-21 23:02 ` [PATCH edk2-platforms 09/16] Silicon/NXP: Implement PciSegmentLib for PCIe Layerscape Controller Wasim Khan
2020-05-22  9:29   ` Ard Biesheuvel
2020-05-24 18:32     ` Wasim Khan (OSS)
2020-05-25  4:30       ` Jon Nettleton
2020-05-25 15:21         ` Wasim Khan (OSS)
2020-05-21 23:02 ` [PATCH edk2-platforms 10/16] Silicon/NXP: PciSegmentLib: Add ECAM config support for PCIe LS Controller Wasim Khan
2020-05-22  9:36   ` Ard Biesheuvel
2020-05-24 18:32     ` Wasim Khan (OSS)
2020-05-21 23:02 ` [PATCH edk2-platforms 11/16] Silicon/NXP: PciSegmentLib: Add support PCIe LsGen4 Controller Wasim Khan
2020-05-22  9:38   ` Ard Biesheuvel
2020-05-24 18:32     ` Wasim Khan (OSS)
2020-05-21 23:02 ` [PATCH edk2-platforms 12/16] Silicon/NXP: PciSegmentLib: LsGen4Ctrl: Add Workaround for A-011264 Wasim Khan
2020-05-22  9:39   ` Ard Biesheuvel
2020-05-24 18:32     ` Wasim Khan (OSS)
2020-05-21 23:02 ` [PATCH edk2-platforms 13/16] Silicon/NXP/Drivers: Implement PciCpuIo2Dxe Driver Wasim Khan
2020-05-22  9:42   ` Ard Biesheuvel
2020-05-21 23:02 ` [PATCH edk2-platforms 14/16] Platform/NXP: LS1043aRdbPkg: Enable NetworkPkg Wasim Khan
2020-05-22  9:42   ` Ard Biesheuvel
2020-05-21 23:02 ` [PATCH edk2-platforms 15/16] Platform/NXP: LS1043aRdbPkg: Enable PCIE support Wasim Khan
2020-05-21 23:02 ` [PATCH edk2-platforms 16/16] Platform/NXP: LS1043aRdbPkg : Increase fv image size Wasim Khan
2020-05-22  9:44   ` Ard Biesheuvel
2020-05-22  9:46 ` [PATCH edk2-platforms 00/16] Add PCIe Support Ard Biesheuvel
2020-05-22 10:58   ` Leif Lindholm
2020-05-24 18:32     ` Wasim Khan (OSS)

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