From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.5458.1593759747987257015 for ; Fri, 03 Jul 2020 00:02:28 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: pranav.madhu@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6179431B for ; Fri, 3 Jul 2020 00:02:25 -0700 (PDT) Received: from usa.arm.com (a074742-lin.blr.arm.com [10.162.17.37]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A95A13F73C for ; Fri, 3 Jul 2020 00:02:24 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Subject: [edk2-platforms][PATCH v3 0/4] Platform: Add initial support for N1SDP board Date: Fri, 3 Jul 2020 12:32:07 +0530 Message-Id: <1593759731-24896-1-git-send-email-pranav.madhu@arm.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Changes since v2: - Addressed comments from Thomas. - Renamed Silicon/ARM/N1Sdp to Silicon/ARM/NeoverseN1Soc. Changes since v1: - Addressed comments from Ard. - Split the code between Silicon and Platform directories. Arm's N1SDP is a Arm v8.2-A Neoverse N1 CPU based reference design platfo= rm primariliy intended for development on Arm64 based platform. This patch s= eries adds initial platform support for this board. The first patch in this series adds the platform libary implementation. T= he second patch adds a custom implementation of the PciExpressLib due to a P= CIe integration issue which results in all config space accesses to non-exist= ing BDFs resulting in a Serror (bus abort). To avoid this, the N1 SoC specifi= c PciExpressLib implementation provides a workaround for this issue. The th= ird patch in this series adds the platform library for the PciHostBridge. The fourth patch adds the initial platform support for the N1SDP platform. Deepak Pandey (4): Silicon/ARM/N1SoC: Add platform library implementation Silicon/ARM/N1SoC: Implement Neoverse N1 Soc specific PciExpressLib Silicon/ARM/N1SoC: Implement the PciHostBridgeLib library Platform/ARM/N1SDP: Add initial N1SDP platform support .../ARM/NeoverseN1Soc/NeoverseN1SocPlatform.dec | 46 + Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 245 ++++ Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 294 ++++ .../NeoverseN1SocPciExpressLib.inf | 39 + .../Library/PciHostBridgeLib/PciHostBridgeLib.inf | 49 + .../Library/PlatformLib/PlatformLib.inf | 54 + .../NeoverseN1Soc/Include/NeoverseN1SocPlatform.h | 68 + .../NeoverseN1SocPciExpressLib.c | 1545 ++++++++++++++= ++++++ .../Library/PciHostBridgeLib/PciHostBridgeLib.c | 187 +++ .../Library/PlatformLib/PlatformLib.c | 67 + .../Library/PlatformLib/PlatformLibMem.c | 152 ++ .../Library/PlatformLib/AArch64/Helper.S | 84 ++ 12 files changed, 2830 insertions(+) create mode 100644 Silicon/ARM/NeoverseN1Soc/NeoverseN1SocPlatform.dec create mode 100644 Platform/ARM/N1Sdp/N1SdpPlatform.dsc create mode 100644 Platform/ARM/N1Sdp/N1SdpPlatform.fdf create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExp= ressLib/NeoverseN1SocPciExpressLib.inf create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/Pc= iHostBridgeLib.inf create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/Platfor= mLib.inf create mode 100644 Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1SocPlatfo= rm.h create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExp= ressLib/NeoverseN1SocPciExpressLib.c create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/Pc= iHostBridgeLib.c create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/Platfor= mLib.c create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/Platfor= mLibMem.c create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64= /Helper.S --=20 2.7.4