From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.21189.1595431554409642437 for ; Wed, 22 Jul 2020 08:25:54 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: pranav.madhu@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 097D131B; Wed, 22 Jul 2020 08:25:54 -0700 (PDT) Received: from usa.arm.com (a074742-lin.blr.arm.com [10.162.17.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D704D3F66E; Wed, 22 Jul 2020 08:25:52 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm Subject: [edk2-platforms][PATCH v5 4/5] Platform/ARM/N1SDP: Add initial N1SDP platform support Date: Wed, 22 Jul 2020 20:55:23 +0530 Message-Id: <1595431524-13782-5-git-send-email-pranav.madhu@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1595431524-13782-1-git-send-email-pranav.madhu@arm.com> References: <1595431524-13782-1-git-send-email-pranav.madhu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Deepak Pandey Neoverse N1 System Development Platform (N1SDP) is an infrastructure segment development platform. It includes a Neoverse N1 SoC and an IOFPGA that provides access to low-bandwidth peripherals. It also enables development of CCIX-enabled FPGA accelerators. Cc: Ard Biesheuvel Cc: Leif Lindholm Signed-off-by: Pranav Madhu Reviewed-by: Leif Lindholm --- Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 245 ++++++++++++++++ Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 294 ++++++++++++++++++++ 2 files changed, 539 insertions(+) diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1= SdpPlatform.dsc new file mode 100644 index 000000000000..92376aab8ffe --- /dev/null +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc @@ -0,0 +1,245 @@ +# +# Copyright (c) 2018 - 2020, ARM Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +########################################################################= ######## +# +# Defines Section - statements that will be processed to create a Makefi= le. +# +########################################################################= ######## +[Defines] + PLATFORM_NAME =3D n1sdp + PLATFORM_GUID =3D 9af67d31-7de8-4a71-a9a8-a597a27659c= e + PLATFORM_VERSION =3D 0.1 + DSC_SPECIFICATION =3D 0x0001001B + OUTPUT_DIRECTORY =3D Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES =3D AARCH64 + BUILD_TARGETS =3D NOOPT|DEBUG|RELEASE + SKUID_IDENTIFIER =3D DEFAULT + FLASH_DEFINITION =3D Platform/ARM/N1Sdp/N1SdpPlatform.fd= f + BUILD_NUMBER =3D 1 + +!include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc + +[LibraryClasses.common] + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf + ArmPlatformLib|Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformL= ib.inf + BasePathLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf + UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf + +[LibraryClasses.common.SEC] + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAll= ocationLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf + PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/P= eiServicesTablePointerLib.inf + +[LibraryClasses.common.PEI_CORE, LibraryClasses.common.PEIM] + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAll= ocationLib.inf + PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf + PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/P= eiServicesTablePointerLib.inf + ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseRep= ortStatusCodeLibNull.inf + +[LibraryClasses.common.PEI_CORE] + PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.i= nf + +[LibraryClasses.common.PEIM] + PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf + +[LibraryClasses.common.DXE_CORE] + DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.i= nf + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf + MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/Dx= eCoreMemoryAllocationLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + +[LibraryClasses.common.DXE_DRIVER] + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf + PciHostBridgeLib|Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/Pc= iHostBridgeLib.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci= .inf + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf + PciExpressLib|Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpres= sLib/PciExpressLib.inf + +[LibraryClasses.common.DXE_RUNTIME_DRIVER] + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + +[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATI= ON, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_D= RIVER] + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + +########################################################################= ######## +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +########################################################################= ######## + +[PcdsFeatureFlag.common] + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE + +[PcdsFixedAtBuild.common] + gArmTokenSpaceGuid.PcdVFPEnabled|1 + + # Stacks for MPCores in Normal World + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x80000000 + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x40000 + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x0 + + # System Memory (2GB) - Reserved Secure Memory (16MB) + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000 + gArmTokenSpaceGuid.PcdSystemMemorySize|(0x80000000 - 0x01000000) + + # Secondary DDR memory + gArmNeoverseN1SocTokenSpaceGuid.PcdDramBlock2Base|0x8080000000 + + # GIC Base Addresses + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C000000 + gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000 + gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000 + + # PCIe + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x70000000 + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|24 + gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE + + # PL011 - Serial Terminal + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2A400000 + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 + gArmPlatformTokenSpaceGuid.PL011UartClkInHz|50000000 + gArmPlatformTokenSpaceGuid.PL011UartInterrupt|95 + + # PL011 Serial Debug UART (DBG2) + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|gEfiMdeModulePkgTo= kenSpaceGuid.PcdSerialRegisterBase + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|gEfiMdePkgTokenSpa= ceGuid.PcdUartDefaultBaudRate + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|50000000 + + # SBSA Watchdog + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93 + + # PL031 RealTimeClock + gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C100000 + + # ARM OS Loader + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|0 + + # ARM Architectural Timer Frequency + gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000 + gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000 + gEmbeddedTokenSpaceGuid.PcdTimerPeriod|1000 + + # ARM Cores and Clusters + gArmPlatformTokenSpaceGuid.PcdCoreCount|2 + gArmPlatformTokenSpaceGuid.PcdClusterCount|2 + + # Runtime Variable storage + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0 + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800 + +########################################################################= ######## +# +# Components Section - list of all EDK II Modules needed by this Platfor= m +# +########################################################################= ######## +[Components.common] + # PEI Phase modules + ArmPkg/Drivers/CpuPei/CpuPei.inf + ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf + ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf + ArmPlatformPkg/PlatformPei/PlatformPeim.inf + MdeModulePkg/Core/Pei/PeiMain.inf + MdeModulePkg/Universal/PCD/Pei/Pcd.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + MdeModulePkg/Universal/Variable/Pei/VariablePei.inf + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { + + NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecomp= ressLib.inf + } + + # DXE + MdeModulePkg/Core/Dxe/DxeMain.inf { + + NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32= GuidedSectionExtractLib.inf + + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F + } + + # Architectural Protocols + ArmPkg/Drivers/CpuDxe/CpuDxe.inf + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + ArmPkg/Drivers/TimerDxe/TimerDxe.inf + ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + MdeModulePkg/Universal/Metronome/Metronome.inf + MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRunt= imeDxe.inf + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.i= nf + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { + + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + } + + # Human Interface Support + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # FAT filesystem + GPT/MBR partitioning + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + FatPkg/EnhancedFatDxe/Fat.inf + + # Bds + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Application/UiApp/UiApp.inf { + + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.in= f + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintena= nceManagerUiLib.inf + } + + # Required by PCI + ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf + + # PCI Support + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf { + + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F + } + + # AHCI Support + MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf + MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf + + # SATA Controller + MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf + + # Usb Support + MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf + MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf + MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf + MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf + MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDev= iceDxe.inf diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf b/Platform/ARM/N1Sdp/N1= SdpPlatform.fdf new file mode 100644 index 000000000000..c4e1f7b4b8fc --- /dev/null +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf @@ -0,0 +1,294 @@ +# +# Copyright (c) 2018 - 2020, ARM Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +########################################################################= ######## +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD sectio= n +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +########################################################################= ######## + +[FD.BL33_AP_UEFI] +BaseAddress =3D 0xE0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The = base address of the Firmware in NOR Flash. +Size =3D 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The = size in bytes of the FLASH Device +ErasePolarity =3D 1 + +# This one is tricky, it must be: BlockSize * NumBlocks =3D Size +BlockSize =3D 0x00001000 +NumBlocks =3D 0x200 + +########################################################################= ######## +# +# Following are lists of FD Region layout which correspond to the locati= ons of +# different images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" requ= ired) +# followed by the pipe "|" character, followed by the size of the region= , also +# in hex with the leading "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +########################################################################= ######## + +0x00000000|0x00200000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV =3D FVMAIN_COMPACT + + +########################################################################= ######## +# +# FV Section +# +# [FV] section is used to define what components or modules are placed w= ithin a +# flash device file. This section also defines order the components and = modules +# are positioned within the image. The [FV] section consists of define +# statements, set statements and module statements. +# +########################################################################= ######## + +[FV.FvMain] +BlockSize =3D 0x40 +NumBlocks =3D 0 # This FV gets compressed so make it ju= st big enough +FvAlignment =3D 8 # FV alignment and FV attributes settin= g. +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + # PI DXE Drivers producing Architectural Protocols (EFI Services) + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/Metronome/Metronome.inf + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe= .inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounter= RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + + # Human Interface Support + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # Required by PCI + INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf + + # PCI Support + INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf + + # AHCI Support + INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf + INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf + + # SATA Controller + INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf + + # Usb Support + INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf + INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf + INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf + INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf + INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePc= iDeviceDxe.inf + + # Multiple Console IO support + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + + INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + + # FAT filesystem + GPT/MBR partitioning + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe= .inf + + # FV FileSystem + INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe= .inf + + # UEFI applications + INF ShellPkg/Application/Shell/Shell.inf + + # Bds + INF MdeModulePkg/Application/UiApp/UiApp.inf + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + +[FV.FVMAIN_COMPACT] +FvAlignment =3D 8 +BlockSize =3D 0x1000 +NumBlocks =3D 0x200 +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + INF ArmPkg/Drivers/CpuPei/CpuPei.inf + INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf + INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf + INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf + INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf + INF MdeModulePkg/Core/Pei/PeiMain.inf + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf + INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf + + FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUI= RED =3D TRUE { + SECTION FV_IMAGE =3D FVMAIN + } + } + + +########################################################################= ######## +# +# Rules are use with the [FV] section's module INF type to define +# how an FFS file is created for a given INF file. The following Rule ar= e the default +# rules for the different module type. User can add the customized rules= to define the +# content of the FFS file. +# +########################################################################= ######## + + +########################################################################= #### +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section= # +########################################################################= #### +# +#[Rule.Common.DXE_DRIVER] +# FILE DRIVER =3D $(NAMED_GUID) { +# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODUL= E_NAME).depex +# COMPRESS PI_STD { +# GUIDED { +# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).e= fi +# UI STRING=3D"$(MODULE_NAME)" Optional +# VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD= _NUMBER) +# } +# } +# } +# +########################################################################= #### + +# +# These SEC rules are used for ArmPlatformPkg/PrePeiCore module. +# ArmPlatformPkg/PrePeiCore is declared as a SEC module to make GenFv pa= tch +# the UEFI Firmware to jump to ArmPlatformPkg/PrePeiCore entrypoint +# + +[Rule.Common.SEC] + FILE SEC =3D $(NAMED_GUID) RELOCS_STRIPPED FIXED { + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME).e= fi + } + +[Rule.Common.PEI_CORE] + FILE PEI_CORE =3D $(NAMED_GUID) FIXED { + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME).e= fi + UI STRING =3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.PEIM] + FILE PEIM =3D $(NAMED_GUID) FIXED { + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).dep= ex + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME).e= fi + UI STRING=3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.PEIM.TIANOCOMPRESSED] + FILE PEIM =3D $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).dep= ex + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED =3D = TRUE { + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + } + +[Rule.Common.DXE_CORE] + FILE DXE_CORE =3D $(NAMED_GUID) { + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.UEFI_DRIVER] + FILE DRIVER =3D $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_= NAME).depex + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.DXE_DRIVER] + FILE DRIVER =3D $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_= NAME).depex + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.DXE_RUNTIME_DRIVER] + FILE DRIVER =3D $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_= NAME).depex + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.UEFI_APPLICATION] + FILE APPLICATION =3D $(NAMED_GUID) { + UI STRING =3D"$(MODULE_NAME)" Optional + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + } + +[Rule.Common.UEFI_DRIVER.BINARY] + FILE DRIVER =3D $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING=3D"$(MODULE_NAME)" Optional + VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_NUM= BER) + } + +[Rule.Common.UEFI_APPLICATION.BINARY] + FILE APPLICATION =3D $(NAMED_GUID) { + PE32 PE32 |.efi + UI STRING=3D"$(MODULE_NAME)" Optional + VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_NUM= BER) + } --=20 2.7.4