From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 604D82097213D for ; Tue, 17 Jul 2018 03:01:38 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Jul 2018 03:01:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,365,1526367600"; d="scan'208";a="72033787" Received: from ray-dev.ccr.corp.intel.com (HELO [10.239.9.4]) ([10.239.9.4]) by fmsmga004.fm.intel.com with ESMTP; 17 Jul 2018 03:01:33 -0700 To: edk2-devel@lists.01.org References: <20180716030851.13752-1-eric.dong@intel.com> <20180716030851.13752-4-eric.dong@intel.com> From: "Ni, Ruiyu" Message-ID: <160a365d-309d-643c-696d-cb80b4ee5660@Intel.com> Date: Tue, 17 Jul 2018 18:02:05 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.9.0 MIME-Version: 1.0 In-Reply-To: <20180716030851.13752-4-eric.dong@intel.com> Subject: Re: [Patch v3 3/3] UefiCpuPkg/MpInitLib: Load uCode once for each core. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 Jul 2018 10:01:38 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 7/16/2018 11:08 AM, Eric Dong wrote: > GetProcessorLocationByApicId (GetInitialApicId (), NULL, NULL, &ThreadId); > + if (ThreadId != 0) { > + // > + // Skip loading microcode if it is not the first thread in one core. > + // > + return; > + } > + Eric, Is it possible that Thread#0 is disabled while Thread#1 is enabled? It may cause the certain core with no uCode applied. -- Thanks, Ray