From: "Masami Hiramatsu" <masami.hiramatsu@linaro.org>
To: Ard Biesheuvel <ardb@kernel.org>, Leif Lindholm <leif@nuviainc.com>
Cc: devel@edk2.groups.io,
Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>,
Masahisa Kojima <masahisa.kojima@linaro.org>
Subject: [PATCH v2 1/5] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy
Date: Fri, 3 Dec 2021 17:12:22 +0900 [thread overview]
Message-ID: <163851914200.1636051.8878791399296298132.stgit@localhost> (raw)
In-Reply-To: <163851913341.1636051.3357297397950801289.stgit@localhost>
If an EFI application frequently repeats SetTime and GetTime,
the I2C bus can be busy and failed to start. To fix this issue,
add waiting loop for the bus busy status. (Usually, it is
enough to read 3 times for checking, but for safety this
sets 10 for timeout.)
This also clean up the code path a bit so that it is easy to
understand what should do on each combinations of BSR.BB and
BCR.MSS.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reported-by: Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>
---
Changes in v2:
- Rename WAIT_FOR_BUS_BUSY_TIMEOUT to WAIT_FOR_BUS_READY_TIMEOUT
- Fix indentation.
---
.../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 ++++++++++++++------
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
index 31f6e3072f..918a9e7752 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
@@ -16,6 +16,8 @@
//
#define WAIT_FOR_INTERRUPT_TIMEOUT 50000
+#define WAIT_FOR_BUS_READY_TIMEOUT 10
+
/**
Set the frequency for the I2C clock line.
@@ -152,6 +154,7 @@ SynQuacerI2cMasterStart (
IN EFI_I2C_OPERATION *Op
)
{
+ UINTN Timeout = WAIT_FOR_BUS_READY_TIMEOUT;
UINT8 Bsr;
UINT8 Bcr;
@@ -167,24 +170,35 @@ SynQuacerI2cMasterStart (
Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR);
- if ((Bsr & F_I2C_BSR_BB) && !(Bcr & F_I2C_BCR_MSS)) {
- DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
- return EFI_ALREADY_STARTED;
- }
+ if (!(Bcr & F_I2C_BCR_MSS)) {
- if (Bsr & F_I2C_BSR_BB) { // Bus is busy
- DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
- MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
- } else {
- if (Bcr & F_I2C_BCR_MSS) {
- DEBUG ((DEBUG_WARN,
- "%a: is not in master mode\n", __FUNCTION__));
- return EFI_DEVICE_ERROR;
+ if (Bsr & F_I2C_BSR_BB) { // Bus is busy
+ do {
+ Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
+ } while (Timeout-- && (Bsr & F_I2C_BSR_BB));
+
+ if (Bsr & F_I2C_BSR_BB) {
+ DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
+ return EFI_ALREADY_STARTED;
+ }
}
+
DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __FUNCTION__));
MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR,
Bcr | F_I2C_BCR_MSS | F_I2C_BCR_INTE | F_I2C_BCR_BEIE);
+
+ } else { // F_I2C_BCR_MSS is set
+
+ if (!(Bsr & F_I2C_BSR_BB)) {
+ DEBUG ((DEBUG_WARN,
+ "%a: is not in master mode\n", __FUNCTION__));
+ return EFI_DEVICE_ERROR;
+ }
+
+ DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
+ MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
}
+
return EFI_SUCCESS;
}
next prev parent reply other threads:[~2021-12-03 8:12 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-03 8:12 [PATCH v2 0/5] Series short description Masami Hiramatsu
2021-12-03 8:12 ` Masami Hiramatsu [this message]
2021-12-03 8:12 ` [PATCH v2 2/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number Masami Hiramatsu
2021-12-03 8:12 ` [PATCH v2 3/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width Masami Hiramatsu
2021-12-03 8:12 ` [PATCH v2 4/5] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks Masami Hiramatsu
2021-12-03 8:12 ` [PATCH v2 5/5] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table Masami Hiramatsu
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