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* [PATCH v2 0/5] Series short description
@ 2021-12-03  8:12 Masami Hiramatsu
  2021-12-03  8:12 ` [PATCH v2 1/5] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy Masami Hiramatsu
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: Masami Hiramatsu @ 2021-12-03  8:12 UTC (permalink / raw)
  To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima

Hi Leif and Ard,

Here are the 2nd version of the series to fix some issues on the
DeveloperBox. I fixed some patches according to the Leif's comment.

I also dropped the last variable area update patch, because the
release number discussion is still continuing on the previous thread.
Anyway, the fixes for otheer patches are ready. So I send the series
without it.

Thank you,

---

Masami Hiramatsu (5):
      [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy
      [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number
      [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width
      [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks
      [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table


 .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf  |    2 +
 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc   |   70 ++++++++++++++++++++
 Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc   |    6 +-
 .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c      |   38 +++++++----
 .../SynQuacerPlatformFlashAccessLib.c              |    2 -
 5 files changed, 102 insertions(+), 16 deletions(-)
 create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc

--
Masami Hiramatsu <masami.hiramatsu@linaro.org>

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2 1/5] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy
  2021-12-03  8:12 [PATCH v2 0/5] Series short description Masami Hiramatsu
@ 2021-12-03  8:12 ` Masami Hiramatsu
  2021-12-03  8:12 ` [PATCH v2 2/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number Masami Hiramatsu
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Masami Hiramatsu @ 2021-12-03  8:12 UTC (permalink / raw)
  To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima

If an EFI application frequently repeats SetTime and GetTime,
the I2C bus can be busy and failed to start. To fix this issue,
add waiting loop for the bus busy status. (Usually, it is
enough to read 3 times for checking, but for safety this
sets 10 for timeout.)

This also clean up the code path a bit so that it is easy to
understand what should do on each combinations of BSR.BB and
BCR.MSS.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reported-by: Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>
---
 Changes in v2:
  - Rename WAIT_FOR_BUS_BUSY_TIMEOUT to WAIT_FOR_BUS_READY_TIMEOUT
  - Fix indentation.
---
 .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c      |   38 ++++++++++++++------
 1 file changed, 26 insertions(+), 12 deletions(-)

diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
index 31f6e3072f..918a9e7752 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
@@ -16,6 +16,8 @@
 //
 #define WAIT_FOR_INTERRUPT_TIMEOUT    50000
 
+#define WAIT_FOR_BUS_READY_TIMEOUT       10
+
 /**
   Set the frequency for the I2C clock line.
 
@@ -152,6 +154,7 @@ SynQuacerI2cMasterStart (
   IN  EFI_I2C_OPERATION           *Op
   )
 {
+  UINTN                       Timeout = WAIT_FOR_BUS_READY_TIMEOUT;
   UINT8                       Bsr;
   UINT8                       Bcr;
 
@@ -167,24 +170,35 @@ SynQuacerI2cMasterStart (
   Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
   Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR);
 
-  if ((Bsr & F_I2C_BSR_BB) && !(Bcr & F_I2C_BCR_MSS)) {
-    DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
-    return EFI_ALREADY_STARTED;
-  }
+  if (!(Bcr & F_I2C_BCR_MSS)) {
 
-  if (Bsr & F_I2C_BSR_BB) { // Bus is busy
-    DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
-    MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
-  } else {
-    if (Bcr & F_I2C_BCR_MSS) {
-      DEBUG ((DEBUG_WARN,
-        "%a: is not in master mode\n", __FUNCTION__));
-      return EFI_DEVICE_ERROR;
+    if (Bsr & F_I2C_BSR_BB) { // Bus is busy
+        do {
+          Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
+        } while (Timeout-- && (Bsr & F_I2C_BSR_BB));
+
+        if (Bsr & F_I2C_BSR_BB) {
+          DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
+          return EFI_ALREADY_STARTED;
+        }
     }
+
     DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __FUNCTION__));
     MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR,
                 Bcr | F_I2C_BCR_MSS | F_I2C_BCR_INTE | F_I2C_BCR_BEIE);
+
+  } else { // F_I2C_BCR_MSS is set
+
+    if (!(Bsr & F_I2C_BSR_BB)) {
+      DEBUG ((DEBUG_WARN,
+        "%a: is not in master mode\n", __FUNCTION__));
+      return EFI_DEVICE_ERROR;
+    }
+
+    DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
+    MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
   }
+
   return EFI_SUCCESS;
 }
 


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2 2/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number
  2021-12-03  8:12 [PATCH v2 0/5] Series short description Masami Hiramatsu
  2021-12-03  8:12 ` [PATCH v2 1/5] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy Masami Hiramatsu
@ 2021-12-03  8:12 ` Masami Hiramatsu
  2021-12-03  8:12 ` [PATCH v2 3/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width Masami Hiramatsu
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Masami Hiramatsu @ 2021-12-03  8:12 UTC (permalink / raw)
  To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima

This fixes Socionext DeveloperBox GenericWatchdog interrupt
number to 93 instead of 94. Since the 93 is the default interrupt
number defined in ArmPkg/ArmPkg.dec, this doesn't redefine
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reported-by: Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>
---
 Changes in v2:
   - Just focus on using PcdGenericWatchdogEl2IntrNum in Gtdt.aslc
---
 .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf  |    1 +
 Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc   |    2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 96efb2d38e..886777a0fa 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -50,6 +50,7 @@
 
   gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
   gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+  gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
index c811fc5a0c..e7ab88b0a8 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
@@ -76,7 +76,7 @@ EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
   EFI_ACPI_6_0_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
     FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
     FixedPcdGet32 (PcdGenericWatchdogControlBase),
-    94,
+    FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
     0),
 };
 


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2 3/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width
  2021-12-03  8:12 [PATCH v2 0/5] Series short description Masami Hiramatsu
  2021-12-03  8:12 ` [PATCH v2 1/5] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy Masami Hiramatsu
  2021-12-03  8:12 ` [PATCH v2 2/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number Masami Hiramatsu
@ 2021-12-03  8:12 ` Masami Hiramatsu
  2021-12-03  8:12 ` [PATCH v2 4/5] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks Masami Hiramatsu
  2021-12-03  8:12 ` [PATCH v2 5/5] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table Masami Hiramatsu
  4 siblings, 0 replies; 6+ messages in thread
From: Masami Hiramatsu @ 2021-12-03  8:12 UTC (permalink / raw)
  To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima

Since the RefreshFramePhysicalAddress and
WatchdogControlFramePhysicalAddress fields are defined as UINT64
in EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE data structure,
and both of gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase and
gArmTokenSpaceGuid.PcdGenericWatchdogControlBase are defined as
UINT64, FixedPcdGet64() should be used for reading and setting
those parameters.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
---
 Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
index e7ab88b0a8..b045a49efa 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
@@ -74,8 +74,8 @@ EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
                                                   // UINT32 GTxCommonFlags
   },
   EFI_ACPI_6_0_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
-    FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
-    FixedPcdGet32 (PcdGenericWatchdogControlBase),
+    FixedPcdGet64 (PcdGenericWatchdogRefreshBase),
+    FixedPcdGet64 (PcdGenericWatchdogControlBase),
     FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
     0),
 };


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2 4/5] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks
  2021-12-03  8:12 [PATCH v2 0/5] Series short description Masami Hiramatsu
                   ` (2 preceding siblings ...)
  2021-12-03  8:12 ` [PATCH v2 3/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width Masami Hiramatsu
@ 2021-12-03  8:12 ` Masami Hiramatsu
  2021-12-03  8:12 ` [PATCH v2 5/5] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table Masami Hiramatsu
  4 siblings, 0 replies; 6+ messages in thread
From: Masami Hiramatsu @ 2021-12-03  8:12 UTC (permalink / raw)
  To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima

Fix the number of erase blocks by rounding up the result.
The erase blocks must include the last block covered by the
length bytes.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reported-by: Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
---
 .../SynQuacerPlatformFlashAccessLib.c              |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
index bded74dc4f..ad4021cf59 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
@@ -283,7 +283,7 @@ PerformFlashWriteWithProgress (
   DEBUG ((DEBUG_INFO, "%a: erasing 0x%llx bytes at address %llx (LBA 0x%lx)\n",
     __FUNCTION__, Length, FlashAddress, Lba));
 
-  Status = Fvb->EraseBlocks (Fvb, Lba, Length / BlockSize,
+  Status = Fvb->EraseBlocks (Fvb, Lba, (Length + BlockSize - 1) / BlockSize,
                   EFI_LBA_LIST_TERMINATOR);
   if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "%a: Fvb->EraseBlocks () failed - %r\n",


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2 5/5] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
  2021-12-03  8:12 [PATCH v2 0/5] Series short description Masami Hiramatsu
                   ` (3 preceding siblings ...)
  2021-12-03  8:12 ` [PATCH v2 4/5] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks Masami Hiramatsu
@ 2021-12-03  8:12 ` Masami Hiramatsu
  4 siblings, 0 replies; 6+ messages in thread
From: Masami Hiramatsu @ 2021-12-03  8:12 UTC (permalink / raw)
  To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima

Add DBG2 table to ACPI tables. The COM1 uart port will be used
for OS debug, and it is 16550 compatible.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
---
  Changes in v2:
   - Move Dbg2.aslc before Dsdt.asl to keep the list alphabetically sorted.
   - Use EFI_ACPI_6_3_SYSTEM_MEMORY and EFI_ACPI_6_3_BYTE for initialization.
---
 .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf  |    1 
 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc   |   70 ++++++++++++++++++++
 2 files changed, 71 insertions(+)
 create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc

diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 886777a0fa..e77d7a3056 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -19,6 +19,7 @@
 [Sources]
   AcpiTables.h
   AcpiSsdtRootPci.asl
+  Dbg2.aslc
   Dsdt.asl
   Fadt.aslc
   Gtdt.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
new file mode 100644
index 0000000000..89c9dbd998
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
@@ -0,0 +1,70 @@
+/** @file
+*  Debug Port Table (DBG2)
+*
+*  Copyright (c) 2020,2021 Linaro Ltd. All rights reserved.
+*
+*  SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/DebugPort2Table.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+#include <Platform/MemoryMap.h>
+
+#include "AcpiTables.h"
+
+#pragma pack(1)
+
+#define SYNQUACER_UART1_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M', '1', 0x00 }
+#define SQ_GAS32(Address) { EFI_ACPI_6_3_SYSTEM_MEMORY, 32, 0, EFI_ACPI_6_3_BYTE, Address }
+
+typedef struct {
+  EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+  EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE        BaseAddressRegister;
+  UINT32                                        AddressSize;
+  UINT8                                         NameSpaceString[10];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+  EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE       Description;
+  DBG2_DEBUG_DEVICE_INFORMATION                 Dbg2DeviceInfo;
+} DBG2_TABLE;
+
+
+STATIC DBG2_TABLE Dbg2 = {
+  {
+    __ACPI_HEADER (
+      EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
+      DBG2_TABLE,
+      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+    ),
+    OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+    1                                      /* NumberOfDebugPorts */
+  },
+  {
+    {
+      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
+      sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
+      1,                                   /* NumberofGenericAddressRegisters */
+      10,                                  /* NameSpaceStringLength */
+      OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
+      0,                                   /* OemDataLength */
+      0,                                   /* OemDataOffset */
+      EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
+      EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
+      {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
+      OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
+      OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
+    },
+    SQ_GAS32 (SYNQUACER_UART1_BASE),       /* BaseAddressRegister */
+    SYNQUACER_UART1_SIZE,                  /* AddressSize */
+    SYNQUACER_UART1_STR,                   /* NameSpaceString */
+  }
+};
+
+#pragma pack()
+
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+VOID* CONST ReferenceAcpiTable = &Dbg2;


^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2021-12-03  8:12 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-12-03  8:12 [PATCH v2 0/5] Series short description Masami Hiramatsu
2021-12-03  8:12 ` [PATCH v2 1/5] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy Masami Hiramatsu
2021-12-03  8:12 ` [PATCH v2 2/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number Masami Hiramatsu
2021-12-03  8:12 ` [PATCH v2 3/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width Masami Hiramatsu
2021-12-03  8:12 ` [PATCH v2 4/5] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks Masami Hiramatsu
2021-12-03  8:12 ` [PATCH v2 5/5] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table Masami Hiramatsu

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