* [PATCH v3 0/6] Series short description
@ 2021-12-10 6:50 Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 1/6] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus ready Masami Hiramatsu
` (6 more replies)
0 siblings, 7 replies; 11+ messages in thread
From: Masami Hiramatsu @ 2021-12-10 6:50 UTC (permalink / raw)
To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima
Hi Leif and Ard,
Here are the 3rd version of the series to fix some issues on the
DeveloperBox. In this version, I fixed the [1/6] for the line
ending issue (sorry about this, I forgot to update the basement
tree), and add NvStorage expanding patch [6/6/] again with the
lowest supported firmware version and build option.
I hope this fits what you thought.
Thank you,
---
Masami Hiramatsu (6):
[edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus ready
[edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number
[edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width
[edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks
[edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
[edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes
.../Socionext/DeveloperBox/DeveloperBox.dsc.inc | 9 ++-
.../Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 2 +
Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 ++++++++++++++++++++
Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc | 6 +-
.../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 +++++++----
.../SynQuacerPlatformFlashAccessLib.c | 2 -
Silicon/Socionext/SynQuacer/SynQuacer.dec | 4 +
7 files changed, 114 insertions(+), 17 deletions(-)
create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
--
Masami Hiramatsu <masami.hiramatsu@linaro.org>
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 1/6] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus ready
2021-12-10 6:50 [PATCH v3 0/6] Series short description Masami Hiramatsu
@ 2021-12-10 6:50 ` Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 2/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number Masami Hiramatsu
` (5 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Masami Hiramatsu @ 2021-12-10 6:50 UTC (permalink / raw)
To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima
If an EFI application frequently repeats SetTime and GetTime,
the I2C bus can be busy and failed to start. To fix this issue,
add waiting loop for the bus busy status. (Usually, it is
enough to read 3 times for checking, but for safety this
sets 10 for timeout.)
This also clean up the code path a bit so that it is easy to
understand what should do on each combinations of BSR.BB and
BCR.MSS.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reported-by: Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>
---
Changes in v3:
- Fix LF to CRLF.
- Change title to wait for bus ready.
Changes in v2:
- Rename WAIT_FOR_BUS_BUSY_TIMEOUT to WAIT_FOR_BUS_READY_TIMEOUT
- Fix indentation.
---
.../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 ++++++++++++++------
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
index 8aa9799018..c8646db800 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
@@ -16,6 +16,8 @@
//
#define WAIT_FOR_INTERRUPT_TIMEOUT 50000
+#define WAIT_FOR_BUS_READY_TIMEOUT 10
+
/**
Set the frequency for the I2C clock line.
@@ -152,6 +154,7 @@ SynQuacerI2cMasterStart (
IN EFI_I2C_OPERATION *Op
)
{
+ UINTN Timeout = WAIT_FOR_BUS_READY_TIMEOUT;
UINT8 Bsr;
UINT8 Bcr;
@@ -167,24 +170,35 @@ SynQuacerI2cMasterStart (
Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR);
- if ((Bsr & F_I2C_BSR_BB) && !(Bcr & F_I2C_BCR_MSS)) {
- DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
- return EFI_ALREADY_STARTED;
- }
+ if (!(Bcr & F_I2C_BCR_MSS)) {
- if (Bsr & F_I2C_BSR_BB) { // Bus is busy
- DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
- MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
- } else {
- if (Bcr & F_I2C_BCR_MSS) {
- DEBUG ((DEBUG_WARN,
- "%a: is not in master mode\n", __FUNCTION__));
- return EFI_DEVICE_ERROR;
+ if (Bsr & F_I2C_BSR_BB) { // Bus is busy
+ do {
+ Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
+ } while (Timeout-- && (Bsr & F_I2C_BSR_BB));
+
+ if (Bsr & F_I2C_BSR_BB) {
+ DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
+ return EFI_ALREADY_STARTED;
+ }
}
+
DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __FUNCTION__));
MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR,
Bcr | F_I2C_BCR_MSS | F_I2C_BCR_INTE | F_I2C_BCR_BEIE);
+
+ } else { // F_I2C_BCR_MSS is set
+
+ if (!(Bsr & F_I2C_BSR_BB)) {
+ DEBUG ((DEBUG_WARN,
+ "%a: is not in master mode\n", __FUNCTION__));
+ return EFI_DEVICE_ERROR;
+ }
+
+ DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
+ MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
}
+
return EFI_SUCCESS;
}
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 2/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number
2021-12-10 6:50 [PATCH v3 0/6] Series short description Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 1/6] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus ready Masami Hiramatsu
@ 2021-12-10 6:50 ` Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 3/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width Masami Hiramatsu
` (4 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Masami Hiramatsu @ 2021-12-10 6:50 UTC (permalink / raw)
To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima
This fixes Socionext DeveloperBox GenericWatchdog interrupt
number to 93 instead of 94. Since the 93 is the default interrupt
number defined in ArmPkg/ArmPkg.dec, this doesn't redefine
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reported-by: Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>
---
Changes in v2:
- Just focus on using PcdGenericWatchdogEl2IntrNum in Gtdt.aslc
---
.../Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 1 +
Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 96efb2d38e..886777a0fa 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -50,6 +50,7 @@
gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
index c811fc5a0c..e7ab88b0a8 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
@@ -76,7 +76,7 @@ EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
EFI_ACPI_6_0_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
FixedPcdGet32 (PcdGenericWatchdogControlBase),
- 94,
+ FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
0),
};
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 3/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width
2021-12-10 6:50 [PATCH v3 0/6] Series short description Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 1/6] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus ready Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 2/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number Masami Hiramatsu
@ 2021-12-10 6:50 ` Masami Hiramatsu
2021-12-10 6:51 ` [PATCH v3 4/6] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks Masami Hiramatsu
` (3 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Masami Hiramatsu @ 2021-12-10 6:50 UTC (permalink / raw)
To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima
Since the RefreshFramePhysicalAddress and
WatchdogControlFramePhysicalAddress fields are defined as UINT64
in EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE data structure,
and both of gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase and
gArmTokenSpaceGuid.PcdGenericWatchdogControlBase are defined as
UINT64, FixedPcdGet64() should be used for reading and setting
those parameters.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
---
Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
index e7ab88b0a8..b045a49efa 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
@@ -74,8 +74,8 @@ EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
// UINT32 GTxCommonFlags
},
EFI_ACPI_6_0_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
- FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
- FixedPcdGet32 (PcdGenericWatchdogControlBase),
+ FixedPcdGet64 (PcdGenericWatchdogRefreshBase),
+ FixedPcdGet64 (PcdGenericWatchdogControlBase),
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
0),
};
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 4/6] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks
2021-12-10 6:50 [PATCH v3 0/6] Series short description Masami Hiramatsu
` (2 preceding siblings ...)
2021-12-10 6:50 ` [PATCH v3 3/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width Masami Hiramatsu
@ 2021-12-10 6:51 ` Masami Hiramatsu
2021-12-10 6:51 ` [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table Masami Hiramatsu
` (2 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Masami Hiramatsu @ 2021-12-10 6:51 UTC (permalink / raw)
To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima
Fix the number of erase blocks by rounding up the result.
The erase blocks must include the last block covered by the
length bytes.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reported-by: Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
---
.../SynQuacerPlatformFlashAccessLib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
index bded74dc4f..ad4021cf59 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
@@ -283,7 +283,7 @@ PerformFlashWriteWithProgress (
DEBUG ((DEBUG_INFO, "%a: erasing 0x%llx bytes at address %llx (LBA 0x%lx)\n",
__FUNCTION__, Length, FlashAddress, Lba));
- Status = Fvb->EraseBlocks (Fvb, Lba, Length / BlockSize,
+ Status = Fvb->EraseBlocks (Fvb, Lba, (Length + BlockSize - 1) / BlockSize,
EFI_LBA_LIST_TERMINATOR);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Fvb->EraseBlocks () failed - %r\n",
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
2021-12-10 6:50 [PATCH v3 0/6] Series short description Masami Hiramatsu
` (3 preceding siblings ...)
2021-12-10 6:51 ` [PATCH v3 4/6] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks Masami Hiramatsu
@ 2021-12-10 6:51 ` Masami Hiramatsu
2022-05-23 4:58 ` Masahisa Kojima
[not found] ` <16F1A3225F3A2D28.18186@groups.io>
2021-12-10 6:51 ` [PATCH v3 6/6] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes Masami Hiramatsu
[not found] ` <16BF521F7F10ACBB.29912@groups.io>
6 siblings, 2 replies; 11+ messages in thread
From: Masami Hiramatsu @ 2021-12-10 6:51 UTC (permalink / raw)
To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima
Add DBG2 table to ACPI tables. The COM1 uart port will be used
for OS debug, and it is 16550 compatible.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
---
Changes in v2:
- Move Dbg2.aslc before Dsdt.asl to keep the list alphabetically sorted.
- Use EFI_ACPI_6_3_SYSTEM_MEMORY and EFI_ACPI_6_3_BYTE for initialization.
---
.../Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 1
Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 ++++++++++++++++++++
2 files changed, 71 insertions(+)
create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 886777a0fa..e77d7a3056 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -19,6 +19,7 @@
[Sources]
AcpiTables.h
AcpiSsdtRootPci.asl
+ Dbg2.aslc
Dsdt.asl
Fadt.aslc
Gtdt.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
new file mode 100644
index 0000000000..89c9dbd998
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
@@ -0,0 +1,70 @@
+/** @file
+* Debug Port Table (DBG2)
+*
+* Copyright (c) 2020,2021 Linaro Ltd. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/DebugPort2Table.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+#include <Platform/MemoryMap.h>
+
+#include "AcpiTables.h"
+
+#pragma pack(1)
+
+#define SYNQUACER_UART1_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M', '1', 0x00 }
+#define SQ_GAS32(Address) { EFI_ACPI_6_3_SYSTEM_MEMORY, 32, 0, EFI_ACPI_6_3_BYTE, Address }
+
+typedef struct {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+ EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
+ UINT32 AddressSize;
+ UINT8 NameSpaceString[10];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+ EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
+ DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo;
+} DBG2_TABLE;
+
+
+STATIC DBG2_TABLE Dbg2 = {
+ {
+ __ACPI_HEADER (
+ EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
+ DBG2_TABLE,
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+ ),
+ OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+ 1 /* NumberOfDebugPorts */
+ },
+ {
+ {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
+ sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
+ 1, /* NumberofGenericAddressRegisters */
+ 10, /* NameSpaceStringLength */
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
+ 0, /* OemDataLength */
+ 0, /* OemDataOffset */
+ EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
+ },
+ SQ_GAS32 (SYNQUACER_UART1_BASE), /* BaseAddressRegister */
+ SYNQUACER_UART1_SIZE, /* AddressSize */
+ SYNQUACER_UART1_STR, /* NameSpaceString */
+ }
+};
+
+#pragma pack()
+
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+VOID* CONST ReferenceAcpiTable = &Dbg2;
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 6/6] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes
2021-12-10 6:50 [PATCH v3 0/6] Series short description Masami Hiramatsu
` (4 preceding siblings ...)
2021-12-10 6:51 ` [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table Masami Hiramatsu
@ 2021-12-10 6:51 ` Masami Hiramatsu
[not found] ` <16BF521F7F10ACBB.29912@groups.io>
6 siblings, 0 replies; 11+ messages in thread
From: Masami Hiramatsu @ 2021-12-10 6:51 UTC (permalink / raw)
To: Ard Biesheuvel, Leif Lindholm; +Cc: devel, Kazuhiko Sakamoto, Masahisa Kojima
Add "EXPAND_NVSTORAGE" build option to expand NvStorage Variable
size and FTW spare/working size for the DeveloperBox platform.
Since the size of the NvStorage VariableSize is not enough
large, FWTS uefirttime test, which updates the NV
variables in runtime, failes. This expands the size to fix
this issue.
Note that this is not compatible with previous variable layout
on NOR flash, if this option is enabled, the
PcdLowestSupportedFirmwareVersion is set to 0x400 (1024).
Since the DeveloperBox platform uses the "BUILD_NUMBER" build
option for the firmware version (PcdFirmwareRevision),
firmware builder must ensure followings;
- if the EXPAND_NVSTORAGE=1, BUILD_NUMBER must be bigger than
1024,
- Or, the BUILD_NUMBER must be less than 1024.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reported-by: Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>
---
Changes in v3:
- Expand the NvStorage size with build option.
- Update the PcdLowestSupportedFirmwareVersion.
---
.../Socionext/DeveloperBox/DeveloperBox.dsc.inc | 9 ++++++++-
Silicon/Socionext/SynQuacer/SynQuacer.dec | 4 ++++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc
index c034c0a32c..40d0baaa30 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc
@@ -280,12 +280,19 @@
gFip006DxeTokenSpaceGuid.PcdFip006DxeMemBaseAddress|0x08000000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x08400000
+!if $(EXPAND_NVSTORAGE) == 1
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00080000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x08480000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00080000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08500000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00080000
+!else
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x08410000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08420000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
-
+!endif
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"SNI "
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x52434155514e5953 # SYNQUACR
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO
diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
index 401ac4e78d..bccb88bcca 100644
--- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
+++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
@@ -41,7 +41,11 @@
gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock|62500000|UINT32|0x00000005
# for capsule update
+!if $(EXPAND_NVSTORAGE) == 1
+ gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x00000400
+!else
gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x00000009
+!endif
# for SMBIOS Type17
gSynQuacerTokenSpaceGuid.PcdStoredSpdDDR4Address|0|UINT32|0x0000000A
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [edk2-devel] [PATCH v3 6/6] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes
[not found] ` <16BF521F7F10ACBB.29912@groups.io>
@ 2021-12-13 9:15 ` Masami Hiramatsu
0 siblings, 0 replies; 11+ messages in thread
From: Masami Hiramatsu @ 2021-12-13 9:15 UTC (permalink / raw)
To: devel, masami.hiramatsu
Cc: Ard Biesheuvel, Leif Lindholm, Kazuhiko Sakamoto, Masahisa Kojima
2021年12月10日(金) 15:51 Masami Hiramatsu via groups.io
<masami.hiramatsu=linaro.org@groups.io>:
> --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
> +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> @@ -41,7 +41,11 @@
> gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock|62500000|UINT32|0x00000005
>
> # for capsule update
> +!if $(EXPAND_NVSTORAGE) == 1
> + gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x00000400
> +!else
> gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x00000009
> +!endif
Oops, this may cause a build error.
build.py...
/home/mhiramat/firmware/edk2-platforms/Silicon/Socionext/SynQuacer/SynQuacer.dec(44):
error 3000: No token space GUID or PCD name specified
!if $(EXPAND_NVSTORAGE) == 1
(<TokenSpaceGuidCName>.<PcdCName>|<DefaultValue>|<DatumType>|<Token>)
Can't we use any macros in .dec file?
Thank you,
>
> # for SMBIOS Type17
> gSynQuacerTokenSpaceGuid.PcdStoredSpdDDR4Address|0|UINT32|0x0000000A
>
>
>
>
>
>
--
Masami Hiramatsu
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
2021-12-10 6:51 ` [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table Masami Hiramatsu
@ 2022-05-23 4:58 ` Masahisa Kojima
[not found] ` <16F1A3225F3A2D28.18186@groups.io>
1 sibling, 0 replies; 11+ messages in thread
From: Masahisa Kojima @ 2022-05-23 4:58 UTC (permalink / raw)
To: Leif Lindholm, Ard Biesheuvel; +Cc: devel, Kazuhiko Sakamoto
Hi Leif, Ard,
A gentle ping on this on behalf of Masami, since he left Linaro.
Thanks,
Masahisa Kojima
On Fri, 10 Dec 2021 at 15:51, Masami Hiramatsu
<masami.hiramatsu@linaro.org> wrote:
>
> Add DBG2 table to ACPI tables. The COM1 uart port will be used
> for OS debug, and it is 16550 compatible.
>
> Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
> ---
> Changes in v2:
> - Move Dbg2.aslc before Dsdt.asl to keep the list alphabetically sorted.
> - Use EFI_ACPI_6_3_SYSTEM_MEMORY and EFI_ACPI_6_3_BYTE for initialization.
> ---
> .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 1
> Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 ++++++++++++++++++++
> 2 files changed, 71 insertions(+)
> create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
>
> diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> index 886777a0fa..e77d7a3056 100644
> --- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> +++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> @@ -19,6 +19,7 @@
> [Sources]
> AcpiTables.h
> AcpiSsdtRootPci.asl
> + Dbg2.aslc
> Dsdt.asl
> Fadt.aslc
> Gtdt.aslc
> diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> new file mode 100644
> index 0000000000..89c9dbd998
> --- /dev/null
> +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> @@ -0,0 +1,70 @@
> +/** @file
> +* Debug Port Table (DBG2)
> +*
> +* Copyright (c) 2020,2021 Linaro Ltd. All rights reserved.
> +*
> +* SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +#include <IndustryStandard/Acpi.h>
> +#include <IndustryStandard/DebugPort2Table.h>
> +#include <Library/AcpiLib.h>
> +#include <Library/PcdLib.h>
> +#include <Platform/MemoryMap.h>
> +
> +#include "AcpiTables.h"
> +
> +#pragma pack(1)
> +
> +#define SYNQUACER_UART1_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M', '1', 0x00 }
> +#define SQ_GAS32(Address) { EFI_ACPI_6_3_SYSTEM_MEMORY, 32, 0, EFI_ACPI_6_3_BYTE, Address }
> +
> +typedef struct {
> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
> + EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
> + UINT32 AddressSize;
> + UINT8 NameSpaceString[10];
> +} DBG2_DEBUG_DEVICE_INFORMATION;
> +
> +typedef struct {
> + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
> + DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo;
> +} DBG2_TABLE;
> +
> +
> +STATIC DBG2_TABLE Dbg2 = {
> + {
> + __ACPI_HEADER (
> + EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
> + DBG2_TABLE,
> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
> + ),
> + OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
> + 1 /* NumberOfDebugPorts */
> + },
> + {
> + {
> + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
> + sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
> + 1, /* NumberofGenericAddressRegisters */
> + 10, /* NameSpaceStringLength */
> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
> + 0, /* OemDataLength */
> + 0, /* OemDataOffset */
> + EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
> + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
> + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
> + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
> + },
> + SQ_GAS32 (SYNQUACER_UART1_BASE), /* BaseAddressRegister */
> + SYNQUACER_UART1_SIZE, /* AddressSize */
> + SYNQUACER_UART1_STR, /* NameSpaceString */
> + }
> +};
> +
> +#pragma pack()
> +
> +// Reference the table being generated to prevent the optimizer from removing
> +// the data structure from the executable
> +VOID* CONST ReferenceAcpiTable = &Dbg2;
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [edk2-devel] [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
[not found] ` <16F1A3225F3A2D28.18186@groups.io>
@ 2022-07-12 1:42 ` Masahisa Kojima
2022-07-22 16:54 ` Ard Biesheuvel
0 siblings, 1 reply; 11+ messages in thread
From: Masahisa Kojima @ 2022-07-12 1:42 UTC (permalink / raw)
To: Leif Lindholm, Ard Biesheuvel; +Cc: devel, Kazuhiko Sakamoto, Jaswinder Singh
Hi Leif, Ard,
A gentle ping again on this.
Thanks,
Masahisa Kojima
On Mon, 23 May 2022 at 13:58, Masahisa Kojima via groups.io
<masahisa.kojima=linaro.org@groups.io> wrote:
>
> Hi Leif, Ard,
>
> A gentle ping on this on behalf of Masami, since he left Linaro.
>
> Thanks,
> Masahisa Kojima
>
>
> On Fri, 10 Dec 2021 at 15:51, Masami Hiramatsu
> <masami.hiramatsu@linaro.org> wrote:
> >
> > Add DBG2 table to ACPI tables. The COM1 uart port will be used
> > for OS debug, and it is 16550 compatible.
> >
> > Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
> > ---
> > Changes in v2:
> > - Move Dbg2.aslc before Dsdt.asl to keep the list alphabetically sorted.
> > - Use EFI_ACPI_6_3_SYSTEM_MEMORY and EFI_ACPI_6_3_BYTE for initialization.
> > ---
> > .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 1
> > Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 ++++++++++++++++++++
> > 2 files changed, 71 insertions(+)
> > create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> >
> > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > index 886777a0fa..e77d7a3056 100644
> > --- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > @@ -19,6 +19,7 @@
> > [Sources]
> > AcpiTables.h
> > AcpiSsdtRootPci.asl
> > + Dbg2.aslc
> > Dsdt.asl
> > Fadt.aslc
> > Gtdt.aslc
> > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> > new file mode 100644
> > index 0000000000..89c9dbd998
> > --- /dev/null
> > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> > @@ -0,0 +1,70 @@
> > +/** @file
> > +* Debug Port Table (DBG2)
> > +*
> > +* Copyright (c) 2020,2021 Linaro Ltd. All rights reserved.
> > +*
> > +* SPDX-License-Identifier: BSD-2-Clause-Patent
> > +*
> > +**/
> > +#include <IndustryStandard/Acpi.h>
> > +#include <IndustryStandard/DebugPort2Table.h>
> > +#include <Library/AcpiLib.h>
> > +#include <Library/PcdLib.h>
> > +#include <Platform/MemoryMap.h>
> > +
> > +#include "AcpiTables.h"
> > +
> > +#pragma pack(1)
> > +
> > +#define SYNQUACER_UART1_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M', '1', 0x00 }
> > +#define SQ_GAS32(Address) { EFI_ACPI_6_3_SYSTEM_MEMORY, 32, 0, EFI_ACPI_6_3_BYTE, Address }
> > +
> > +typedef struct {
> > + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
> > + EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
> > + UINT32 AddressSize;
> > + UINT8 NameSpaceString[10];
> > +} DBG2_DEBUG_DEVICE_INFORMATION;
> > +
> > +typedef struct {
> > + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
> > + DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo;
> > +} DBG2_TABLE;
> > +
> > +
> > +STATIC DBG2_TABLE Dbg2 = {
> > + {
> > + __ACPI_HEADER (
> > + EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
> > + DBG2_TABLE,
> > + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
> > + ),
> > + OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
> > + 1 /* NumberOfDebugPorts */
> > + },
> > + {
> > + {
> > + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
> > + sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
> > + 1, /* NumberofGenericAddressRegisters */
> > + 10, /* NameSpaceStringLength */
> > + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
> > + 0, /* OemDataLength */
> > + 0, /* OemDataOffset */
> > + EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
> > + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
> > + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
> > + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
> > + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
> > + },
> > + SQ_GAS32 (SYNQUACER_UART1_BASE), /* BaseAddressRegister */
> > + SYNQUACER_UART1_SIZE, /* AddressSize */
> > + SYNQUACER_UART1_STR, /* NameSpaceString */
> > + }
> > +};
> > +
> > +#pragma pack()
> > +
> > +// Reference the table being generated to prevent the optimizer from removing
> > +// the data structure from the executable
> > +VOID* CONST ReferenceAcpiTable = &Dbg2;
> >
>
>
>
>
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [edk2-devel] [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
2022-07-12 1:42 ` [edk2-devel] " Masahisa Kojima
@ 2022-07-22 16:54 ` Ard Biesheuvel
0 siblings, 0 replies; 11+ messages in thread
From: Ard Biesheuvel @ 2022-07-22 16:54 UTC (permalink / raw)
To: edk2-devel-groups-io, Masahisa Kojima
Cc: Leif Lindholm, Ard Biesheuvel, Kazuhiko Sakamoto, Jaswinder Singh
On Tue, 12 Jul 2022 at 03:43, Masahisa Kojima
<masahisa.kojima@linaro.org> wrote:
>
> Hi Leif, Ard,
>
> A gentle ping again on this.
>
Merged as 2f5e841018d9..86759a1bf829
My apologies for the delay.
--
Ard.
>
>
> On Mon, 23 May 2022 at 13:58, Masahisa Kojima via groups.io
> <masahisa.kojima=linaro.org@groups.io> wrote:
> >
> > Hi Leif, Ard,
> >
> > A gentle ping on this on behalf of Masami, since he left Linaro.
> >
> > Thanks,
> > Masahisa Kojima
> >
> >
> > On Fri, 10 Dec 2021 at 15:51, Masami Hiramatsu
> > <masami.hiramatsu@linaro.org> wrote:
> > >
> > > Add DBG2 table to ACPI tables. The COM1 uart port will be used
> > > for OS debug, and it is 16550 compatible.
> > >
> > > Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
> > > ---
> > > Changes in v2:
> > > - Move Dbg2.aslc before Dsdt.asl to keep the list alphabetically sorted.
> > > - Use EFI_ACPI_6_3_SYSTEM_MEMORY and EFI_ACPI_6_3_BYTE for initialization.
> > > ---
> > > .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 1
> > > Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 ++++++++++++++++++++
> > > 2 files changed, 71 insertions(+)
> > > create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> > >
> > > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > > index 886777a0fa..e77d7a3056 100644
> > > --- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > > @@ -19,6 +19,7 @@
> > > [Sources]
> > > AcpiTables.h
> > > AcpiSsdtRootPci.asl
> > > + Dbg2.aslc
> > > Dsdt.asl
> > > Fadt.aslc
> > > Gtdt.aslc
> > > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> > > new file mode 100644
> > > index 0000000000..89c9dbd998
> > > --- /dev/null
> > > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> > > @@ -0,0 +1,70 @@
> > > +/** @file
> > > +* Debug Port Table (DBG2)
> > > +*
> > > +* Copyright (c) 2020,2021 Linaro Ltd. All rights reserved.
> > > +*
> > > +* SPDX-License-Identifier: BSD-2-Clause-Patent
> > > +*
> > > +**/
> > > +#include <IndustryStandard/Acpi.h>
> > > +#include <IndustryStandard/DebugPort2Table.h>
> > > +#include <Library/AcpiLib.h>
> > > +#include <Library/PcdLib.h>
> > > +#include <Platform/MemoryMap.h>
> > > +
> > > +#include "AcpiTables.h"
> > > +
> > > +#pragma pack(1)
> > > +
> > > +#define SYNQUACER_UART1_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M', '1', 0x00 }
> > > +#define SQ_GAS32(Address) { EFI_ACPI_6_3_SYSTEM_MEMORY, 32, 0, EFI_ACPI_6_3_BYTE, Address }
> > > +
> > > +typedef struct {
> > > + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
> > > + EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
> > > + UINT32 AddressSize;
> > > + UINT8 NameSpaceString[10];
> > > +} DBG2_DEBUG_DEVICE_INFORMATION;
> > > +
> > > +typedef struct {
> > > + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
> > > + DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo;
> > > +} DBG2_TABLE;
> > > +
> > > +
> > > +STATIC DBG2_TABLE Dbg2 = {
> > > + {
> > > + __ACPI_HEADER (
> > > + EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
> > > + DBG2_TABLE,
> > > + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
> > > + ),
> > > + OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
> > > + 1 /* NumberOfDebugPorts */
> > > + },
> > > + {
> > > + {
> > > + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
> > > + sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
> > > + 1, /* NumberofGenericAddressRegisters */
> > > + 10, /* NameSpaceStringLength */
> > > + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
> > > + 0, /* OemDataLength */
> > > + 0, /* OemDataOffset */
> > > + EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
> > > + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
> > > + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
> > > + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
> > > + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
> > > + },
> > > + SQ_GAS32 (SYNQUACER_UART1_BASE), /* BaseAddressRegister */
> > > + SYNQUACER_UART1_SIZE, /* AddressSize */
> > > + SYNQUACER_UART1_STR, /* NameSpaceString */
> > > + }
> > > +};
> > > +
> > > +#pragma pack()
> > > +
> > > +// Reference the table being generated to prevent the optimizer from removing
> > > +// the data structure from the executable
> > > +VOID* CONST ReferenceAcpiTable = &Dbg2;
> > >
> >
> >
> >
> >
> >
>
>
>
>
>
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2022-07-22 16:54 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-12-10 6:50 [PATCH v3 0/6] Series short description Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 1/6] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus ready Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 2/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 3/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width Masami Hiramatsu
2021-12-10 6:51 ` [PATCH v3 4/6] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks Masami Hiramatsu
2021-12-10 6:51 ` [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table Masami Hiramatsu
2022-05-23 4:58 ` Masahisa Kojima
[not found] ` <16F1A3225F3A2D28.18186@groups.io>
2022-07-12 1:42 ` [edk2-devel] " Masahisa Kojima
2022-07-22 16:54 ` Ard Biesheuvel
2021-12-10 6:51 ` [PATCH v3 6/6] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes Masami Hiramatsu
[not found] ` <16BF521F7F10ACBB.29912@groups.io>
2021-12-13 9:15 ` [edk2-devel] " Masami Hiramatsu
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