From: "Masami Hiramatsu" <masami.hiramatsu@linaro.org>
To: Ard Biesheuvel <ardb@kernel.org>, Leif Lindholm <leif@nuviainc.com>
Cc: devel@edk2.groups.io,
Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>,
Masahisa Kojima <masahisa.kojima@linaro.org>
Subject: [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
Date: Fri, 10 Dec 2021 15:51:12 +0900 [thread overview]
Message-ID: <163911907249.561661.11382999726925773930.stgit@localhost> (raw)
In-Reply-To: <163911902995.561661.9429300579159746333.stgit@localhost>
Add DBG2 table to ACPI tables. The COM1 uart port will be used
for OS debug, and it is 16550 compatible.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
---
Changes in v2:
- Move Dbg2.aslc before Dsdt.asl to keep the list alphabetically sorted.
- Use EFI_ACPI_6_3_SYSTEM_MEMORY and EFI_ACPI_6_3_BYTE for initialization.
---
.../Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 1
Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 ++++++++++++++++++++
2 files changed, 71 insertions(+)
create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 886777a0fa..e77d7a3056 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -19,6 +19,7 @@
[Sources]
AcpiTables.h
AcpiSsdtRootPci.asl
+ Dbg2.aslc
Dsdt.asl
Fadt.aslc
Gtdt.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
new file mode 100644
index 0000000000..89c9dbd998
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
@@ -0,0 +1,70 @@
+/** @file
+* Debug Port Table (DBG2)
+*
+* Copyright (c) 2020,2021 Linaro Ltd. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/DebugPort2Table.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+#include <Platform/MemoryMap.h>
+
+#include "AcpiTables.h"
+
+#pragma pack(1)
+
+#define SYNQUACER_UART1_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M', '1', 0x00 }
+#define SQ_GAS32(Address) { EFI_ACPI_6_3_SYSTEM_MEMORY, 32, 0, EFI_ACPI_6_3_BYTE, Address }
+
+typedef struct {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+ EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
+ UINT32 AddressSize;
+ UINT8 NameSpaceString[10];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+ EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
+ DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo;
+} DBG2_TABLE;
+
+
+STATIC DBG2_TABLE Dbg2 = {
+ {
+ __ACPI_HEADER (
+ EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
+ DBG2_TABLE,
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+ ),
+ OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+ 1 /* NumberOfDebugPorts */
+ },
+ {
+ {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
+ sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
+ 1, /* NumberofGenericAddressRegisters */
+ 10, /* NameSpaceStringLength */
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
+ 0, /* OemDataLength */
+ 0, /* OemDataOffset */
+ EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
+ },
+ SQ_GAS32 (SYNQUACER_UART1_BASE), /* BaseAddressRegister */
+ SYNQUACER_UART1_SIZE, /* AddressSize */
+ SYNQUACER_UART1_STR, /* NameSpaceString */
+ }
+};
+
+#pragma pack()
+
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+VOID* CONST ReferenceAcpiTable = &Dbg2;
next prev parent reply other threads:[~2021-12-10 6:51 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-10 6:50 [PATCH v3 0/6] Series short description Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 1/6] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus ready Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 2/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number Masami Hiramatsu
2021-12-10 6:50 ` [PATCH v3 3/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width Masami Hiramatsu
2021-12-10 6:51 ` [PATCH v3 4/6] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks Masami Hiramatsu
2021-12-10 6:51 ` Masami Hiramatsu [this message]
2022-05-23 4:58 ` [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table Masahisa Kojima
[not found] ` <16F1A3225F3A2D28.18186@groups.io>
2022-07-12 1:42 ` [edk2-devel] " Masahisa Kojima
2022-07-22 16:54 ` Ard Biesheuvel
2021-12-10 6:51 ` [PATCH v3 6/6] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes Masami Hiramatsu
[not found] ` <16BF521F7F10ACBB.29912@groups.io>
2021-12-13 9:15 ` [edk2-devel] " Masami Hiramatsu
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