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[122.208.150.49]) by smtp.gmail.com with ESMTPSA id nv12sm1617590pjb.49.2021.12.09.22.51.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Dec 2021 22:51:23 -0800 (PST) From: "Masami Hiramatsu" To: Ard Biesheuvel , Leif Lindholm Cc: devel@edk2.groups.io, Kazuhiko Sakamoto , Masahisa Kojima Subject: [PATCH v3 6/6] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes Date: Fri, 10 Dec 2021 15:51:21 +0900 Message-Id: <163911908077.561661.9441962088868389919.stgit@localhost> X-Mailer: git-send-email 2.25.1 In-Reply-To: <163911902995.561661.9429300579159746333.stgit@localhost> References: <163911902995.561661.9429300579159746333.stgit@localhost> User-Agent: StGit/0.19 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Add "EXPAND_NVSTORAGE" build option to expand NvStorage Variable size and FTW spare/working size for the DeveloperBox platform. Since the size of the NvStorage VariableSize is not enough large, FWTS uefirttime test, which updates the NV variables in runtime, failes. This expands the size to fix this issue. Note that this is not compatible with previous variable layout on NOR flash, if this option is enabled, the PcdLowestSupportedFirmwareVersion is set to 0x400 (1024). Since the DeveloperBox platform uses the "BUILD_NUMBER" build option for the firmware version (PcdFirmwareRevision), firmware builder must ensure followings; - if the EXPAND_NVSTORAGE=1, BUILD_NUMBER must be bigger than 1024, - Or, the BUILD_NUMBER must be less than 1024. Signed-off-by: Masami Hiramatsu Reported-by: Kazuhiko Sakamoto --- Changes in v3: - Expand the NvStorage size with build option. - Update the PcdLowestSupportedFirmwareVersion. --- .../Socionext/DeveloperBox/DeveloperBox.dsc.inc | 9 ++++++++- Silicon/Socionext/SynQuacer/SynQuacer.dec | 4 ++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc index c034c0a32c..40d0baaa30 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc @@ -280,12 +280,19 @@ gFip006DxeTokenSpaceGuid.PcdFip006DxeMemBaseAddress|0x08000000 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x08400000 +!if $(EXPAND_NVSTORAGE) == 1 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00080000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x08480000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00080000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08500000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00080000 +!else gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x08410000 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08420000 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000 - +!endif gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"SNI " gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x52434155514e5953 # SYNQUACR gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec index 401ac4e78d..bccb88bcca 100644 --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -41,7 +41,11 @@ gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock|62500000|UINT32|0x00000005 # for capsule update +!if $(EXPAND_NVSTORAGE) == 1 + gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x00000400 +!else gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x00000009 +!endif # for SMBIOS Type17 gSynQuacerTokenSpaceGuid.PcdStoredSpdDDR4Address|0|UINT32|0x0000000A