From mboxrd@z Thu Jan 1 00:00:00 1970 Subject: Re: [edk2-devel] [edk2-platforms] [PATCH 1/1] Platform/Sgi: Add support to disable isolated cpus To: Sami Mujawar ,devel@edk2.groups.io From: "Nishant Sharma" X-Originating-Location: Cambridge, England, GB (94.194.35.185) X-Originating-Platform: Windows Chrome 103 User-Agent: GROUPS.IO Web Poster MIME-Version: 1.0 Date: Fri, 05 Aug 2022 04:19:42 -0700 References: <9d931162-904c-551b-7c46-8d0280863cb3@arm.com> In-Reply-To: <9d931162-904c-551b-7c46-8d0280863cb3@arm.com> Message-ID: <17470.1659698382775882818@groups.io> Content-Type: multipart/alternative; boundary="98xv8hXXwqhKRvieDDKG" --98xv8hXXwqhKRvieDDKG Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Hi Sami, Please find my response inline On Thu, Jul 28, 2022 at 06:12 PM, Sami Mujawar wrote: >=20 >=20 >=20 > Hi Nishant, >=20 >=20 >=20 > Please find my response inline marked [SAMI]. >=20 >=20 >=20 > Regards, >=20 >=20 >=20 > Sami Mujawar >=20 > On 27/07/2022 02:53 pm, Nishant Sharma wrote: >=20 >>=20 >>=20 >> Hi Sami, >> Please find my reply inline >>=20 >>=20 >>=20 >> On Thu, Jul 21, 2022 at 12:47 PM, Sami Mujawar wrote: >>=20 >>=20 >>>=20 >>>=20 >>> Hi Nishant, >>>=20 >>>=20 >>>=20 >>> Please find my response inline marked [SAMI]. >>>=20 >>>=20 >>>=20 >>> Regards, >>>=20 >>>=20 >>>=20 >>> Sami Mujawar >>>=20 >>> On 17/06/2022 07:07 am, Nishant Sharma wrote: >>>=20 >>>> Isolated CPUs are those that are not to be used on the platform for >>>> various reasons. The isolated CPU list is an array of MPID values of >>>=20 >>> [SAMI] Can you explain the use-case/reason, please? >>=20 >> [Nishant]: I will update in the next patchset. >>=20 >>>=20 >>>> the CPUs that have to be isolated. This list is supplied via the >>>> NT_FW_CONFIG dtb. >>>>=20 >>>> Add support to search for isolated CPUs MPID list and, >>>> if present, >>>> update the MADT table to disable the corresponding CPUs. >>>>=20 >>>> Signed-off-by: Nishant Sharma ( >>>> nishant.sharma@arm.com ) >>>> --- >>>>=20 >>>> Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf | 1 - >>>>=20 >>>> Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf | 8 +- >>>>=20 >>>> Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7 ++ >>>>=20 >>>> Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 131 >>>> +++++++++++++++++++- >>>>=20 >>>> Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c | 45 >>>> ++++++- >>>> 5 files changed, 186 insertions(+), 6 deletions(-) >>>>=20 >>>> diff --git >>>> a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf >>>> b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf >>>> index >>>> 4b36c3e5ceb2..e13c2f08ce6e 100644 >>>> --- >>>> a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf >>>> +++ >>>> b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf >>>> @@ -18,7 +18,6 @@ >>>>=20 >>>> Dbg2.aslc >>>>=20 >>>> Fadt.aslc >>>>=20 >>>> Gtdt.aslc >>>>=20 >>>> - Iort.aslc >>>=20 >>> [SAMI] Why is IORT table being removed here? >>=20 >> [Nishant]: I think some issue with patch generation. I will remove this >> change in the next patch. Thanks for pointing it out. >>=20 >>>=20 >>>> Mcfg.aslc >>>>=20 >>>> RdN2Cfg1/Dsdt.asl >>>>=20 >>>> RdN2Cfg1/Madt.aslc >>>>=20 >>>> diff --git >>>> a/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf >>>> b/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf >>>> index >>>> 407160c07563..fbf061ad3bdb 100644 >>>> --- >>>> a/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf >>>> +++ >>>> b/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf >>>> @@ -1,5 >>>> +1,5 @@ >>>> # >>>>=20 >>>> -# Copyright (c) 2018, ARM Limited. All rights reserved. >>>>=20 >>>> +#=20 >>>> Copyright (c) 2018-2022, ARM Limited. All rights reserved. >>>>=20 >>>> # >>>>=20 >>>> #=20 >>>> SPDX-License-Identifier: BSD-2-Clause-Patent >>>>=20 >>>> # >>>>=20 >>>> @@ -13,6 +13,7 @@ >>>> =20 >>>> ENTRY_POINT =3D SgiPlatformPeim >>>>=20 >>>> =20 >>>>=20 >>>> [Packages] >>>>=20 >>>> +=20 >>>> ArmPlatformPkg/ArmPlatformPkg.dec >>>>=20 >>>> EmbeddedPkg/EmbeddedPkg.dec >>>>=20 >>>> =20 >>>> MdePkg/MdePkg.dec >>>>=20 >>>> Platform/ARM/SgiPkg/SgiPlatform.dec >>>>=20 >>>> @@ -21,6 +22,11 >>>> @@ >>>> FdtLib >>>>=20 >>>> PeimEntryPoint >>>>=20 >>>> =20 >>>>=20 >>>> +[FixedPcd] >>>>=20 >>>> +=20 >>>> gArmSgiTokenSpaceGuid.PcdChipCount >>>>=20 >>>> +=20 >>>> gArmPlatformTokenSpaceGuid.PcdCoreCount >>>>=20 >>>> +=20 >>>> gArmPlatformTokenSpaceGuid.PcdClusterCount >>>>=20 >>>> + >>>>=20 >>>> [Sources] >>>>=20 >>>> =20 >>>> SgiPlatformPeim.c >>>>=20 >>>> =20 >>>>=20 >>>> diff --git >>>> a/Platform/ARM/SgiPkg/Include/SgiPlatform.h >>>> b/Platform/ARM/SgiPkg/Include/SgiPlatform.h >>>> index >>>> dddb58832d73..311286ce5337 100644 >>>> --- >>>> a/Platform/ARM/SgiPkg/Include/SgiPlatform.h >>>> +++ >>>> b/Platform/ARM/SgiPkg/Include/SgiPlatform.h >>>> @@ -65,11 +65,18 @@ >>>> #define >>>> DRAM_BLOCK2_BASE_REMOTE(ChipId) \ >>>>=20 >>>> (SGI_REMOTE_CHIP_MEM_OFFSET >>>> (ChipId) + FixedPcdGet64 (PcdDramBlock2Base)) >>>>=20 >>>> =20 >>>>=20 >>>> +// List of isolated >>>> CPUs MPID >>>>=20 >>>> +typedef struct { >>>>=20 >>>> + UINT64 Count; // Number >>>> of elements present in the list >>>>=20 >>>> + UINT64 Mpid[]; // List >>>> containing isolated CPU MPIDs >>>>=20 >>>> +} SGI_ISOLATED_CPU_LIST; >>>>=20 >>>> + >>>>=20 >>>> // ARM >>>> platform description data. >>>>=20 >>>> typedef struct { >>>>=20 >>>> UINTN PlatformId; >>>>=20 >>>> =20 >>>> UINTN ConfigId; >>>>=20 >>>> UINTN MultiChipMode; >>>>=20 >>>> + SGI_ISOLATED_CPU_LIST=20 >>>> IsolatedCpuList; >>>>=20 >>>> } SGI_PLATFORM_DESCRIPTOR; >>>>=20 >>>> =20 >>>>=20 >>>> // Arm SGI/RD Product >>>> IDs >>>>=20 >>>> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c >>>> b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c >>>> index >>>> 2f72e7152ff3..80190120ff32 100644 >>>> --- >>>> a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c >>>> +++ >>>> b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c >>>> @@ -1,14 +1,17 @@ >>>>=20 >>>> /** @file >>>>=20 >>>> * >>>>=20 >>>> -* Copyright (c) 2018, ARM Limited. All rights reserved. >>>>=20 >>>> +* Copyright (c) 2018 - 2022, ARM Limited. All rights reserved. >>>>=20 >>>> * >>>>=20 >>>> *=20 >>>> SPDX-License-Identifier: BSD-2-Clause-Patent >>>>=20 >>>> * >>>>=20 >>>> **/ >>>>=20 >>>> =20 >>>>=20 >>>> +#include >>>> >>>>=20 >>>> + >>>>=20 >>>> #include >>>>=20 >>>> #include >>>> >>>>=20 >>>> #include >>>>=20 >>>> +#include >>>> >>>>=20 >>>> #include >>>>=20 >>>> =20 >>>>=20 >>>> VOID >>>>=20 >>>> @@ -16,6 +19,127 @@ InitVirtioDevices ( >>>> VOID >>>>=20 >>>> ); >>>>=20 >>>> =20 >>>>=20 >>>> +/** >>>>=20 >>>> + Search >>>> for a MPID in a list >>>>=20 >>>> + >>>>=20 >>>> + Performs a linear search for a specified MPID >>>> on the given linear >>>>=20 >>>> + list of MPIDs. >>>>=20 >>>> + >>>>=20 >>>> + @param[in] MpidList=20 >>>> Pointer to list. >>>>=20 >>>> + @param[in] Count Number of the elements in the >>>> list. >>>>=20 >>>> + @param[in] Mpid Target MPID. >>>>=20 >>>> + >>>>=20 >>>> + @retval TRUE MPID is >>>> present. >>>>=20 >>>> + @retval FALSE MPID is not present. >>>>=20 >>>> +**/ >>>>=20 >>>> +STATIC >>>>=20 >>>> +BOOLEAN >>>>=20 >>>> +CheckIfMpidIsPresent ( >>>>=20 >>>> + IN UINT64 *MpidList, >>>>=20 >>>> + IN UINT64 Count, >>>>=20 >>>> + >>>> IN UINT64 Mpid >>>>=20 >>>> + ) >>>>=20 >>>> +{ >>>>=20 >>>> + UINT64 Idx; >>>>=20 >>>> + >>>>=20 >>>> + for (Idx =3D 0; Idx < >>>> Count; Idx++) { >>>>=20 >>>> + if (MpidList[Idx] =3D=3D Mpid) { >>>>=20 >>>> + return TRUE; >>>>=20 >>>> + >>>> } >>>>=20 >>>> + } >>>>=20 >>>> + >>>>=20 >>>> + return FALSE; >>>>=20 >>>> +} >>>>=20 >>>> + >>>>=20 >>>> +/** >>>>=20 >>>> + Disables isolated CPUs in >>>> the MADT table >>>>=20 >>>> + >>>>=20 >>>> + Parse the IsolatedCpuInfo from the Hob list and >>>> updates the MADT table to >>>=20 >>> [SAMI] Nit.=C2=A0 updates -> update >>=20 >> [Nishant] Will update in next patch version. >>=20 >>>=20 >>>> + disable cpu's which are not available on the platfrom. >>>>=20 >>>> + >>>>=20 >>>> +=20 >>>> @param[in] AcpiHeader Points to the Madt table. >>>>=20 >>>> + @param[in] HobData =20 >>>> Points to the unusable cpuinfo in hoblist. >>>>=20 >>>> +**/ >>>>=20 >>>> +STATIC >>>>=20 >>>> +VOID >>>>=20 >>>> +UpdateMadtTable ( >>>>=20 >>>> + IN EFI_ACPI_DESCRIPTION_HEADER *AcpiHeader, >>>>=20 >>>> + IN >>>> SGI_PLATFORM_DESCRIPTOR *HobData >>>>=20 >>>> + ) >>>>=20 >>>> +{ >>>>=20 >>>> + UINT8 >>>> *StructureListHead; >>>>=20 >>>> + UINT8 *StructureListTail; >>>>=20 >>>> +=20 >>>> EFI_ACPI_6_4_GIC_STRUCTURE *GicStructure; >>>>=20 >>>> + BOOLEAN MpidPresent; >>>>=20 >>>> + >>>>=20 >>>> +=20 >>>> if (HobData->IsolatedCpuList.Count =3D=3D 0) { >>>>=20 >>>> + return; >>>>=20 >>>> + } >>>>=20 >>>> + >>>>=20 >>>> +=20 >>>> StructureListHead =3D >>>>=20 >>>> + ((UINT8 *)AcpiHeader) + >>>>=20 >>>> + =20 >>>> sizeof(EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER); >>>>=20 >>>> +=20 >>>> StructureListTail =3D (UINT8 *)AcpiHeader + AcpiHeader->Length; >>>>=20 >>>> + >>>>=20 >>>> + // >>>> Locate ACPI GICC structure in the MADT table. >>>>=20 >>>> + while (StructureListHead >>>> < StructureListTail) { >>>>=20 >>>> + if (StructureListHead[0] =3D=3D EFI_ACPI_6_4_GIC) >>>> { >>>=20 >>>=20 >>>=20 >>> [SAMI] This is definitely not the way to parse an ACPI table. Please do= nt >>> do this. >>>=20 >>>=20 >>>=20 >>> Also, why are you not using DynamicTables framework? It is designed to >>> handle such cases. >>>=20 >>>=20 >>>=20 >>> [/SAMI] >>>=20 >>>=20 >>=20 >> [Nishant] >> Could you please add more details on what is wrong with this approach? >=20 >=20 >=20 > [SAMI] The problem is it does not work with the ACPI table below: >=20 >=20 >=20 > [snip] >=20 >=20 >=20 > /* > * Intel ACPI Component Architecture > * AML/ASL+ Disassembler version 20210930 (32-bit version) > * Copyright (c) 2000 - 2021 Intel Corporation > * > * Disassembly of apic0000.bin, Thu Jul 28 17:57:00 2022 > * > * ACPI Data Table [APIC] > * > * Format: [HexOffset DecimalOffset ByteLength]=C2=A0 FieldName : FieldVal= ue (in > hex) > */ >=20 > [000h 0000=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Signatur= e : "APIC"=C2=A0=C2=A0=C2=A0 [Multiple APIC > Description Table (MADT)] > [004h 0004=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Table Length : 000005FC > [008h 0008=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= vision : 05 > [009h 0009=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Ch= ecksum : 0B > [00Ah 0010=C2=A0=C2=A0 6]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Oem ID : "ARMLTD" > [010h 0016=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Oem Table ID : "ARMSGI=C2= =A0 " > [018h 0024=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Oem Revision : 20220728 > [01Ch 0028=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Asl Compiler ID : "ARM " > [020h 0032=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Asl C= ompiler Revision : 00002999 >=20 > [024h 0036=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 Local Apic Address : 00000000 > [028h 0040=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000000 > PC-AT Compatibility : 0 >=20 > [02Ch 0044=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [02Dh 0045=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [02Eh 0046=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [030h 0048=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [034h 0052=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 00000000 > [038h 0056=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [03Ch 0060=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [040h 0064=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [044h 0068=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [04Ch 0076=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [054h 0084=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [05Ch 0092=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [064h 0100=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [068h 0104=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [070h 0112=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000000000000 > [078h 0120=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [079h 0121=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [07Ah 0122=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [07Ch 0124=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [07Dh 0125=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [07Eh 0126=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [080h 0128=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [084h 0132=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 00000001 > [088h 0136=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [08Ch 0140=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [090h 0144=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [094h 0148=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [09Ch 0156=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [0A4h 0164=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [0ACh 0172=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [0B4h 0180=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [0B8h 0184=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [0C0h 0192=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000000010000 > [0C8h 0200=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [0C9h 0201=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [0CAh 0202=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [0CCh 0204=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [0CDh 0205=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [0CEh 0206=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [0D0h 0208=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [0D4h 0212=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 00000002 > [0D8h 0216=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [0DCh 0220=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [0E0h 0224=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [0E4h 0228=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [0ECh 0236=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [0F4h 0244=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [0FCh 0252=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [104h 0260=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [108h 0264=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [110h 0272=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000000020000 > [118h 0280=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [119h 0281=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [11Ah 0282=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [11Ch 0284=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [11Dh 0285=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [11Eh 0286=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [120h 0288=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [124h 0292=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 00000003 > [128h 0296=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [12Ch 0300=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [130h 0304=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [134h 0308=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [13Ch 0316=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [144h 0324=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [14Ch 0332=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [154h 0340=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [158h 0344=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [160h 0352=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000000030000 > [168h 0360=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [169h 0361=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [16Ah 0362=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [16Ch 0364=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [16Dh 0365=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [16Eh 0366=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [170h 0368=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [174h 0372=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 00000004 > [178h 0376=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [17Ch 0380=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [180h 0384=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [184h 0388=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [18Ch 0396=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [194h 0404=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [19Ch 0412=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [1A4h 0420=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [1A8h 0424=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [1B0h 0432=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000100000000 > [1B8h 0440=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [1B9h 0441=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [1BAh 0442=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [1BCh 0444=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [1BDh 0445=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [1BEh 0446=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [1C0h 0448=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [1C4h 0452=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 00000005 > [1C8h 0456=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [1CCh 0460=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [1D0h 0464=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [1D4h 0468=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [1DCh 0476=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [1E4h 0484=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [1ECh 0492=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [1F4h 0500=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [1F8h 0504=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [200h 0512=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000100010000 > [208h 0520=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [209h 0521=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [20Ah 0522=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [20Ch 0524=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [20Dh 0525=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [20Eh 0526=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [210h 0528=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [214h 0532=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 00000006 > [218h 0536=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [21Ch 0540=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [220h 0544=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [224h 0548=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [22Ch 0556=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [234h 0564=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [23Ch 0572=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [244h 0580=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [248h 0584=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [250h 0592=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000100020000 > [258h 0600=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [259h 0601=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [25Ah 0602=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [25Ch 0604=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [25Dh 0605=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [25Eh 0606=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [260h 0608=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [264h 0612=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 00000007 > [268h 0616=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [26Ch 0620=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [270h 0624=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [274h 0628=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [27Ch 0636=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [284h 0644=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [28Ch 0652=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [294h 0660=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [298h 0664=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [2A0h 0672=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000100030000 > [2A8h 0680=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [2A9h 0681=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [2AAh 0682=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [2ACh 0684=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [2ADh 0685=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [2AEh 0686=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [2B0h 0688=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [2B4h 0692=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 00000008 > [2B8h 0696=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [2BCh 0700=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [2C0h 0704=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [2C4h 0708=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [2CCh 0716=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [2D4h 0724=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [2DCh 0732=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [2E4h 0740=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [2E8h 0744=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [2F0h 0752=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000200000000 > [2F8h 0760=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [2F9h 0761=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [2FAh 0762=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [2FCh 0764=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [2FDh 0765=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [2FEh 0766=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [300h 0768=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [304h 0772=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 00000009 > [308h 0776=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [30Ch 0780=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [310h 0784=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [314h 0788=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [31Ch 0796=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [324h 0804=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [32Ch 0812=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [334h 0820=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [338h 0824=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [340h 0832=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000200010000 > [348h 0840=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [349h 0841=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [34Ah 0842=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [34Ch 0844=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [34Dh 0845=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [34Eh 0846=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [350h 0848=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [354h 0852=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 0000000A > [358h 0856=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [35Ch 0860=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [360h 0864=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [364h 0868=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [36Ch 0876=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [374h 0884=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [37Ch 0892=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [384h 0900=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [388h 0904=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [390h 0912=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000200020000 > [398h 0920=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [399h 0921=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [39Ah 0922=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [39Ch 0924=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [39Dh 0925=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [39Eh 0926=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [3A0h 0928=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [3A4h 0932=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 0000000B > [3A8h 0936=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [3ACh 0940=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [3B0h 0944=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [3B4h 0948=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [3BCh 0956=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [3C4h 0964=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [3CCh 0972=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [3D4h 0980=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [3D8h 0984=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [3E0h 0992=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000200030000 > [3E8h 1000=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [3E9h 1001=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [3EAh 1002=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [3ECh 1004=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [3EDh 1005=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [3EEh 1006=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [3F0h 1008=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [3F4h 1012=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 0000000C > [3F8h 1016=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [3FCh 1020=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [400h 1024=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [404h 1028=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [40Ch 1036=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [414h 1044=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [41Ch 1052=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [424h 1060=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [428h 1064=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [430h 1072=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000300000000 > [438h 1080=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [439h 1081=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [43Ah 1082=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [43Ch 1084=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [43Dh 1085=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [43Eh 1086=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [440h 1088=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [444h 1092=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 0000000D > [448h 1096=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [44Ch 1100=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [450h 1104=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [454h 1108=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [45Ch 1116=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [464h 1124=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [46Ch 1132=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [474h 1140=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [478h 1144=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [480h 1152=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000300010000 > [488h 1160=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [489h 1161=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [48Ah 1162=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [48Ch 1164=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [48Dh 1165=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [48Eh 1166=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [490h 1168=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [494h 1172=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 0000000E > [498h 1176=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [49Ch 1180=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [4A0h 1184=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [4A4h 1188=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [4ACh 1196=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [4B4h 1204=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [4BCh 1212=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [4C4h 1220=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [4C8h 1224=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [4D0h 1232=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000300020000 > [4D8h 1240=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [4D9h 1241=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [4DAh 1242=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [4DCh 1244=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0B [Generic Inte= rrupt > Controller] > [4DDh 1245=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 50 > [4DEh 1246=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [4E0h 1248=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= CPU Interface Number : 00000000 > [4E4h 1252=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Processor UID : 0000000F > [4E8h 1256=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Flags= (decoded below) : 00000001 > Processor Enabled : 1 > Performance Interrupt Trigger Mode : 0 > Virtual GIC Interrupt Trigger Mode : 0 > [4ECh 1260=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0 Parking Protocol Versio= n : 00000000 > [4F0h 1264=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Perfo= rmance Interrupt : 00000017 > [4F4h 1268=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Parked Address : 0000000000000000 > [4FCh 1276=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000000= 00000 > [504h 1284=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0 Virtual GIC Base Addres= s : 0000000000000000 > [50Ch 1292=C2=A0=C2=A0 8]=C2=A0 Hypervisor GIC Base Address : 00000000000= 00000 > [514h 1300=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Virtu= al GIC Interrupt : 00000019 > [518h 1304=C2=A0=C2=A0 8]=C2=A0=C2=A0 Redistributor Base Address : 000000= 0000000000 > [520h 1312=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ARM MPID= R : 0000000300030000 > [528h 1320=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 Efficiency Class : 00 > [529h 1321=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00 > [52Ah 1322=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SPE Overflo= w Interrupt : 0000 >=20 > [52Ch 1324=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0C [Generic Inte= rrupt > Distributor] > [52Dh 1325=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 18 > [52Eh 1326=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [530h 1328=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Local= GIC Hardware ID : 00000000 > [534h 1332=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000300= 00000 > [53Ch 1340=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Interrupt Base : 00000000 > [540h 1344=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 Version : 03 > [541h 1345=C2=A0=C2=A0 3]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 000000 >=20 > [544h 1348=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0E [Generic Inte= rrupt > Redistributor] > [545h 1349=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 10 > [546h 1350=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [548h 1352=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000301= C0000 > [550h 1360=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 01000000 >=20 > [554h 1364=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0E [Generic Inte= rrupt > Redistributor] > [555h 1365=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 10 > [556h 1366=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [558h 1368=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000400301= C0000 > [560h 1376=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 01000000 >=20 > [564h 1380=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0E [Generic Inte= rrupt > Redistributor] > [565h 1381=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 10 > [566h 1382=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [568h 1384=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000800301= C0000 > [570h 1392=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 01000000 >=20 > [574h 1396=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0E [Generic Inte= rrupt > Redistributor] > [575h 1397=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 10 > [576h 1398=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [578h 1400=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000C00301= C0000 > [580h 1408=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 01000000 >=20 > [584h 1412=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0F [Generic Inte= rrupt > Translator] > [585h 1413=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 14 > [586h 1414=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [588h 1416=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Translation ID : 00000000 > [58Ch 1420=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000300= 40000 > [594h 1428=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00000000 >=20 > [598h 1432=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0F [Generic Inte= rrupt > Translator] > [599h 1433=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 14 > [59Ah 1434=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [59Ch 1436=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Translation ID : 00000001 > [5A0h 1440=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000300= 80000 > [5A8h 1448=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00000000 >=20 > [5ACh 1452=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0F [Generic Inte= rrupt > Translator] > [5ADh 1453=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 14 > [5AEh 1454=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [5B0h 1456=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Translation ID : 00000002 > [5B4h 1460=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000300= C0000 > [5BCh 1468=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00000000 >=20 > [5C0h 1472=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0F [Generic Inte= rrupt > Translator] > [5C1h 1473=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 14 > [5C2h 1474=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [5C4h 1476=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Translation ID : 00000003 > [5C8h 1480=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000301= 00000 > [5D0h 1488=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00000000 >=20 > [5D4h 1492=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0F [Generic Inte= rrupt > Translator] > [5D5h 1493=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 14 > [5D6h 1494=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [5D8h 1496=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Translation ID : 00000004 > [5DCh 1500=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000301= 40000 > [5E4h 1508=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00000000 >=20 > [5E8h 1512=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Subtable Type : 0F [Generic Inte= rrupt > Translator] > [5E9h 1513=C2=A0=C2=A0 1]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 Length : 14 > [5EAh 1514=C2=A0=C2=A0 2]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 0000 > [5ECh 1516=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Translation ID : 00000005 > [5F0h 1520=C2=A0=C2=A0 8]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Base Address : 00000000301= 80000 > [5F8h 1528=C2=A0=C2=A0 4]=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Re= served : 00000000 >=20 > Raw Table Data: Length 1532 (0x5FC) >=20 > 0000: 41 50 49 43 FC 05 00 00 05 0B 41 52 4D 4C 54 44=C2=A0 // APIC......= ARMLTD >=20 > 0010: 41 52 4D 53 47 49 20 20 28 07 22 20 41 52 4D 20=C2=A0 // ARMSGI=C2= =A0 (." ARM > 0020: 99 29 00 00 00 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // .)........= ...P.. >=20 > 0030: 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0040: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0060: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0070: 00 00 00 00 00 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 0080: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0090: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 00B0: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 00C0: 00 00 01 00 00 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 00D0: 00 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 00E0: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0100: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0110: 00 00 02 00 00 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 0120: 00 00 00 00 03 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0130: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0150: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0160: 00 00 03 00 00 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 0170: 00 00 00 00 04 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0180: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 01A0: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 01B0: 00 00 00 00 01 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 01C0: 00 00 00 00 05 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 01D0: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 01E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 01F0: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0200: 00 00 01 00 01 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 0210: 00 00 00 00 06 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0220: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0230: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0240: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0250: 00 00 02 00 01 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 0260: 00 00 00 00 07 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0270: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0280: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0290: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 02A0: 00 00 03 00 01 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 02B0: 00 00 00 00 08 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 02C0: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 02D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 02E0: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 02F0: 00 00 00 00 02 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 0300: 00 00 00 00 09 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0310: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0320: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0330: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0340: 00 00 01 00 02 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 0350: 00 00 00 00 0A 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0360: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0370: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0380: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0390: 00 00 02 00 02 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 03A0: 00 00 00 00 0B 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 03B0: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 03C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 03D0: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 03E0: 00 00 03 00 02 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 03F0: 00 00 00 00 0C 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0400: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0410: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0420: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0430: 00 00 00 00 03 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 0440: 00 00 00 00 0D 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0450: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0460: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0470: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0480: 00 00 01 00 03 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 0490: 00 00 00 00 0E 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 04A0: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 04B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 04C0: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 04D0: 00 00 02 00 03 00 00 00 00 00 00 00 0B 50 00 00=C2=A0 // ..........= ...P.. >=20 > 04E0: 00 00 00 00 0F 00 00 00 01 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 04F0: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0500: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0510: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00=C2=A0 // ..........= ...... >=20 > 0520: 00 00 03 00 03 00 00 00 00 00 00 00 0C 18 00 00=C2=A0 // ..........= ...... >=20 > 0530: 00 00 00 00 00 00 00 30 00 00 00 00 00 00 00 00=C2=A0 // .......0..= ...... >=20 > 0540: 03 00 00 00 0E 10 00 00 00 00 1C 30 00 00 00 00=C2=A0 // ..........= .0.... >=20 > 0550: 00 00 00 01 0E 10 00 00 00 00 1C 30 00 04 00 00=C2=A0 // ..........= .0.... >=20 > 0560: 00 00 00 01 0E 10 00 00 00 00 1C 30 00 08 00 00=C2=A0 // ..........= .0.... >=20 > 0570: 00 00 00 01 0E 10 00 00 00 00 1C 30 00 0C 00 00=C2=A0 // ..........= .0.... >=20 > 0580: 00 00 00 01 0F 14 00 00 00 00 00 00 00 00 04 30=C2=A0 // ..........= .....0 >=20 > 0590: 00 00 00 00 00 00 00 00 0F 14 00 00 01 00 00 00=C2=A0 // ..........= ...... >=20 > 05A0: 00 00 08 30 00 00 00 00 00 00 00 00 0F 14 00 00=C2=A0 // ...0......= ...... >=20 > 05B0: 02 00 00 00 00 00 0C 30 00 00 00 00 00 00 00 00=C2=A0 // .......0..= ...... >=20 > 05C0: 0F 14 00 00 03 00 00 00 00 00 10 30 00 00 00 00=C2=A0 // ..........= .0.... >=20 > 05D0: 00 00 00 00 0F 14 00 00 04 00 00 00 00 00 14 30=C2=A0 // ..........= .....0 >=20 > 05E0: 00 00 00 00 00 00 00 00 0F 14 00 00 05 00 00 00=C2=A0 // ..........= ...... >=20 > 05F0: 00 00 18 30 00 00 00 00 00 00 00 00=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 // ...0........ >=20 >=20 >=20 >=20 >=20 > [/snip] >=20 >=20 >=20 > [/SAMI] >=20 >=20 [Nishant] I manually traversed through the code logic with the example given above an= d I think the logic can handle it. Could you please point out the exact problem with the patch? [/Nishant] >=20 >=20 >> Please point me to the documentation or code that has a standardised way >> of updating the ACPI table. >=20 >=20 >=20 > [SAMI] There is a reference implementation at https://github.com/tianocor= e/edk2-platforms/blob/master/Platform/ARM/VExpressPkg/ConfigurationManager/= ConfigurationManagerDxe/ConfigurationManager.c#L475-L487 > ( > https://github.com/tianocore/edk2-platforms/blob/master/Platform/ARM/VExp= ressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c= #L475-L487 > ) >=20 >=20 [Nishant] This expects the GIC structure to be present linearly in the memory. The algorithm implemented in the code is flexible. It checks the ID of each= node present in the table and processes it only if it is of type=C2=A0EFI_= ACPI_6_4_GIC(0xB). [/Nishant] >=20 >=20 >> Regarding the use of the Dynamic Table Framework, there are no short-ter= m >> plans to migrate to it. >> For the use of dynamic table >> [/Nishant] >>=20 >>=20 >>>=20 >>>> + GicStructure =3D (EFI_ACPI_6_4_GIC_STRUCTURE *)StructureListHea= d; >>>>=20 >>>> +=20 >>>> // Disable the CPU if its MPID is present in the list. >>>>=20 >>>> + MpidPresent >>>> =3D CheckIfMpidIsPresent( >>>>=20 >>>> + HobData->IsolatedCpuList.Mpid, >>>>=20 >>>> + =20 >>>> HobData->IsolatedCpuList.Count, >>>>=20 >>>> + GicStructure->MPIDR >>>>=20 >>>> + ); >>>> + if (MpidPresent =3D=3D TRUE) { >>>>=20 >>>> + DEBUG (( >>>>=20 >>>> + =20 >>>> DEBUG_INFO, >>>>=20 >>>> + "Disabling Core: %lu, MPID: 0x%llx in MADT\n", >>>>=20 >>>> +=20 >>>> GicStructure->AcpiProcessorUid, >>>>=20 >>>> + GicStructure->MPIDR >>>>=20 >>>> + =20 >>>> )); >>>>=20 >>>> + GicStructure->Flags =3D 0; >>>>=20 >>>> + } >>>>=20 >>>> + } >>>>=20 >>>> + >>>>=20 >>>> + // >>>> Second element in the structure component header is length >>>>=20 >>>> + =20 >>>> StructureListHead +=3D StructureListHead[1]; >>>>=20 >>>> + } >>>>=20 >>>> +} >>>>=20 >>>> + >>>>=20 >>>> +/** >>>>=20 >>>> + Callback >>>> to validate and/or update ACPI table. >>>>=20 >>>> + >>>>=20 >>>> + On finding a MADT table, >>>> disable the isolated CPUs in the MADT table. The >>>>=20 >>>> + list of isolated CPUs >>>> are obtained from the HOB data. >>>>=20 >>>> + >>>>=20 >>>> + @param[in] AcpiHeader Target ACPI >>>> table. >>>>=20 >>>> + >>>>=20 >>>> + @retval TURE Table validated/updated successfully. >>>>=20 >>>> +=20 >>>> @retval FALSE Error in Table validation/updation. >>>>=20 >>>> +**/ >>>>=20 >>>> +STATIC >>>>=20 >>>> +BOOLEAN >>>>=20 >>>> +CheckAndUpdateAcpiTable ( >>>>=20 >>>> + IN EFI_ACPI_DESCRIPTION_HEADER=20 >>>> *AcpiHeader >>>>=20 >>>> + ) >>>>=20 >>>> +{ >>>>=20 >>>> + VOID *SystemIdHob; >>>>=20 >>>> + SGI_PLATFORM_DESCRIPTOR >>>> *HobData; >>>>=20 >>>> + >>>>=20 >>>> + // This check updates the MADT table to disable isolated >>>> CPUs present on the >>>>=20 >>>> + // platform. >>>>=20 >>>> + if (AcpiHeader->Signature =3D=3D >>>> EFI_ACPI_1_0_APIC_SIGNATURE) { >>>=20 >>> [SAMI] Why EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE is no= t >>> used here? >>>=20 >>=20 >> [Nishant] I will update in the next version. >>=20 >>>=20 >>>> + SystemIdHob =3D GetFirstGuidHob (&gArmSgiPlatformIdDescriptorGuid= ); >>>>=20 >>>> +=20 >>>> if (SystemIdHob !=3D NULL) { >>>>=20 >>>> + HobData =3D (SGI_PLATFORM_DESCRIPTOR >>>> *)GET_GUID_HOB_DATA (SystemIdHob); >>>>=20 >>>> + UpdateMadtTable (AcpiHeader, >>>> HobData); >>>>=20 >>>> + } >>>>=20 >>>> + } >>>>=20 >>>> + >>>>=20 >>>> + return TRUE; >>>>=20 >>>> +} >>>>=20 >>>> + >>>>=20 >>>> EFI_STATUS >>>>=20 >>>> EFIAPI >>>>=20 >>>>=20 >>>> ArmSgiPkgEntryPoint ( >>>>=20 >>>> @@ -25,7 +149,10 @@ ArmSgiPkgEntryPoint ( >>>> { >>>>=20 >>>> =20 >>>> EFI_STATUS Status; >>>>=20 >>>> =20 >>>>=20 >>>> - Status =3D LocateAndInstallAcpiFromFv >>>> (&gArmSgiAcpiTablesGuid); >>>>=20 >>>> + Status =3D >>>> LocateAndInstallAcpiFromFvConditional ( >>>>=20 >>>> + =20 >>>> &gArmSgiAcpiTablesGuid, >>>>=20 >>>> + &CheckAndUpdateAcpiTable >>>>=20 >>>> + =20 >>>> ); >>>>=20 >>>> if (EFI_ERROR (Status)) { >>>>=20 >>>> DEBUG ((DEBUG_ERROR, "%a: Failed to >>>> install ACPI tables\n", __FUNCTION__)); >>>>=20 >>>> return Status; >>>>=20 >>>> diff --git >>>> a/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c >>>> b/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c >>>> index >>>> 7df52cc4fd7c..f778dc8ac7c1 100644 >>>> --- >>>> a/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c >>>> +++ >>>> b/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c >>>> @@ -1,6 >>>> +1,6 @@ >>>> /** @file >>>>=20 >>>> * >>>>=20 >>>> -* Copyright (c) 2018, ARM Limited. All rights >>>> reserved. >>>>=20 >>>> +* Copyright (c) 2018-2022, ARM Limited. All rights reserved. >>>>=20 >>>> * >>>>=20 >>>> * SPDX-License-Identifier: BSD-2-Clause-Patent >>>>=20 >>>> * >>>>=20 >>>> @@ -38,6 +38,8 @@ >>>> GetSgiSystemId ( >>>> CONST VOID *NtFwCfgDtBlob; >>>>=20 >>>> =20 >>>> SGI_NT_FW_CONFIG_INFO_PPI *NtFwConfigInfoPpi; >>>>=20 >>>> EFI_STATUS =20 >>>> Status; >>>>=20 >>>> + UINT64 IsolatedCpuCount; >>>>=20 >>>> + UINT64 =20 >>>> CoreCount; >>>>=20 >>>> =20 >>>>=20 >>>> Status =3D PeiServicesLocatePpi >>>> (&gNtFwConfigDtInfoPpiGuid, 0, NULL, >>>>=20 >>>> =20 >>>> (VOID**)&NtFwConfigInfoPpi); >>>>=20 >>>> @@ -83,6 +85,32 @@ GetSgiSystemId ( >>>> =20 >>>> HobData->MultiChipMode =3D fdt32_to_cpu (*Property); >>>>=20 >>>> } >>>>=20 >>>> =20 >>>>=20 >>>> + Property =3D >>>> fdt_getprop (NtFwCfgDtBlob, Offset, "isolated-cpu-list", NULL); >>>>=20 >>>> + if >>>> (Property =3D=3D NULL) { >>>>=20 >>>> + DEBUG ((DEBUG_INFO, "%s property not found\n", >>>> "isolated-cpu-list")); >>>>=20 >>>> + HobData->IsolatedCpuList.Count =3D 0; >>>>=20 >>>> + } >>>> else { >>>>=20 >>>> + CopyMem (&IsolatedCpuCount, Property, sizeof >>>> (IsolatedCpuCount)); >>>>=20 >>>> + CoreCount =3D >>>>=20 >>>> + FixedPcdGet32 >>>> (PcdChipCount) * >>>>=20 >>>> + FixedPcdGet32 (PcdClusterCount) * >>>>=20 >>>> + =20 >>>> FixedPcdGet32 (PcdCoreCount); >>>>=20 >>>> + if (IsolatedCpuCount > CoreCount) { >>>>=20 >>>> + >>>> DEBUG (( >>>>=20 >>>> + DEBUG_ERROR, >>>>=20 >>>> + "IsolatedCpuCount(%u) is >>>> higher than CoreCount(%u)\n", >>>>=20 >>>> + IsolatedCpuCount, >>>>=20 >>>> + =20 >>>> CoreCount >>>>=20 >>>> + )); >>>>=20 >>>> + return EFI_SUCCESS; >>>=20 >>> [SAMI] Is the status code returned here correct? Should this be >>> EFI_INVALID_PARAMETER? Also the function name GetSgiSystemId() seems to= no >>> longer reflect what the function does. Hace you considered renaming it. >>=20 >> [Nishant] >> This is done intentionally, we want to keep booting even if the config >> provided is corrupted. >>=20 >> I will update the function name in the next version. >> [/Nishant] >>=20 >>>=20 >>>> + } >>>>=20 >>>> + CopyMem ( >>>>=20 >>>> + &HobData->IsolatedCpuList, >>>>=20 >>>> + =20 >>>> Property, >>>>=20 >>>> + sizeof(HobData->IsolatedCpuList) + (CoreCount * >>>> sizeof(UINT64)) >>>=20 >>> [SAMI] Coding convention is not followed here and at other places. Can = you >>> fix, please? >>=20 >> [Nishant] Will update in the next patch version. >>=20 >>>=20 >>>> + ); >>>>=20 >>>> + } >>>>=20 >>>> + >>>>=20 >>>> return EFI_SUCCESS; >>>>=20 >>>> } >>>>=20 >>>> =20 >>>>=20 >>>> @@ -104,11 +132,24 @@ >>>> SgiPlatformPeim ( >>>> { >>>>=20 >>>> SGI_PLATFORM_DESCRIPTOR *HobData; >>>>=20 >>>> =20 >>>> EFI_STATUS Status; >>>>=20 >>>> + UINT64 =20 >>>> CoreCount; >>>>=20 >>>> + UINTN HobSize; >>>>=20 >>>> =20 >>>>=20 >>>> + CoreCount =3D >>>>=20 >>>> + FixedPcdGet32 (PcdChipCount) * >>>>=20 >>>> + FixedPcdGet32 (PcdClusterCount) >>>> * >>>>=20 >>>> + FixedPcdGet32 (PcdCoreCount); >>>>=20 >>>> + >>>>=20 >>>> + // Additional size for >>>> SGI_ISOLATED_CPU_LIST. >>>>=20 >>>> + // Size =3D (MPID register size in bytes * >>>> CoreCount) + >>>>=20 >>>> + // sizeof(SGI_PLATFORM_DESCRIPTOR) >>>>=20 >>>> + HobSize =3D >>>>=20 >>>> + sizeof (SGI_PLATFORM_DESCRIPTOR) + >>>>=20 >>>> + (CoreCount * >>>> sizeof(UINT64)); >>>>=20 >>>> // Create platform descriptor HOB >>>>=20 >>>> HobData =3D >>>> (SGI_PLATFORM_DESCRIPTOR *)BuildGuidHob ( >>>>=20 >>>> =20 >>>> &gArmSgiPlatformIdDescriptorGuid, >>>>=20 >>>> - =20 >>>> sizeof (SGI_PLATFORM_DESCRIPTOR)); >>>>=20 >>>> + =20 >>>> HobSize); >>>>=20 >>>> =20 >>>>=20 >>>> // Get the system id from the platform specific >>>> nt_fw_config device tree >>>>=20 >>>> if (HobData =3D=3D NULL) { >>>>=20 >>>>=20 >>>=20 >>> IMPORTANT NOTICE: The contents of this email and any attachments are >>> confidential and may also be privileged. If you are not the intended >>> recipient, please notify the sender immediately and do not disclose the >>> contents to any other person, use it for any purpose, or store or copy = the >>> information in any medium. Thank you. >>=20 >>=20 >=20 > IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy th= e > information in any medium. Thank you. --98xv8hXXwqhKRvieDDKG Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable

Hi Sami,

Please find my response inline

On Thu, Jul 28, 2022 at 06:12 PM, Sami Mujawar wrote:

Hi Nishant,

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar

On 27/07/2022 02:53 pm, Nishant Sharma wrote= :

Hi Sami,
Please find my reply inline

On Thu, Jul 21, 2022 at 12:47 PM, Sami Mujawar wrote:

Hi Nishant,

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar

On 17/06/2022 07:07 am, Nishant Sharma wrote= :
Isolated CPUs are those that are not to be use=
d on the platform for
various reasons. The isolated CPU list is an array of MPID values of
[SAMI] Can you explain the use-case/reason, please?
[Nishant]: I will update in the next patchset.
the CPUs that have to be isolated. This list i=
s supplied via the
NT_FW_CONFIG dtb.

Add support to search for isolated CPUs MPID list and, if present,
update the MADT table to disable the corresponding CPUs.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
---
 Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf         |   1 -
 Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf |   8 +-
 Platform/ARM/SgiPkg/Include/SgiPlatform.h                     |   7 ++
 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c         | 131 ++++++=
+++++++++++++-
 Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c  |  45 ++++++=
-
 5 files changed, 186 insertions(+), 6 deletions(-)

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf b/Platfo=
rm/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
index 4b36c3e5ceb2..e13c2f08ce6e 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
@@ -18,7 +18,6 @@
   Dbg2.aslc

   Fadt.aslc

   Gtdt.aslc

-  Iort.aslc
[SAMI] Why is IORT table being removed here?
[Nishant]: I think some issue with patch generation. I will remove this cha= nge in the next patch. Thanks for pointing it out.
   Mcfg.aslc

   RdN2Cfg1/Dsdt.asl

   RdN2Cfg1/Madt.aslc

diff --git a/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf =
b/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf
index 407160c07563..fbf061ad3bdb 100644
--- a/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf
+++ b/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf
@@ -1,5 +1,5 @@
 #

-#  Copyright (c) 2018, ARM Limited. All rights reserved.

+#  Copyright (c) 2018-2022, ARM Limited. All rights reserved.

 #

 #  SPDX-License-Identifier: BSD-2-Clause-Patent

 #

@@ -13,6 +13,7 @@
   ENTRY_POINT                    =3D SgiPlatformPeim

=20

 [Packages]

+  ArmPlatformPkg/ArmPlatformPkg.dec

   EmbeddedPkg/EmbeddedPkg.dec

   MdePkg/MdePkg.dec

   Platform/ARM/SgiPkg/SgiPlatform.dec

@@ -21,6 +22,11 @@
   FdtLib

   PeimEntryPoint

=20

+[FixedPcd]

+  gArmSgiTokenSpaceGuid.PcdChipCount

+  gArmPlatformTokenSpaceGuid.PcdCoreCount

+  gArmPlatformTokenSpaceGuid.PcdClusterCount

+

 [Sources]

   SgiPlatformPeim.c

=20

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPk=
g/Include/SgiPlatform.h
index dddb58832d73..311286ce5337 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -65,11 +65,18 @@
 #define DRAM_BLOCK2_BASE_REMOTE(ChipId) \

           (SGI_REMOTE_CHIP_MEM_OFFSET (ChipId) + FixedPcdGet64 (PcdDramBlo=
ck2Base))

=20

+// List of isolated CPUs MPID

+typedef struct {

+  UINT64  Count;                // Number of elements present in the list

+  UINT64  Mpid[];               // List containing isolated CPU MPIDs

+} SGI_ISOLATED_CPU_LIST;

+

 // ARM platform description data.

 typedef struct {

   UINTN  PlatformId;

   UINTN  ConfigId;

   UINTN  MultiChipMode;

+  SGI_ISOLATED_CPU_LIST  IsolatedCpuList;

 } SGI_PLATFORM_DESCRIPTOR;

=20

 // Arm SGI/RD Product IDs

diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platfo=
rm/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
index 2f72e7152ff3..80190120ff32 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -1,14 +1,17 @@
 /** @file

 *

-*  Copyright (c) 2018, ARM Limited. All rights reserved.

+*  Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.

 *

 *  SPDX-License-Identifier: BSD-2-Clause-Patent

 *

 **/

=20

+#include <IndustryStandard/Acpi.h>

+

 #include <Library/AcpiLib.h>

 #include <Library/DebugLib.h>

 #include <Library/HobLib.h>

+#include <Library/UefiBootServicesTableLib.h>

 #include <SgiPlatform.h>

=20

 VOID

@@ -16,6 +19,127 @@ InitVirtioDevices (
   VOID

   );

=20

+/**

+  Search for a MPID in a list

+

+  Performs a linear search for a specified MPID on the given linear

+  list of MPIDs.

+

+  @param[in]  MpidList  Pointer to list.

+  @param[in]  Count     Number of the elements in the list.

+  @param[in]  Mpid      Target MPID.

+

+  @retval TRUE   MPID is present.

+  @retval FALSE  MPID is not present.

+**/

+STATIC

+BOOLEAN

+CheckIfMpidIsPresent (

+  IN UINT64  *MpidList,

+  IN UINT64  Count,

+  IN UINT64  Mpid

+  )

+{

+  UINT64 Idx;

+

+  for (Idx =3D 0; Idx < Count; Idx++) {

+    if (MpidList[Idx] =3D=3D Mpid) {

+      return TRUE;

+    }

+  }

+

+  return FALSE;

+}

+

+/**

+  Disables isolated CPUs in the MADT table

+

+  Parse the IsolatedCpuInfo from the Hob list and updates the MADT table t=
o
[SAMI] Nit.  updates -> update
[Nishant] Will update in next patch version.
+  disable cpu's which are not available on th=
e platfrom.

+

+  @param[in] AcpiHeader  Points to the Madt table.

+  @param[in] HobData     Points to the unusable cpuinfo in hoblist.

+**/

+STATIC

+VOID

+UpdateMadtTable (

+  IN EFI_ACPI_DESCRIPTION_HEADER  *AcpiHeader,

+  IN SGI_PLATFORM_DESCRIPTOR      *HobData

+  )

+{

+  UINT8 *StructureListHead;

+  UINT8 *StructureListTail;

+  EFI_ACPI_6_4_GIC_STRUCTURE *GicStructure;

+  BOOLEAN MpidPresent;

+

+  if (HobData->IsolatedCpuList.Count =3D=3D 0) {

+    return;

+  }

+

+  StructureListHead =3D

+    ((UINT8 *)AcpiHeader) +

+    sizeof(EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);

+  StructureListTail =3D (UINT8 *)AcpiHeader + AcpiHeader->Length;

+

+  // Locate ACPI GICC structure in the MADT table.

+  while (StructureListHead < StructureListTail) {

+    if (StructureListHead[0] =3D=3D EFI_ACPI_6_4_GIC) {

[SAMI] This is definitely not the way to parse an ACPI table. Please don= t do this.

Also, why are you not using DynamicTables framework? It is designed to h= andle such cases.

[/SAMI]

[Nishant]
Could you please add more details on what is wrong with this= approach?

[SAMI] The problem is it does not work with the ACPI table below:

[snip]

/*
 * Intel ACPI Component Architecture
 * AML/ASL+ = Disassembler version 20210930 (32-bit version)
 * Copyright (c) 2= 000 - 2021 Intel Corporation
 *
 * Disassembly of apic= 0000.bin, Thu Jul 28 17:57:00 2022
 *
 * ACPI Data Tabl= e [APIC]
 *
 * Format: [HexOffset DecimalOffset ByteLen= gth]  FieldName : FieldValue (in hex)
 */

[000h 0= 000   4]         &nb= sp;          Signature : "APIC= "    [Multiple APIC Description Table (MADT)]
[004h 000= 4   4]          = ;       Table Length : 000005FC
[008h 00= 08   1]         &nbs= p;           Revision : 0= 5
[009h 0009   1]       &= nbsp;           &nbs= p; Checksum : 0B
[00Ah 0010   6]    &nbs= p;            &= nbsp;     Oem ID : "ARMLTD"
[010h 0016  = 8]            =      Oem Table ID : "ARMSGI  "
[018h 0024&nbs= p;  4]          &nbs= p;      Oem Revision : 20220728
[01Ch 0028&nb= sp;  4]          &nb= sp;   Asl Compiler ID : "ARM "
[020h 0032   4]&nbs= p;       Asl Compiler Revision : 00002999

[024h 0036   4]       =     Local Apic Address : 00000000
[028h 0040  = ; 4]        Flags (decoded below) : 0000= 0000
           = ;            &n= bsp; PC-AT Compatibility : 0

[02Ch 0044   1] &nbs= p;            &= nbsp; Subtable Type : 0B [Generic Interrupt Controller]
[02Dh 0045&nbs= p;  1]          &nbs= p;            Length= : 50
[02Eh 0046   2]      &nb= sp;            =   Reserved : 0000
[030h 0048   4]   &nbs= p;     CPU Interface Number : 00000000
[034h 0052&= nbsp;  4]          &= nbsp;     Processor UID : 00000000
[038h 0056 = ;  4]        Flags (decoded below) = : 00000001
          = ;            &n= bsp;    Processor Enabled : 1
    &= nbsp;     Performance Interrupt Trigger Mode : 0
&= nbsp;         Virtual GIC Interrupt= Trigger Mode : 0
[03Ch 0060   4]     Pa= rking Protocol Version : 00000000
[040h 0064   4]  = ;      Performance Interrupt : 00000017
[044h= 0068   8]         &= nbsp;     Parked Address : 0000000000000000
[04Ch = 0076   8]         &n= bsp;       Base Address : 0000000000000000[054h 0084   8]     Virtual GIC Base Addre= ss : 0000000000000000
[05Ch 0092   8]  Hypervisor GIC B= ase Address : 0000000000000000
[064h 0100   4]  &n= bsp;     Virtual GIC Interrupt : 00000019
[068h 01= 04   8]   Redistributor Base Address : 0000000000000000=
[070h 0112   8]       &n= bsp;            ARM = MPIDR : 0000000000000000
[078h 0120   1]   &n= bsp;         Efficiency Class : 00<= br />[079h 0121   1]       &nb= sp;            = Reserved : 00
[07Ah 0122   2]     =   SPE Overflow Interrupt : 0000

[07Ch 0124   1]&n= bsp;            = ;   Subtable Type : 0B [Generic Interrupt Controller]
[07Dh = 0125   1]         &n= bsp;            = ; Length : 50
[07Eh 0126   2]     &= nbsp;           &nbs= p;   Reserved : 0000
[080h 0128   4]  &n= bsp;      CPU Interface Number : 00000000
[08= 4h 0132   4]         = ;       Processor UID : 00000001
[088h 0= 136   4]        Flags (decoded= below) : 00000001
        &nb= sp;            =       Processor Enabled : 1
   = ;       Performance Interrupt Trigger Mode : = 0
          Virtual GIC I= nterrupt Trigger Mode : 0
[08Ch 0140   4]   &= nbsp; Parking Protocol Version : 00000000
[090h 0144   4]&nb= sp;       Performance Interrupt : 00000017[094h 0148   8]        = ;       Parked Address : 0000000000000000
[09Ch 0156   8]        =          Base Address : 00000000000= 00000
[0A4h 0164   8]     Virtual GIC Ba= se Address : 0000000000000000
[0ACh 0172   8]  Hypervis= or GIC Base Address : 0000000000000000
[0B4h 0180   4] =        Virtual GIC Interrupt : 00000019
= [0B8h 0184   8]   Redistributor Base Address : 00000000= 00000000
[0C0h 0192   8]      =             &nb= sp; ARM MPIDR : 0000000000010000
[0C8h 0200   1]  =            Efficiency Cla= ss : 00
[0C9h 0201   1]      &= nbsp;           &nbs= p;  Reserved : 00
[0CAh 0202   2]   &nbs= p;   SPE Overflow Interrupt : 0000

[0CCh 0204 &nb= sp; 1]           &nb= sp;    Subtable Type : 0B [Generic Interrupt Controller]
[0CDh 0205   1]        =             &nb= sp;  Length : 50
[0CEh 0206   2]    = ;            &n= bsp;    Reserved : 0000
[0D0h 0208   4] =         CPU Interface Number : 00000000<= br />[0D4h 0212   4]       &nb= sp;        Processor UID : 00000002
[0D8h 0216   4]        Flags = (decoded below) : 00000001
       &= nbsp;           &nbs= p;       Processor Enabled : 1
 &nb= sp;        Performance Interrupt Trigger= Mode : 0
          Virtu= al GIC Interrupt Trigger Mode : 0
[0DCh 0220   4]  = ;   Parking Protocol Version : 00000000
[0E0h 0224 &nbs= p; 4]        Performance Interrupt : 000= 00017
[0E4h 0228   8]      &nb= sp;        Parked Address : 000000000000= 0000
[0ECh 0236   8]      &nbs= p;          Base Address : 000= 0000000000000
[0F4h 0244   8]     Virtua= l GIC Base Address : 0000000000000000
[0FCh 0252   8]  = Hypervisor GIC Base Address : 0000000000000000
[104h 0260   = 4]        Virtual GIC Interrupt : 000000= 19
[108h 0264   8]   Redistributor Base Address : = 0000000000000000
[110h 0272   8]    &nbs= p;            &= nbsp;  ARM MPIDR : 0000000000020000
[118h 0280   1]&nbs= p;            Effici= ency Class : 00
[119h 0281   1]     = ;            &n= bsp;   Reserved : 00
[11Ah 0282   2]  &n= bsp;    SPE Overflow Interrupt : 0000

[11Ch 0284&= nbsp;  1]          &= nbsp;     Subtable Type : 0B [Generic Interrupt Control= ler]
[11Dh 0285   1]      &nbs= p;            &= nbsp;   Length : 50
[11Eh 0286   2]  &nb= sp;            =       Reserved : 0000
[120h 0288   = 4]         CPU Interface Number : 0= 0000000
[124h 0292   4]      &= nbsp;         Processor UID : 00000= 003
[128h 0296   4]       = ; Flags (decoded below) : 00000001
      = ;            &n= bsp;        Processor Enabled : 1
&= nbsp;         Performance Interrupt= Trigger Mode : 0
        &nbs= p; Virtual GIC Interrupt Trigger Mode : 0
[12Ch 0300   4]&nb= sp;    Parking Protocol Version : 00000000
[130h 0304&n= bsp;  4]        Performance Interru= pt : 00000017
[134h 0308   8]     &= nbsp;         Parked Address : 0000= 000000000000
[13Ch 0316   8]     &n= bsp;           Base Addre= ss : 0000000000000000
[144h 0324   8]    = ; Virtual GIC Base Address : 0000000000000000
[14Ch 0332   8= ]  Hypervisor GIC Base Address : 0000000000000000
[154h 0340 = ;  4]        Virtual GIC Interrupt = : 00000019
[158h 0344   8]   Redistributor Base Ad= dress : 0000000000000000
[160h 0352   8]   &n= bsp;            = ;    ARM MPIDR : 0000000000030000
[168h 0360  = ; 1]            = ; Efficiency Class : 00
[169h 0361   1]   &nb= sp;            =      Reserved : 00
[16Ah 0362   2] =       SPE Overflow Interrupt : 0000

[16= Ch 0364   1]         = ;       Subtable Type : 0B [Generic Interrupt= Controller]
[16Dh 0365   1]     &n= bsp;            = ;     Length : 50
[16Eh 0366   2] &= nbsp;           &nbs= p;       Reserved : 0000
[170h 0368 = ;  4]         CPU Interface Nu= mber : 00000000
[174h 0372   4]     = ;           Processor UID= : 00000004
[178h 0376   4]     &nb= sp;  Flags (decoded below) : 00000001
    &nb= sp;            =           Processor Enabled : = 1
          Performance I= nterrupt Trigger Mode : 0
       &n= bsp;  Virtual GIC Interrupt Trigger Mode : 0
[17Ch 0380 &nbs= p; 4]     Parking Protocol Version : 00000000
[180= h 0384   4]        Performance= Interrupt : 00000017
[184h 0388   8]    = ;           Parked Addres= s : 0000000000000000
[18Ch 0396   8]    =              Ba= se Address : 0000000000000000
[194h 0404   8]  &nb= sp;  Virtual GIC Base Address : 0000000000000000
[19Ch 0412 =   8]  Hypervisor GIC Base Address : 0000000000000000
[1A4h 0= 420   4]        Virtual GIC In= terrupt : 00000019
[1A8h 0424   8]   Redistributor= Base Address : 0000000000000000
[1B0h 0432   8]  =             &nb= sp;     ARM MPIDR : 0000000100000000
[1B8h 0440&nb= sp;  1]          &nb= sp;  Efficiency Class : 00
[1B9h 0441   1]  &= nbsp;           &nbs= p;      Reserved : 00
[1BAh 0442   = 2]       SPE Overflow Interrupt : 0000
<= br />[1BCh 0444   1]       &nb= sp;        Subtable Type : 0B [Generic I= nterrupt Controller]
[1BDh 0445   1]    =             &nb= sp;      Length : 50
[1BEh 0446   2= ]            &n= bsp;        Reserved : 0000
[1C0h 0= 448   4]         CPU Inte= rface Number : 00000000
[1C4h 0452   4]   &nb= sp;            Proce= ssor UID : 00000005
[1C8h 0456   4]    &= nbsp;   Flags (decoded below) : 00000001
   &= nbsp;           &nbs= p;           Processor En= abled : 1
          Perfo= rmance Interrupt Trigger Mode : 0
      =     Virtual GIC Interrupt Trigger Mode : 0
[1CCh 0460&n= bsp;  4]     Parking Protocol Version : 00000000[1D0h 0464   4]        Per= formance Interrupt : 00000017
[1D4h 0468   8]  &nb= sp;            Parke= d Address : 0000000000000000
[1DCh 0476   8]  &nbs= p;            &= nbsp; Base Address : 0000000000000000
[1E4h 0484   8] &= nbsp;   Virtual GIC Base Address : 0000000000000000
[1ECh 04= 92   8]  Hypervisor GIC Base Address : 0000000000000000
[1F4h 0500   4]        Virtua= l GIC Interrupt : 00000019
[1F8h 0504   8]   Redis= tributor Base Address : 0000000000000000
[200h 0512   8]&nbs= p;            &= nbsp;      ARM MPIDR : 0000000100010000
[208h= 0520   1]         &= nbsp;   Efficiency Class : 00
[209h 0521   1] = ;            &n= bsp;       Reserved : 00
[20Ah 0522 = ;  2]       SPE Overflow Interrupt : 000= 0

[20Ch 0524   1]      &= nbsp;         Subtable Type : 0B [G= eneric Interrupt Controller]
[20Dh 0525   1]  &nbs= p;            &= nbsp;       Length : 50
[20Eh 0526 =   2]           =           Reserved : 0000
[210h 0528   4]         = CPU Interface Number : 00000000
[214h 0532   4]  &= nbsp;           &nbs= p; Processor UID : 00000006
[218h 0536   4]   = ;     Flags (decoded below) : 00000001
  = ;            &n= bsp;            Proc= essor Enabled : 1
        &nbs= p; Performance Interrupt Trigger Mode : 0
    &nbs= p;     Virtual GIC Interrupt Trigger Mode : 0
[21C= h 0540   4]     Parking Protocol Version : 00= 000000
[220h 0544   4]      &n= bsp; Performance Interrupt : 00000017
[224h 0548   8] &= nbsp;           &nbs= p; Parked Address : 0000000000000000
[22Ch 0556   8] &n= bsp;            = ;   Base Address : 0000000000000000
[234h 0564   8= ]     Virtual GIC Base Address : 0000000000000000
= [23Ch 0572   8]  Hypervisor GIC Base Address : 0000000000000= 000
[244h 0580   4]       = ; Virtual GIC Interrupt : 00000019
[248h 0584   8] &nbs= p; Redistributor Base Address : 0000000000000000
[250h 0592  = ; 8]            = ;        ARM MPIDR : 0000000100020000[258h 0600   1]        = ;     Efficiency Class : 00
[259h 0601  = 1]            =          Reserved : 00
[25Ah 0= 602   2]       SPE Overflow Interru= pt : 0000

[25Ch 0604   1]     = ;           Subtable Type= : 0B [Generic Interrupt Controller]
[25Dh 0605   1] &n= bsp;            = ;         Length : 50
[25Eh 06= 06   2]         &nbs= p;           Reserved : 0= 000
[260h 0608   4]       = ;  CPU Interface Number : 00000000
[264h 0612   4] = ;            &n= bsp;  Processor UID : 00000007
[268h 0616   4] &nb= sp;      Flags (decoded below) : 00000001
&nb= sp;            =             &nb= sp; Processor Enabled : 1
       &n= bsp;  Performance Interrupt Trigger Mode : 0
   &n= bsp;      Virtual GIC Interrupt Trigger Mode : 0[26Ch 0620   4]     Parking Protocol Vers= ion : 00000000
[270h 0624   4]     =    Performance Interrupt : 00000017
[274h 0628   8= ]            &n= bsp;  Parked Address : 0000000000000000
[27Ch 0636   8]=             &nb= sp;    Base Address : 0000000000000000
[284h 0644 =   8]     Virtual GIC Base Address : 00000000000000= 00
[28Ch 0652   8]  Hypervisor GIC Base Address : 00000= 00000000000
[294h 0660   4]     &nb= sp;  Virtual GIC Interrupt : 00000019
[298h 0664   8]&n= bsp;  Redistributor Base Address : 0000000000000000
[2A0h 0672&nb= sp;  8]          &nb= sp;         ARM MPIDR : 00000001000= 30000
[2A8h 0680   1]      &nb= sp;      Efficiency Class : 00
[2A9h 0681&nbs= p;  1]          &nbs= p;          Reserved : 00
[2AAh 0682   2]       SPE Overflow= Interrupt : 0000

[2ACh 0684   1]   &nb= sp;            Subta= ble Type : 0B [Generic Interrupt Controller]
[2ADh 0685   1]=             &nb= sp;          Length : 50
= [2AEh 0686   2]        &n= bsp;            Rese= rved : 0000
[2B0h 0688   4]     &nb= sp;   CPU Interface Number : 00000000
[2B4h 0692  = 4]            =     Processor UID : 00000008
[2B8h 0696   4]&= nbsp;       Flags (decoded below) : 00000001<= br />           &nbs= p;            &= nbsp;  Processor Enabled : 1
      =     Performance Interrupt Trigger Mode : 0
  =         Virtual GIC Interrupt Trigger Mo= de : 0
[2BCh 0700   4]     Parking Proto= col Version : 00000000
[2C0h 0704   4]   &nbs= p;    Performance Interrupt : 00000017
[2C4h 0708 =   8]           =     Parked Address : 0000000000000000
[2CCh 0716 &= nbsp; 8]           &= nbsp;     Base Address : 0000000000000000
[2D4h 07= 24   8]     Virtual GIC Base Address : 000000= 0000000000
[2DCh 0732   8]  Hypervisor GIC Base Address= : 0000000000000000
[2E4h 0740   4]    &= nbsp;   Virtual GIC Interrupt : 00000019
[2E8h 0744 &nb= sp; 8]   Redistributor Base Address : 0000000000000000
[2F0h= 0752   8]         &= nbsp;          ARM MPIDR : 000= 0000200000000
[2F8h 0760   1]     &= nbsp;       Efficiency Class : 00
[2F9h = 0761   1]         &n= bsp;           Reserved := 00
[2FAh 0762   2]       SPE = Overflow Interrupt : 0000

[2FCh 0764   1]  &= nbsp;           &nbs= p; Subtable Type : 0B [Generic Interrupt Controller]
[2FDh 0765 &= nbsp; 1]           &= nbsp;           Length : = 50
[2FEh 0766   2]       =             &nb= sp; Reserved : 0000
[300h 0768   4]    &= nbsp;    CPU Interface Number : 00000000
[304h 0772&nbs= p;  4]          &nbs= p;     Processor UID : 00000009
[308h 0776 &n= bsp; 4]        Flags (decoded below) : 0= 0000001
          &n= bsp;            = ;    Processor Enabled : 1
    &nbs= p;     Performance Interrupt Trigger Mode : 0
&nbs= p;         Virtual GIC Interrupt Tr= igger Mode : 0
[30Ch 0780   4]     Parki= ng Protocol Version : 00000000
[310h 0784   4]  &n= bsp;     Performance Interrupt : 00000017
[314h 07= 88   8]         &nbs= p;     Parked Address : 0000000000000000
[31Ch 079= 6   8]          = ;       Base Address : 0000000000000000
= [324h 0804   8]     Virtual GIC Base Address = : 0000000000000000
[32Ch 0812   8]  Hypervisor GIC Base= Address : 0000000000000000
[334h 0820   4]   = ;     Virtual GIC Interrupt : 00000019
[338h 0824&= nbsp;  8]   Redistributor Base Address : 0000000000000000[340h 0832   8]        = ;            ARM MPI= DR : 0000000200010000
[348h 0840   1]    = ;         Efficiency Class : 00
[349h 0841   1]        =              Re= served : 00
[34Ah 0842   2]     &nb= sp; SPE Overflow Interrupt : 0000

[34Ch 0844   1] = ;            &n= bsp;  Subtable Type : 0B [Generic Interrupt Controller]
[34Dh 084= 5   1]          = ;             L= ength : 50
[34Eh 0846   2]     &nbs= p;            &= nbsp;  Reserved : 0000
[350h 0848   4]   = ;      CPU Interface Number : 00000000
[354h = 0852   4]         &n= bsp;      Processor UID : 0000000A
[358h 0856=    4]        Flags (decoded be= low) : 00000001
         =             &nb= sp;     Processor Enabled : 1
   &n= bsp;      Performance Interrupt Trigger Mode : 0          Virtual GIC Inte= rrupt Trigger Mode : 0
[35Ch 0860   4]   &nbs= p; Parking Protocol Version : 00000000
[360h 0864   4] =        Performance Interrupt : 00000017
= [364h 0868   8]        &n= bsp;      Parked Address : 0000000000000000
[= 36Ch 0876   8]        &nb= sp;        Base Address : 00000000000000= 00
[374h 0884   8]     Virtual GIC Base = Address : 0000000000000000
[37Ch 0892   8]  Hypervisor = GIC Base Address : 0000000000000000
[384h 0900   4] &nb= sp;      Virtual GIC Interrupt : 00000019
[38= 8h 0904   8]   Redistributor Base Address : 00000000000= 00000
[390h 0912   8]      &nb= sp;            = ARM MPIDR : 0000000200020000
[398h 0920   1]  &nb= sp;          Efficiency Class = : 00
[399h 0921   1]      &nbs= p;            &= nbsp; Reserved : 00
[39Ah 0922   2]    &= nbsp;  SPE Overflow Interrupt : 0000

[39Ch 0924  = 1]            =     Subtable Type : 0B [Generic Interrupt Controller]
[= 39Dh 0925   1]        &nb= sp;            =   Length : 50
[39Eh 0926   2]    &n= bsp;            = ;    Reserved : 0000
[3A0h 0928   4] &nb= sp;       CPU Interface Number : 00000000
[3A4h 0932   4]        =         Processor UID : 0000000B
[3= A8h 0936   4]        Flags (de= coded below) : 00000001
       &nbs= p;            &= nbsp;      Processor Enabled : 1
  =         Performance Interrupt Trigger Mo= de : 0
          Virtual = GIC Interrupt Trigger Mode : 0
[3ACh 0940   4]  &n= bsp;  Parking Protocol Version : 00000000
[3B0h 0944   = 4]        Performance Interrupt : 000000= 17
[3B4h 0948   8]       =         Parked Address : 000000000000000= 0
[3BCh 0956   8]       &= nbsp;         Base Address : 000000= 0000000000
[3C4h 0964   8]     Virtual G= IC Base Address : 0000000000000000
[3CCh 0972   8]  Hyp= ervisor GIC Base Address : 0000000000000000
[3D4h 0980   4]&= nbsp;       Virtual GIC Interrupt : 00000019<= br />[3D8h 0984   8]   Redistributor Base Address : 000= 0000000000000
[3E0h 0992   8]     &= nbsp;           &nbs= p;  ARM MPIDR : 0000000200030000
[3E8h 1000   1] &= nbsp;           Efficienc= y Class : 00
[3E9h 1001   1]     &n= bsp;            = ;   Reserved : 00
[3EAh 1002   2]   = ;    SPE Overflow Interrupt : 0000

[3ECh 1004&nbs= p;  1]          &nbs= p;     Subtable Type : 0B [Generic Interrupt Controller= ]
[3EDh 1005   1]       &= nbsp;           &nbs= p;   Length : 50
[3EEh 1006   2]   =             &nb= sp;     Reserved : 0000
[3F0h 1008   4]&= nbsp;        CPU Interface Number : 0000= 0000
[3F4h 1012   4]      &nbs= p;         Processor UID : 0000000C=
[3F8h 1016   4]        F= lags (decoded below) : 00000001
      &n= bsp;            = ;        Processor Enabled : 1
&nbs= p;         Performance Interrupt Tr= igger Mode : 0
          = Virtual GIC Interrupt Trigger Mode : 0
[3FCh 1020   4] =     Parking Protocol Version : 00000000
[400h 1024 = ;  4]        Performance Interrupt = : 00000017
[404h 1028   8]     &nbs= p;         Parked Address : 0000000= 000000000
[40Ch 1036   8]      = ;           Base Address = : 0000000000000000
[414h 1044   8]     V= irtual GIC Base Address : 0000000000000000
[41Ch 1052   8]&n= bsp; Hypervisor GIC Base Address : 0000000000000000
[424h 1060 &n= bsp; 4]        Virtual GIC Interrupt : 0= 0000019
[428h 1064   8]   Redistributor Base Addre= ss : 0000000000000000
[430h 1072   8]    = ;            &n= bsp;   ARM MPIDR : 0000000300000000
[438h 1080   1= ]             E= fficiency Class : 00
[439h 1081   1]    =             &nb= sp;    Reserved : 00
[43Ah 1082   2] &nb= sp;     SPE Overflow Interrupt : 0000

[43Ch = 1084   1]         &n= bsp;      Subtable Type : 0B [Generic Interrupt Co= ntroller]
[43Dh 1085   1]      = ;            &n= bsp;    Length : 50
[43Eh 1086   2] &nbs= p;            &= nbsp;      Reserved : 0000
[440h 1088 &n= bsp; 4]         CPU Interface Numbe= r : 00000000
[444h 1092   4]     &n= bsp;          Processor UID : = 0000000D
[448h 1096   4]      =   Flags (decoded below) : 00000001
     =             &nb= sp;         Processor Enabled : 1          Performance Inte= rrupt Trigger Mode : 0
        = ;  Virtual GIC Interrupt Trigger Mode : 0
[44Ch 1100   = 4]     Parking Protocol Version : 00000000
[450h 1= 104   4]        Performance In= terrupt : 00000017
[454h 1108   8]    &n= bsp;          Parked Address := 0000000000000000
[45Ch 1116   8]    &nb= sp;            Base = Address : 0000000000000000
[464h 1124   8]   =   Virtual GIC Base Address : 0000000000000000
[46Ch 1132 &nb= sp; 8]  Hypervisor GIC Base Address : 0000000000000000
[474h 1140=    4]        Virtual GIC Inter= rupt : 00000019
[478h 1144   8]   Redistributor Ba= se Address : 0000000000000000
[480h 1152   8]  &nb= sp;            =      ARM MPIDR : 0000000300010000
[488h 1160 =   1]           =   Efficiency Class : 00
[489h 1161   1]  &nbs= p;            &= nbsp;     Reserved : 00
[48Ah 1162   2]&= nbsp;      SPE Overflow Interrupt : 0000

[48Ch 1164   1]        =         Subtable Type : 0B [Generic Inte= rrupt Controller]
[48Dh 1165   1]    &nb= sp;            =       Length : 50
[48Eh 1166   2]&n= bsp;            = ;        Reserved : 0000
[490h 1168=    4]         CPU Interfa= ce Number : 00000000
[494h 1172   4]    =             Processo= r UID : 0000000E
[498h 1176   4]    &nbs= p;   Flags (decoded below) : 00000001
   &nbs= p;            &= nbsp;          Processor Enabl= ed : 1
          Performa= nce Interrupt Trigger Mode : 0
      &nb= sp;   Virtual GIC Interrupt Trigger Mode : 0
[49Ch 1180 = ;  4]     Parking Protocol Version : 00000000
[4A0h 1184   4]        Perfor= mance Interrupt : 00000017
[4A4h 1188   8]   =             Parked A= ddress : 0000000000000000
[4ACh 1196   8]   &= nbsp;           &nbs= p; Base Address : 0000000000000000
[4B4h 1204   8] &nbs= p;   Virtual GIC Base Address : 0000000000000000
[4BCh 1212&= nbsp;  8]  Hypervisor GIC Base Address : 0000000000000000
[4= C4h 1220   4]        Virtual G= IC Interrupt : 00000019
[4C8h 1224   8]   Redistri= butor Base Address : 0000000000000000
[4D0h 1232   8] &= nbsp;           &nbs= p;      ARM MPIDR : 0000000300020000
[4D8h 12= 40   1]         &nbs= p;   Efficiency Class : 00
[4D9h 1241   1] &n= bsp;            = ;       Reserved : 00
[4DAh 1242 &n= bsp; 2]       SPE Overflow Interrupt : 0000
[4DCh 1244   1]      &nbs= p;         Subtable Type : 0B [Gene= ric Interrupt Controller]
[4DDh 1245   1]   &= nbsp;           &nbs= p;       Length : 50
[4DEh 1246 &nb= sp; 2]           &nb= sp;         Reserved : 0000
[4= E0h 1248   4]         CPU= Interface Number : 00000000
[4E4h 1252   4]  &nbs= p;             = Processor UID : 0000000F
[4E8h 1256   4]   &n= bsp;    Flags (decoded below) : 00000001
  &n= bsp;            = ;            Process= or Enabled : 1
          = Performance Interrupt Trigger Mode : 0
     &= nbsp;    Virtual GIC Interrupt Trigger Mode : 0
[4ECh 1= 260   4]     Parking Protocol Version : 00000= 000
[4F0h 1264   4]       = ; Performance Interrupt : 00000017
[4F4h 1268   8] &nbs= p;             = Parked Address : 0000000000000000
[4FCh 1276   8]  = ;            &n= bsp;  Base Address : 0000000000000000
[504h 1284   8]&n= bsp;    Virtual GIC Base Address : 0000000000000000
[50= Ch 1292   8]  Hypervisor GIC Base Address : 0000000000000000=
[514h 1300   4]        V= irtual GIC Interrupt : 00000019
[518h 1304   8]   = Redistributor Base Address : 0000000000000000
[520h 1312   8= ]            &n= bsp;       ARM MPIDR : 0000000300030000
= [528h 1320   1]        &n= bsp;    Efficiency Class : 00
[529h 1321   1]=             &nb= sp;        Reserved : 00
[52Ah 1322=    2]       SPE Overflow Interrupt = : 0000

[52Ch 1324   1]     &n= bsp;          Subtable Type : = 0C [Generic Interrupt Distributor]
[52Dh 1325   1] &nbs= p;            &= nbsp;        Length : 18
[52Eh 1326=    2]          =            Reserved : 000= 0
[530h 1328   4]        = Local GIC Hardware ID : 00000000
[534h 1332   8]  =             &nb= sp;  Base Address : 0000000030000000
[53Ch 1340   4]&nb= sp;            =   Interrupt Base : 00000000
[540h 1344   1]  =             &nb= sp;       Version : 03
[541h 1345 &= nbsp; 3]           &= nbsp;         Reserved : 000000

[544h 1348   1]       =          Subtable Type : 0E [Generi= c Interrupt Redistributor]
[545h 1349   1]   =             &nb= sp;       Length : 10
[546h 1350 &n= bsp; 2]           &n= bsp;         Reserved : 0000
[= 548h 1352   8]        &nb= sp;        Base Address : 00000000301C00= 00
[550h 1360   4]       =             &nb= sp;   Length : 01000000

[554h 1364   1] = ;            &n= bsp;  Subtable Type : 0E [Generic Interrupt Redistributor]
[555h = 1365   1]         &n= bsp;            = ; Length : 10
[556h 1366   2]     &= nbsp;           &nbs= p;   Reserved : 0000
[558h 1368   8]  &n= bsp;            = ;  Base Address : 00000400301C0000
[560h 1376   4] = ;            &n= bsp;         Length : 01000000

[564h 1380   1]       &= nbsp;        Subtable Type : 0E [Generic= Interrupt Redistributor]
[565h 1381   1]   &= nbsp;           &nbs= p;       Length : 10
[566h 1382 &nb= sp; 2]           &nb= sp;         Reserved : 0000
[5= 68h 1384   8]        &nbs= p;        Base Address : 00000800301C000= 0
[570h 1392   4]       &= nbsp;           &nbs= p;   Length : 01000000

[574h 1396   1] =             &nb= sp;  Subtable Type : 0E [Generic Interrupt Redistributor]
[575h 1= 397   1]         &nb= sp;            = Length : 10
[576h 1398   2]     &n= bsp;            = ;   Reserved : 0000
[578h 1400   8]  &nb= sp;            =   Base Address : 00000C00301C0000
[580h 1408   4] =             &nb= sp;         Length : 01000000
=
[584h 1412   1]       &n= bsp;        Subtable Type : 0F [Generic = Interrupt Translator]
[585h 1413   1]    = ;            &n= bsp;      Length : 14
[586h 1414   = 2]            &= nbsp;        Reserved : 0000
[588h = 1416   4]         &n= bsp;     Translation ID : 00000000
[58Ch 1420 = ;  8]           = ;      Base Address : 0000000030040000
[594h = 1428   4]         &n= bsp;           Reserved := 00000000

[598h 1432   1]     = ;           Subtable Type= : 0F [Generic Interrupt Translator]
[599h 1433   1] &n= bsp;            = ;         Length : 14
[59Ah 14= 34   2]         &nbs= p;           Reserved : 0= 000
[59Ch 1436   4]       = ;        Translation ID : 00000001
= [5A0h 1440   8]        &n= bsp;        Base Address : 0000000030080= 000
[5A8h 1448   4]       = ;            &n= bsp; Reserved : 00000000

[5ACh 1452   1]  &n= bsp;            = ; Subtable Type : 0F [Generic Interrupt Translator]
[5ADh 1453 &n= bsp; 1]           &n= bsp;           Length : 1= 4
[5AEh 1454   2]       &= nbsp;           &nbs= p; Reserved : 0000
[5B0h 1456   4]    &n= bsp;          Translation ID := 00000002
[5B4h 1460   8]      = ;           Base Address = : 00000000300C0000
[5BCh 1468   4]    &n= bsp;            = ;    Reserved : 00000000

[5C0h 1472   1= ]            &n= bsp;   Subtable Type : 0F [Generic Interrupt Translator]
[5C= 1h 1473   1]         = ;            &n= bsp; Length : 14
[5C2h 1474   2]    &nbs= p;            &= nbsp;   Reserved : 0000
[5C4h 1476   4]  = ;             T= ranslation ID : 00000003
[5C8h 1480   8]   &n= bsp;            = ; Base Address : 0000000030100000
[5D0h 1488   4]  = ;            &n= bsp;      Reserved : 00000000

[5D4h 149= 2   1]          = ;      Subtable Type : 0F [Generic Interrupt Trans= lator]
[5D5h 1493   1]      &n= bsp;            = ;    Length : 14
[5D6h 1494   2]  &= nbsp;           &nbs= p;      Reserved : 0000
[5D8h 1496  = ; 4]            = ;   Translation ID : 00000004
[5DCh 1500   8] = ;            &n= bsp;   Base Address : 0000000030140000
[5E4h 1508  = ; 4]            = ;         Reserved : 00000000
=
[5E8h 1512   1]       &n= bsp;        Subtable Type : 0F [Generic = Interrupt Translator]
[5E9h 1513   1]    = ;            &n= bsp;      Length : 14
[5EAh 1514   = 2]            &= nbsp;        Reserved : 0000
[5ECh = 1516   4]         &n= bsp;     Translation ID : 00000005
[5F0h 1520 = ;  8]           = ;      Base Address : 0000000030180000
[5F8h = 1528   4]         &n= bsp;           Reserved := 00000000

Raw Table Data: Length 1532 (0x5FC)

 &= nbsp;  0000: 41 50 49 43 FC 05 00 00 05 0B 41 52 4D 4C 54 44  // = APIC......ARMLTD
    0010: 41 52 4D 53 47 49 20 20 28 0= 7 22 20 41 52 4D 20  // ARMSGI  (." ARM
    = 0020: 99 29 00 00 00 00 00 00 00 00 00 00 0B 50 00 00  // .)..........= .P..
    0030: 00 00 00 00 00 00 00 00 01 00 00 00 00 0= 0 00 00  // ................
    0040: 17 00 00 00= 00 00 00 00 00 00 00 00 00 00 00 00  // ................
 &= nbsp;  0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // = ................
    0060: 00 00 00 00 19 00 00 00 00 0= 0 00 00 00 00 00 00  // ................
    0070:= 00 00 00 00 00 00 00 00 00 00 00 00 0B 50 00 00  // .............P..<= br />    0080: 00 00 00 00 01 00 00 00 01 00 00 00 00 00 00 = 00  // ................
    0090: 17 00 00 00 00 0= 0 00 00 00 00 00 00 00 00 00 00  // ................
  =   00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // .....= ...........
    00B0: 00 00 00 00 19 00 00 00 00 00 00 = 00 00 00 00 00  // ................
    00C0: 00 0= 0 01 00 00 00 00 00 00 00 00 00 0B 50 00 00  // .............P..
=     00D0: 00 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00&nb= sp; // ................
    00E0: 17 00 00 00 00 00 00 = 00 00 00 00 00 00 00 00 00  // ................
   = ; 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ..........= ......
    0100: 00 00 00 00 19 00 00 00 00 00 00 00 00= 00 00 00  // ................
    0110: 00 00 02 = 00 00 00 00 00 00 00 00 00 0B 50 00 00  // .............P..
 = ;   0120: 00 00 00 00 03 00 00 00 01 00 00 00 00 00 00 00  /= / ................
    0130: 17 00 00 00 00 00 00 00 00= 00 00 00 00 00 00 00  // ................
    014= 0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ...............= .
    0150: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 0= 0 00  // ................
    0160: 00 00 03 00 00= 00 00 00 00 00 00 00 0B 50 00 00  // .............P..
 &nbs= p;  0170: 00 00 00 00 04 00 00 00 01 00 00 00 00 00 00 00  // ...= .............
    0180: 17 00 00 00 00 00 00 00 00 00 0= 0 00 00 00 00 00  // ................
    0190: 00= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
    01A0: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00&= nbsp; // ................
    01B0: 00 00 00 00 01 00 0= 0 00 00 00 00 00 0B 50 00 00  // .............P..
  &nb= sp; 01C0: 00 00 00 00 05 00 00 00 01 00 00 00 00 00 00 00  // ........= ........
    01D0: 17 00 00 00 00 00 00 00 00 00 00 00 = 00 00 00 00  // ................
    01E0: 00 00 0= 0 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
&nb= sp;   01F0: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00 = // ................
    0200: 00 00 01 00 01 00 00 00 = 00 00 00 00 0B 50 00 00  // .............P..
    0= 210: 00 00 00 00 06 00 00 00 01 00 00 00 00 00 00 00  // .............= ...
    0220: 17 00 00 00 00 00 00 00 00 00 00 00 00 00= 00 00  // ................
    0230: 00 00 00 00 = 00 00 00 00 00 00 00 00 00 00 00 00  // ................
 &n= bsp;  0240: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00  // .= ...............
    0250: 00 00 02 00 01 00 00 00 00 00= 00 00 0B 50 00 00  // .............P..
    0260: = 00 00 00 00 07 00 00 00 01 00 00 00 00 00 00 00  // ................    0270: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0= 0  // ................
    0280: 00 00 00 00 00 00= 00 00 00 00 00 00 00 00 00 00  // ................
  &= nbsp; 0290: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00  // ......= ..........
    02A0: 00 00 03 00 01 00 00 00 00 00 00 0= 0 0B 50 00 00  // .............P..
    02B0: 00 00= 00 00 08 00 00 00 01 00 00 00 00 00 00 00  // ................
&= nbsp;   02C0: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00&nbs= p; // ................
    02D0: 00 00 00 00 00 00 00 0= 0 00 00 00 00 00 00 00 00  // ................
   = 02E0: 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00  // ...........= .....
    02F0: 00 00 00 00 02 00 00 00 00 00 00 00 0B = 50 00 00  // .............P..
    0300: 00 00 00 0= 0 09 00 00 00 01 00 00 00 00 00 00 00  // ................
 =    0310: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  //= ................
    0320: 00 00 00 00 00 00 00 00 00 = 00 00 00 00 00 00 00  // ................
    0330= : 00 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00  // ................=
    0340: 00 00 01 00 02 00 00 00 00 00 00 00 0B 50 00= 00  // .............P..
    0350: 00 00 00 00 0A = 00 00 00 01 00 00 00 00 00 00 00  // ................
  = ;  0360: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ....= ............
    0370: 00 00 00 00 00 00 00 00 00 00 00= 00 00 00 00 00  // ................
    0380: 00 = 00 00 00 19 00 00 00 00 00 00 00 00 00 00 00  // ................
    0390: 00 00 02 00 02 00 00 00 00 00 00 00 0B 50 00 00&n= bsp; // .............P..
    03A0: 00 00 00 00 0B 00 00= 00 01 00 00 00 00 00 00 00  // ................
  &nbs= p; 03B0: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // .........= .......
    03C0: 00 00 00 00 00 00 00 00 00 00 00 00 0= 0 00 00 00  // ................
    03D0: 00 00 00= 00 19 00 00 00 00 00 00 00 00 00 00 00  // ................
&nbs= p;   03E0: 00 00 03 00 02 00 00 00 00 00 00 00 0B 50 00 00  = // .............P..
    03F0: 00 00 00 00 0C 00 00 00 0= 1 00 00 00 00 00 00 00  // ................
    04= 00: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ..............= ..
    0410: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 = 00 00  // ................
    0420: 00 00 00 00 1= 9 00 00 00 00 00 00 00 00 00 00 00  // ................
 &nb= sp;  0430: 00 00 00 00 03 00 00 00 00 00 00 00 0B 50 00 00  // ..= ...........P..
    0440: 00 00 00 00 0D 00 00 00 01 00 = 00 00 00 00 00 00  // ................
    0450: 1= 7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................    0460: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=   // ................
    0470: 00 00 00 00 19 00 = 00 00 00 00 00 00 00 00 00 00  // ................
  &n= bsp; 0480: 00 00 01 00 03 00 00 00 00 00 00 00 0B 50 00 00  // .......= ......P..
    0490: 00 00 00 00 0E 00 00 00 01 00 00 00= 00 00 00 00  // ................
    04A0: 17 00 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // ................
&n= bsp;   04B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 = ; // ................
    04C0: 00 00 00 00 19 00 00 00= 00 00 00 00 00 00 00 00  // ................
    = 04D0: 00 00 02 00 03 00 00 00 00 00 00 00 0B 50 00 00  // ............= .P..
    04E0: 00 00 00 00 0F 00 00 00 01 00 00 00 00 0= 0 00 00  // ................
    04F0: 17 00 00 00= 00 00 00 00 00 00 00 00 00 00 00 00  // ................
 &= nbsp;  0500: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  // = ................
    0510: 00 00 00 00 19 00 00 00 00 0= 0 00 00 00 00 00 00  // ................
    0520:= 00 00 03 00 03 00 00 00 00 00 00 00 0C 18 00 00  // ................<= br />    0530: 00 00 00 00 00 00 00 30 00 00 00 00 00 00 00 = 00  // .......0........
    0540: 03 00 00 00 0E 1= 0 00 00 00 00 1C 30 00 00 00 00  // ...........0....
  =   0550: 00 00 00 01 0E 10 00 00 00 00 1C 30 00 04 00 00  // .....= ......0....
    0560: 00 00 00 01 0E 10 00 00 00 00 1C = 30 00 08 00 00  // ...........0....
    0570: 00 0= 0 00 01 0E 10 00 00 00 00 1C 30 00 0C 00 00  // ...........0....
=     0580: 00 00 00 01 0F 14 00 00 00 00 00 00 00 00 04 30&nb= sp; // ...............0
    0590: 00 00 00 00 00 00 00 = 00 0F 14 00 00 01 00 00 00  // ................
   = ; 05A0: 00 00 08 30 00 00 00 00 00 00 00 00 0F 14 00 00  // ...0......= ......
    05B0: 02 00 00 00 00 00 0C 30 00 00 00 00 00= 00 00 00  // .......0........
    05C0: 0F 14 00 = 00 03 00 00 00 00 00 10 30 00 00 00 00  // ...........0....
 = ;   05D0: 00 00 00 00 0F 14 00 00 04 00 00 00 00 00 14 30  /= / ...............0
    05E0: 00 00 00 00 00 00 00 00 0F= 14 00 00 05 00 00 00  // ................
    05F= 0: 00 00 18 30 00 00 00 00 00 00 00 00      &= nbsp;       // ...0........

[/snip]

[/SAMI]

[Nishant]
I manually traversed through the code logic with the example= given above and I think the logic can handle it.
Could you please poi= nt out the exact problem with the patch?
[/Nishant]
Please point m= e to the documentation or code that has a standardised way of updating the = ACPI table.

[SAMI] There is a reference implementation at https://github.com/tianocore/edk2-platforms/blo= b/master/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager= Dxe/ConfigurationManager.c#L475-L487

[Nishant]
This expects the GIC structure to be present linearly in the= memory.
The algorithm implemented in the code is flexible. It checks = the ID of each node present in the table and processes it only if it is of = type EFI_ACPI_6_4_GIC(0xB).
[/Nishant]
Regarding the = use of the Dynamic Table Framework, there are no short-term plans to migrat= e to it.
For the use of dynamic table 
[/Nishant]

+      GicStructure =3D (EFI_ACPI_6_4_GIC_STRU=
CTURE *)StructureListHead;

+      // Disable the CPU if its MPID is present in the list.

+      MpidPresent =3D CheckIfMpidIsPresent(

+        HobData->IsolatedCpuList.Mpid,

+        HobData->IsolatedCpuList.Count,

+        GicStructure->MPIDR

+        );

+      if (MpidPresent =3D=3D TRUE) {

+        DEBUG ((

+          DEBUG_INFO,

+          "Disabling Core: %lu, MPID: 0x%llx in MADT\n",

+          GicStructure->AcpiProcessorUid,

+          GicStructure->MPIDR

+          ));

+        GicStructure->Flags =3D 0;

+      }

+    }

+

+    // Second element in the structure component header is length

+    StructureListHead +=3D StructureListHead[1];

+  }

+}

+

+/**

+  Callback to validate and/or update ACPI table.

+

+  On finding a MADT table, disable the isolated CPUs in the MADT table. Th=
e

+  list of isolated CPUs are obtained from the HOB data.

+

+  @param[in] AcpiHeader  Target ACPI table.

+

+  @retval  TURE   Table validated/updated successfully.

+  @retval  FALSE  Error in Table validation/updation.

+**/

+STATIC

+BOOLEAN

+CheckAndUpdateAcpiTable (

+  IN EFI_ACPI_DESCRIPTION_HEADER  *AcpiHeader

+  )

+{

+  VOID *SystemIdHob;

+  SGI_PLATFORM_DESCRIPTOR *HobData;

+

+  // This check updates the MADT table to disable isolated CPUs present on=
 the

+  // platform.

+  if (AcpiHeader->Signature =3D=3D EFI_ACPI_1_0_APIC_SIGNATURE) {
[SAMI] Why EFI_ACPI_6_4_MULTIPLE_APIC_DESCR= IPTION_TABLE_SIGNATURE is not used here?
[Nishant] I will update in the next version.
+    SystemIdHob =3D GetFirstGuidHob (&gAr=
mSgiPlatformIdDescriptorGuid);

+    if (SystemIdHob !=3D NULL) {

+      HobData =3D (SGI_PLATFORM_DESCRIPTOR *)GET_GUID_HOB_DATA (SystemIdHo=
b);

+      UpdateMadtTable (AcpiHeader, HobData);

+    }

+  }

+

+  return TRUE;

+}

+

 EFI_STATUS

 EFIAPI

 ArmSgiPkgEntryPoint (

@@ -25,7 +149,10 @@ ArmSgiPkgEntryPoint (
 {

   EFI_STATUS              Status;

=20

-  Status =3D LocateAndInstallAcpiFromFv (&gArmSgiAcpiTablesGuid);

+  Status =3D LocateAndInstallAcpiFromFvConditional (

+             &gArmSgiAcpiTablesGuid,

+             &CheckAndUpdateAcpiTable

+             );

   if (EFI_ERROR (Status)) {

     DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables\n", __FUNCTION=
__));

     return Status;

diff --git a/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c b=
/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c
index 7df52cc4fd7c..f778dc8ac7c1 100644
--- a/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c
+++ b/Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c
@@ -1,6 +1,6 @@
 /** @file

 *

-*  Copyright (c) 2018, ARM Limited. All rights reserved.

+*  Copyright (c) 2018-2022, ARM Limited. All rights reserved.

 *

 *  SPDX-License-Identifier: BSD-2-Clause-Patent

 *

@@ -38,6 +38,8 @@ GetSgiSystemId (
   CONST VOID                    *NtFwCfgDtBlob;

   SGI_NT_FW_CONFIG_INFO_PPI     *NtFwConfigInfoPpi;

   EFI_STATUS                    Status;

+  UINT64                        IsolatedCpuCount;

+  UINT64                        CoreCount;

=20

   Status =3D PeiServicesLocatePpi (&gNtFwConfigDtInfoPpiGuid, 0, NULL,

              (VOID**)&NtFwConfigInfoPpi);

@@ -83,6 +85,32 @@ GetSgiSystemId (
     HobData->MultiChipMode =3D fdt32_to_cpu (*Property);

   }

=20

+  Property =3D fdt_getprop (NtFwCfgDtBlob, Offset, "isolated-cpu-list", NU=
LL);

+  if (Property =3D=3D NULL) {

+    DEBUG ((DEBUG_INFO, "%s property not found\n", "isolated-cpu-list"));

+    HobData->IsolatedCpuList.Count =3D 0;

+  } else {

+    CopyMem (&IsolatedCpuCount, Property, sizeof (IsolatedCpuCount));

+    CoreCount =3D

+      FixedPcdGet32 (PcdChipCount) *

+      FixedPcdGet32 (PcdClusterCount) *

+      FixedPcdGet32 (PcdCoreCount);

+    if (IsolatedCpuCount > CoreCount) {

+      DEBUG ((

+            DEBUG_ERROR,

+            "IsolatedCpuCount(%u) is higher than CoreCount(%u)\n",

+            IsolatedCpuCount,

+            CoreCount

+            ));

+      return EFI_SUCCESS;
[SAMI] Is the status code returned here correct? Should this be EFI_INVALID= _PARAMETER? Also the function name GetSgiSystemId() seems to no longer refl= ect what the function does. Hace you considered renaming it.
[Nishant]
This is done intentionally, we want to keep booting even if = the config provided is corrupted.

I will update the function nam= e in the next version.
[/Nishant]
+    }

+    CopyMem (

+      &HobData->IsolatedCpuList,

+      Property,

+      sizeof(HobData->IsolatedCpuList) + (CoreCount * sizeof(UINT64))
[SAMI] Coding convention is not followed here and at other places. Can you = fix, please?
[Nishant] Will update in the next patch version.
+      );

+  }

+

   return EFI_SUCCESS;

 }

=20

@@ -104,11 +132,24 @@ SgiPlatformPeim (
 {

   SGI_PLATFORM_DESCRIPTOR       *HobData;

   EFI_STATUS                    Status;

+  UINT64                        CoreCount;

+  UINTN                         HobSize;

=20

+  CoreCount =3D

+    FixedPcdGet32 (PcdChipCount) *

+    FixedPcdGet32 (PcdClusterCount) *

+    FixedPcdGet32 (PcdCoreCount);

+

+  // Additional size for SGI_ISOLATED_CPU_LIST.

+  // Size =3D (MPID register size in bytes * CoreCount) +

+  //        sizeof(SGI_PLATFORM_DESCRIPTOR)

+  HobSize =3D

+    sizeof (SGI_PLATFORM_DESCRIPTOR) +

+    (CoreCount * sizeof(UINT64));

   // Create platform descriptor HOB

   HobData =3D (SGI_PLATFORM_DESCRIPTOR *)BuildGuidHob (

                                          &gArmSgiPlatformIdDescriptorG=
uid,

-                                         sizeof (SGI_PLATFORM_DESCRIPTOR))=
;

+                                         HobSize);

=20

   // Get the system id from the platform specific nt_fw_config device tree

   if (HobData =3D=3D NULL) {

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IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. If you are not the intended recipient, p= lease notify the sender immediately and do not disclose the contents to any= other person, use it for any purpose, or store or copy the information in = any medium. Thank you.
--98xv8hXXwqhKRvieDDKG--