From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mx.groups.io with SMTP id smtpd.web12.5424.1626052808517988836 for ; Sun, 11 Jul 2021 18:20:18 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.115, mailfrom: min.m.xu@intel.com) X-IronPort-AV: E=McAfee;i="6200,9189,10042"; a="209726410" X-IronPort-AV: E=Sophos;i="5.84,232,1620716400"; d="scan'208";a="209726410" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jul 2021 18:20:18 -0700 X-IronPort-AV: E=Sophos;i="5.84,232,1620716400"; d="scan'208";a="459018175" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.4.4]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jul 2021 18:20:16 -0700 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu , Eric Dong , Ray Ni , Jiewen Yao , Laszlo Ersek Subject: [PATCH 5/6] UefiCpuPkg/ResetVector: Add Main32 entry point in Main.asm Date: Mon, 12 Jul 2021 09:19:41 +0800 Message-Id: <196ca7415612858fa81885a4d4eb85cb09ea67e2.1626050798.git.min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 In Tdx all CPUs "reset" to run on 32-bit protected mode with flat descriptor (paging disabled). Main32 entry point is added in UefiCpuPkg/ResetVector/Vtf0/Main.asm so that Main.asm can support the 32-bit protected mode. InitTdx.asm and ReloadFlat32.asm are added in Vtf0/Vtf0.nasmb as well. Cc: Eric Dong Cc: Ray Ni Cc: Jiewen Yao Cc: Laszlo Ersek Signed-off-by: Min Xu --- UefiCpuPkg/ResetVector/Vtf0/Main.asm | 45 ++++++++++++++++++++++++++ UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 2 ++ 2 files changed, 47 insertions(+) diff --git a/UefiCpuPkg/ResetVector/Vtf0/Main.asm b/UefiCpuPkg/ResetVector/Vtf0/Main.asm index 19d08482f831..90e1dc678233 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Main.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/Main.asm @@ -36,6 +36,51 @@ Main16: BITS 32 +%ifdef ARCH_X64 + + jmp SearchBfv + +; +; Modified: EBX, ECX, EDX, EBP, EDI, ESP +; +; @param[in,out] RAX/EAX 0 +; @param[in] RFLAGS 2 +; @param[in] RCX [31:0] TDINITVP - Untrusted Configuration +; [63:32] 0 +; @param[in] RDX [31:0] VCPUID +; [63:32] 0 +; @param[in] RBX [6:0] CPU supported GPA width +; [7:7] 5 level page table support +; [63:8] 0 +; @param[in] RSI [31:0] VCPU_Index +; [63:32] 0 +; @param[in] RDI/EDI 0 +; @param[in] RBP/EBP 0 +; @param[in] R8 Same as RCX +; @param[out] RBP/EBP Address of Boot Firmware Volume (BFV) +; @param[out] DS Selector allowing flat access to all addresses +; @param[out] ES Selector allowing flat access to all addresses +; @param[out] FS Selector allowing flat access to all addresses +; @param[out] GS Selector allowing flat access to all addresses +; @param[out] SS Selector allowing flat access to all addresses +; +; @return None This routine jumps to SEC and does not return +Main32: + ; + ; Save EBX in EBP because EBX will be changed in ReloadFlat32 + ; + mov ebp, ebx + + OneTimeCall ReloadFlat32 + + ; + ; Init Tdx + ; + OneTimeCall InitTdx + +%endif + +SearchBfv: ; ; Search for the Boot Firmware Volume (BFV) ; diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb index 493738c79c1c..663d6ddc4d24 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb +++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb @@ -51,6 +51,8 @@ %include "Ia32/SearchForSecEntry.asm" %ifdef ARCH_X64 +%include "Ia32/InitTdx.asm" +%include "Ia32/ReloadFlat32.asm" %include "Ia32/Flat32ToFlat64.asm" %include "Ia32/PageTables64.asm" %endif -- 2.29.2.windows.2