From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.nue.novell.com (smtp.nue.novell.com [195.135.221.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9A85F1A1E59 for ; Thu, 28 Jul 2016 20:26:33 -0700 (PDT) Received: from GaryWorkstation.apac.novell.com (ip-203-192-156-9.asianetcom.net [203.192.156.9]) by smtp.nue.novell.com with ESMTP (NOT encrypted); Fri, 29 Jul 2016 05:26:30 +0200 From: Gary Lin To: edk2-devel@lists.01.org Cc: David Wei Date: Fri, 29 Jul 2016 11:25:34 +0800 Message-Id: <20160729032538.17730-16-glin@suse.com> X-Mailer: git-send-email 2.9.2 In-Reply-To: <20160729032538.17730-1-glin@suse.com> References: <20160729032538.17730-1-glin@suse.com> MIME-Version: 1.0 Subject: [PATCH v2 15/19] Vlv2TbltDevicePkg/PlatformDxe: Remove the unused variables X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Jul 2016 03:26:34 -0000 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix the following errors from gcc: Vlv2TbltDevicePkg/PlatformDxe/Platform.c: In function ‘InitPciDevPME’: Vlv2TbltDevicePkg/PlatformDxe/Platform.c:516:26: error: variable ‘Status’ set but not used [-Werror=unused-but-set-variable] Vlv2TbltDevicePkg/PlatformDxe/Platform.c: In function ‘InitThermalZone’: Vlv2TbltDevicePkg/PlatformDxe/Platform.c:575:26: error: variable ‘Status’ set but not used [-Werror=unused-but-set-variable] Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c: In function ‘InitializeSubsystemIds’: Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c:111:10: error: variable ‘SubsystemAudioVidDid’ set but not used [-Werror=unused-but-set-variable] Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c: In function ‘InitBadBars’: Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c:115:40: error: variable ‘PciIoDevice’ set but not used [-Werror=unused-but-set-variable] Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c:114:39: error: variable ‘Status’ set but not used [-Werror=unused-but-set-variable] Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c: In function ‘ProgramPciLatency’: Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c:320:39: error: variable ‘Status’ set but not used [-Werror=unused-but-set-variable] Cc: David Wei Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Lin Reviewed-by: David Wei --- Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c | 2 - Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c | 214 ++++++++++++++-------------- Vlv2TbltDevicePkg/PlatformDxe/Platform.c | 40 +++--- 3 files changed, 123 insertions(+), 133 deletions(-) diff --git a/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c b/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c index 06d325c..4569ce5 100644 --- a/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c +++ b/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c @@ -99,10 +99,8 @@ InitializeSubsystemIds ( EFI_REG_TABLE *RegTablePtr; UINT32 SubsystemVidDid; - UINT32 SubsystemAudioVidDid; SubsystemVidDid = mPlatformInfo.SsidSvid; - SubsystemAudioVidDid = mPlatformInfo.SsidSvid; RegTablePtr = mSubsystemIdRegs; diff --git a/Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c b/Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c index 16aaa18..8c2bfff 100644 --- a/Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c +++ b/Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c @@ -102,8 +102,6 @@ InitBadBars( ) { - EFI_STATUS Status; - PCI_IO_DEVICE *PciIoDevice; UINT64 BaseAddress = 0; UINT64 TempBaseAddress = 0; UINT8 RevId = 0; @@ -112,8 +110,6 @@ InitBadBars( UINT64 MemSize; UINTN MemSizeBits; - - PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (PciIo); switch ( VendorId) { case ATI_VENDOR_ID: // @@ -124,31 +120,31 @@ InitBadBars( // // Get original BAR address // - Status = PciIo->Pci.Read ( - PciIo, - EfiPciIoWidthUint32, - Bar, - 1, - (VOID *) &BaseAddress - ); + PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint32, + Bar, + 1, + (VOID *) &BaseAddress + ); // // Find BAR size // TempBaseAddress = 0xffffffff; - Status = PciIo->Pci.Write ( - PciIo, - EfiPciIoWidthUint32, - Bar, - 1, - (VOID *) &TempBaseAddress - ); - Status = PciIo->Pci.Read ( - PciIo, - EfiPciIoWidthUint32, - Bar, - 1, - (VOID *) &TempBaseAddress - ); + PciIo->Pci.Write ( + PciIo, + EfiPciIoWidthUint32, + Bar, + 1, + (VOID *) &TempBaseAddress + ); + PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint32, + Bar, + 1, + (VOID *) &TempBaseAddress + ); TempBaseAddress &= 0xfffffffe; MemSize = 1; while ((TempBaseAddress & 0x01) == 0) { @@ -159,32 +155,32 @@ InitBadBars( // // Free up allocated memory memory and re-allocate with increased size. // - Status = gDS->FreeMemorySpace ( - BaseAddress, - MemSize - ); + gDS->FreeMemorySpace ( + BaseAddress, + MemSize + ); // // Force new alignment // MemSize = 0x8000000; MemSizeBits = 28; - Status = gDS->AllocateMemorySpace ( - EfiGcdAllocateAnySearchBottomUp, - EfiGcdMemoryTypeMemoryMappedIo, - MemSizeBits, // Alignment - MemSize, - &BaseAddress, - mImageHandle, - NULL - ); - Status = PciIo->Pci.Write ( - PciIo, - EfiPciIoWidthUint32, - Bar, - 1, - (VOID *) &BaseAddress - ); + gDS->AllocateMemorySpace ( + EfiGcdAllocateAnySearchBottomUp, + EfiGcdMemoryTypeMemoryMappedIo, + MemSizeBits, // Alignment + MemSize, + &BaseAddress, + mImageHandle, + NULL + ); + PciIo->Pci.Write ( + PciIo, + EfiPciIoWidthUint32, + Bar, + 1, + (VOID *) &BaseAddress + ); break; case NCR_VENDOR_ID: @@ -195,22 +191,22 @@ InitBadBars( // for (Bar = 0x10; Bar < 0x28; Bar+= 4) { - Status = PciIo->Pci.Read ( - PciIo, - EfiPciIoWidthUint32, - Bar, - 1, - (VOID *) &BaseAddress - ); + PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint32, + Bar, + 1, + (VOID *) &BaseAddress + ); if (BaseAddress && 0x01) { TempBaseAddress = 0xffffffff; - Status = PciIo->Pci.Write ( - PciIo, - EfiPciIoWidthUint32, - Bar, - 1, - (VOID *) &TempBaseAddress - ); + PciIo->Pci.Write ( + PciIo, + EfiPciIoWidthUint32, + Bar, + 1, + (VOID *) &TempBaseAddress + ); TempBaseAddress &= 0xfffffffc; IoSize = 1; while ((TempBaseAddress & 0x01) == 0) { @@ -218,28 +214,28 @@ InitBadBars( IoSize = IoSize << 1; } if (IoSize < MIN_NCR_IO_SIZE) { - Status = gDS->FreeIoSpace ( - BaseAddress, - IoSize - ); - - Status = gDS->AllocateIoSpace ( - EfiGcdAllocateAnySearchTopDown, - EfiGcdIoTypeIo, - NCR_GRAN, // Alignment - MIN_NCR_IO_SIZE, - &BaseAddress, - mImageHandle, - NULL - ); + gDS->FreeIoSpace ( + BaseAddress, + IoSize + ); + + gDS->AllocateIoSpace ( + EfiGcdAllocateAnySearchTopDown, + EfiGcdIoTypeIo, + NCR_GRAN, // Alignment + MIN_NCR_IO_SIZE, + &BaseAddress, + mImageHandle, + NULL + ); TempBaseAddress = BaseAddress + 1; - Status = PciIo->Pci.Write ( - PciIo, - EfiPciIoWidthUint32, - Bar, - 1, - (VOID *) &TempBaseAddress - ); + PciIo->Pci.Write ( + PciIo, + EfiPciIoWidthUint32, + Bar, + 1, + (VOID *) &TempBaseAddress + ); } } } @@ -255,13 +251,13 @@ InitBadBars( // Controller. // All Tekoa A2 or earlier step chips for now. // - Status = PciIo->Pci.Read ( - PciIo, - EfiPciIoWidthUint8, - PCI_REVISION_ID_OFFSET, - 1, - &RevId - ); + PciIo->Pci.Read ( + PciIo, + EfiPciIoWidthUint8, + PCI_REVISION_ID_OFFSET, + 1, + &RevId + ); if (RevId <= 0x02) { for (Bar = 0x14; Bar < 0x24; Bar+= 4) { // @@ -269,13 +265,13 @@ InitBadBars( // Bars don't worry aboyut freeing up thge allocs. // TempBaseAddress = 0x0; - Status = PciIo->Pci.Write ( - PciIo, - EfiPciIoWidthUint32, - Bar, - 1, - (VOID *) &TempBaseAddress - ); + PciIo->Pci.Write ( + PciIo, + EfiPciIoWidthUint32, + Bar, + 1, + (VOID *) &TempBaseAddress + ); } // end for } else @@ -286,13 +282,13 @@ InitBadBars( //since Tekoa does not fully support IDE Bus Mastering // TempBaseAddress = 0x0; - Status = PciIo->Pci.Write ( - PciIo, - EfiPciIoWidthUint32, - 0x20, - 1, - (VOID *) &TempBaseAddress - ); + PciIo->Pci.Write ( + PciIo, + EfiPciIoWidthUint32, + 0x20, + 1, + (VOID *) &TempBaseAddress + ); } } break; @@ -308,19 +304,17 @@ ProgramPciLatency( IN EFI_PCI_IO_PROTOCOL *PciIo ) { - EFI_STATUS Status; - // // Program Master Latency Timer // if (mSystemConfiguration.PciLatency != 0) { - Status = PciIo->Pci.Write ( - PciIo, - EfiPciIoWidthUint8, - PCI_LATENCY_TIMER_OFFSET, - 1, - &mSystemConfiguration.PciLatency - ); + PciIo->Pci.Write ( + PciIo, + EfiPciIoWidthUint8, + PCI_LATENCY_TIMER_OFFSET, + 1, + &mSystemConfiguration.PciLatency + ); } return; } diff --git a/Vlv2TbltDevicePkg/PlatformDxe/Platform.c b/Vlv2TbltDevicePkg/PlatformDxe/Platform.c index 439b6d9..3d8cbe0 100644 --- a/Vlv2TbltDevicePkg/PlatformDxe/Platform.c +++ b/Vlv2TbltDevicePkg/PlatformDxe/Platform.c @@ -518,16 +518,15 @@ InitPciDevPME ( ) { UINTN VarSize; - EFI_STATUS Status; VarSize = sizeof(SYSTEM_CONFIGURATION); - Status = gRT->GetVariable( - NORMAL_SETUP_NAME, - &gEfiNormalSetupGuid, - NULL, - &VarSize, - &mSystemConfiguration - ); + gRT->GetVariable( + NORMAL_SETUP_NAME, + &gEfiNormalSetupGuid, + NULL, + &VarSize, + &mSystemConfiguration + ); // //Program HDA PME_EN @@ -577,21 +576,20 @@ InitThermalZone ( ) { UINTN VarSize; - EFI_STATUS Status; EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea; VarSize = sizeof(SYSTEM_CONFIGURATION); - Status = gRT->GetVariable( - NORMAL_SETUP_NAME, - &gEfiNormalSetupGuid, - NULL, - &VarSize, - &mSystemConfiguration - ); - Status = gBS->LocateProtocol ( - &gEfiGlobalNvsAreaProtocolGuid, - NULL, - (void **)&GlobalNvsArea - ); + gRT->GetVariable( + NORMAL_SETUP_NAME, + &gEfiNormalSetupGuid, + NULL, + &VarSize, + &mSystemConfiguration + ); + gBS->LocateProtocol ( + &gEfiGlobalNvsAreaProtocolGuid, + NULL, + (void **)&GlobalNvsArea + ); GlobalNvsArea->Area->CriticalThermalTripPoint = mSystemConfiguration.CriticalThermalTripPoint; GlobalNvsArea->Area->PassiveThermalTripPoint = mSystemConfiguration.PassiveThermalTripPoint; } -- 2.9.2