From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x22b.google.com (mail-wm0-x22b.google.com [IPv6:2a00:1450:400c:c09::22b]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 03F671A1DF3 for ; Thu, 11 Aug 2016 01:38:56 -0700 (PDT) Received: by mail-wm0-x22b.google.com with SMTP id i5so151236wmg.0 for ; Thu, 11 Aug 2016 01:38:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=fJFy7jwy0JJcwW+lWsuCKE7MN1E4BbKxisdHObL3I/Y=; b=kQwyUn17NgzRd+67EBSdMAfE/LOwfyRm7aw3DqEJlWA02+JdGpwm7z79XQw/gRNYnt Giry5KOVkJf8CsLECNmVdGqxd/UJLOQrdOOtOV2Q8HOgF4kORlX7jNpyS2JzYJaH3AyB kqfnEbj8AHvqfQzBm9WY7PPF0VCSA0VR1lIxU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=fJFy7jwy0JJcwW+lWsuCKE7MN1E4BbKxisdHObL3I/Y=; b=M8oNvbLlnE/HzU2MAb87Ga2NwOHzFY4gRBJdf/vLuN5q6zOwiiLtguJbiiq8Dyuaff 5jWXRLDXTR7epCms7IxOYPYq0x2+GjNSxGhUB7evoceA76SWtPgVeOtszGZSuvmiNBmS r4Wuor0QS2rkO8kirtEcxBOnc4mgWgm4YHbn6hU00II/SBzaQtiZ26QQvpa6iG/ZydoH ZmXFckX6B/FqnTvRmbUTNEZlog/EL0WldqK4Qdf56IwxjB2ePYwaqTGJ9EGXELufT/aW sVTmURFzgFzBZQMJmedJKaJFE6vre0A18fS0LNkruEYR7wxy7YZ3j1yiPTRGURmclLO3 8pZA== X-Gm-Message-State: AEkoouu2BEXHbiPBossut96C09hpIJAlebtThXQdVt9g+qa5/OgJbOJsVlnzXa3NnHIsJkql X-Received: by 10.28.40.212 with SMTP id o203mr7265201wmo.72.1470904734535; Thu, 11 Aug 2016 01:38:54 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id x6sm1537305wjk.26.2016.08.11.01.38.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Aug 2016 01:38:54 -0700 (PDT) Date: Thu, 11 Aug 2016 09:38:52 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, eugene@hp.com, lersek@redhat.com Message-ID: <20160811083852.GR31760@bivouac.eciton.net> References: <1470842282-8415-1-git-send-email-ard.biesheuvel@linaro.org> <1470842282-8415-24-git-send-email-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <1470842282-8415-24-git-send-email-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH 23/26] ArmPlatformPkg/PrePeiCore: switch to ASM_FUNC() asm macro X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Aug 2016 08:38:56 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Aug 10, 2016 at 05:17:59PM +0200, Ard Biesheuvel wrote: > Annotate functions with ASM_FUNC() so that they are emitted into > separate sections. Also replacing LoadConstantToReg. Add that to commit message and: Reviewed-by: Leif Lindholm > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- > ArmPlatformPkg/PrePeiCore/AArch64/Helper.S | 11 ++----- > ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S | 30 ++++---------------- > ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S | 9 ++---- > ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S | 30 ++++---------------- > ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S | 9 ++---- > 5 files changed, 18 insertions(+), 71 deletions(-) > > diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S b/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S > index 8e23b0389653..5f35484b1259 100644 > --- a/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S > +++ b/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S > @@ -14,15 +14,8 @@ > #include > #include > > -#start of the code section > -.text > -.align 3 > - > -GCC_ASM_EXPORT(SetupExceptionLevel1) > -GCC_ASM_EXPORT(SetupExceptionLevel2) > - > // Setup EL1 while in EL1 > -ASM_PFX(SetupExceptionLevel1): > +ASM_FUNC(SetupExceptionLevel1) > mov x5, x30 // Save LR > > mov x0, #CPACR_CP_FULL_ACCESS > @@ -31,7 +24,7 @@ ASM_PFX(SetupExceptionLevel1): > ret x5 > > // Setup EL2 while in EL2 > -ASM_PFX(SetupExceptionLevel2): > +ASM_FUNC(SetupExceptionLevel2) > msr sctlr_el2, xzr > mrs x0, hcr_el2 // Read EL2 Hypervisor configuration Register > > diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S > index 34bf3a4e6831..aab5edab0c42 100644 > --- a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S > +++ b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S > @@ -12,23 +12,8 @@ > // > > #include > -#include > -#include > -#include > > -.text > -.align 3 > - > -GCC_ASM_IMPORT(CEntryPoint) > -GCC_ASM_IMPORT(ArmPlatformGetCorePosition) > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore) > -GCC_ASM_IMPORT(ArmReadMpidr) > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction) > -GCC_ASM_EXPORT(_ModuleEntryPoint) > - > -StartupAddr: .8byte CEntryPoint > - > -ASM_PFX(_ModuleEntryPoint): > +ASM_FUNC(_ModuleEntryPoint) > // Do early platform specific actions > bl ASM_PFX(ArmPlatformPeiBootAction) > > @@ -60,9 +45,7 @@ ASM_PFX(MainEntryPoint): > bl ASM_PFX(ArmPlatformIsPrimaryCore) > > // Get the top of the primary stacks (and the base of the secondary stacks) > - LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), x1) > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2) > - add x1, x1, x2 > + MOV64 (x1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize)) > > // x0 is equal to 1 if I am the primary core > cmp x0, #1 > @@ -79,20 +62,19 @@ _SetupSecondaryCoreStack: > add x0, x0, #1 > > // StackOffset = CorePos * StackSize > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x2) > + MOV32 (x2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)) > mul x0, x0, x2 > // SP = StackBase + StackOffset > add sp, x6, x0 > > _PrepareArguments: > // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector > - LoadConstantToReg (FixedPcdGet64(PcdFvBaseAddress), x2) > - add x2, x2, #8 > - ldr x1, [x2] > + MOV64 (x2, FixedPcdGet64(PcdFvBaseAddress)) > + ldr x1, [x2, #8] > > // Move sec startup address into a data register > // Ensure we're jumping to FV version of the code (not boot remapped alias) > - ldr x3, StartupAddr > + ldr x3, =ASM_PFX(CEntryPoint) > > // Jump to PrePeiCore C code > // x0 = mp_id > diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S b/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S > index 8d83510517b4..89b98e630f5c 100644 > --- a/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S > +++ b/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S > @@ -14,12 +14,7 @@ > # > #------------------------------------------------------------------------------ > > -.text > -.align 3 > - > -GCC_ASM_EXPORT(SecSwitchStack) > - > - > +#include > > #/** > # This allows the caller to switch the stack and return > @@ -35,7 +30,7 @@ GCC_ASM_EXPORT(SecSwitchStack) > # VOID *StackDelta > # )# > # > -ASM_PFX(SecSwitchStack): > +ASM_FUNC(SecSwitchStack) > mov x1, sp > add x1, x0, x1 > mov sp, x1 > diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S > index 1693f52e26c8..14344425ad4c 100644 > --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S > +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S > @@ -12,23 +12,8 @@ > // > > #include > -#include > -#include > -#include > > -.text > -.align 3 > - > -GCC_ASM_IMPORT(CEntryPoint) > -GCC_ASM_IMPORT(ArmPlatformGetCorePosition) > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore) > -GCC_ASM_IMPORT(ArmReadMpidr) > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction) > -GCC_ASM_EXPORT(_ModuleEntryPoint) > - > -StartupAddr: .word CEntryPoint > - > -ASM_PFX(_ModuleEntryPoint): > +ASM_FUNC(_ModuleEntryPoint) > // Do early platform specific actions > bl ASM_PFX(ArmPlatformPeiBootAction) > > @@ -41,9 +26,7 @@ ASM_PFX(_ModuleEntryPoint): > bl ASM_PFX(ArmPlatformIsPrimaryCore) > > // Get the top of the primary stacks (and the base of the secondary stacks) > - LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1) > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2) > - add r1, r1, r2 > + MOV32 (r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize)) > > // r0 is equal to 1 if I am the primary core > cmp r0, #1 > @@ -60,20 +43,19 @@ _SetupSecondaryCoreStack: > add r0, r0, #1 > > // StackOffset = CorePos * StackSize > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2) > + MOV32 (r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)) > mul r0, r0, r2 > // SP = StackBase + StackOffset > add sp, r6, r0 > > _PrepareArguments: > // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector > - LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2) > - add r2, r2, #4 > - ldr r1, [r2] > + MOV32 (r2, FixedPcdGet32(PcdFvBaseAddress)) > + ldr r1, [r2, #4] > > // Move sec startup address into a data register > // Ensure we're jumping to FV version of the code (not boot remapped alias) > - ldr r3, StartupAddr > + ldr r3, =ASM_PFX(CEntryPoint) > > // Jump to PrePeiCore C code > // r0 = mp_id > diff --git a/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S b/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S > index 509dc205d992..c419463b4f94 100644 > --- a/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S > +++ b/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S > @@ -12,12 +12,7 @@ > # > #------------------------------------------------------------------------------ > > -.text > -.align 3 > - > -GCC_ASM_EXPORT(SecSwitchStack) > - > - > +#include > > #/** > # This allows the caller to switch the stack and return > @@ -33,7 +28,7 @@ GCC_ASM_EXPORT(SecSwitchStack) > # VOID *StackDelta > # )# > # > -ASM_PFX(SecSwitchStack): > +ASM_FUNC(SecSwitchStack) > mov R1, R13 > add R1, R0, R1 > mov R13, R1 > -- > 2.7.4 > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel