From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x22f.google.com (mail-wm0-x22f.google.com [IPv6:2a00:1450:400c:c09::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 382111A1DF3 for ; Thu, 11 Aug 2016 01:39:32 -0700 (PDT) Received: by mail-wm0-x22f.google.com with SMTP id f65so15922013wmi.0 for ; Thu, 11 Aug 2016 01:39:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=M49DDbhgXgwhI8qJNhY8J98uzpVylUwqKPIC70aIqoQ=; b=YCygIoxqdg6n43O1u4XYq0vuO/EV39TnFwA7B3GKiMm4kDnIJdY+LYlxbiyx75xQUW a10iBA8QQwVw++teqUPbthusT/LLCDWjIy5u89sQShdlW9zHQbUy01DQ2CiSaj7B3udH R+tpw3AhkQFxGVfJ4sTJpIrBfK60yPJJ+/6Vc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=M49DDbhgXgwhI8qJNhY8J98uzpVylUwqKPIC70aIqoQ=; b=Ymq28RepIRhliICpzIcApwkgKshm8U8CZIBmjGvvk/j0uLqzzb60M2s/JjO3PeIIwO kcxyHgsPwCRpASZVHmIMZ3NlSGJXhucWYt01NHXeH/fuskcnwV+z+LmR1nu7j+wDOVrY 5DCx1uW2P6hgXXw2vN3S3EWScfbSXlTp+iBRAjB0YfFuBPHS62U9ypgoXHFN/Yju/BOU bz96IOc5XRgLFGenpjf3R4uHXaU3cYprYBRZgIeKjDhHgVo6EjmxrHKQcGckocI9rCHH uEVvgmdBgGJ3Szxe/Lj9tBcqjl4goTa6clte/VIagZ8NYLC8dH+ldFdhDs0nNNkfDVZa Az1g== X-Gm-Message-State: AEkoout9COV2xwZfUweKYnfPWCzwv7b8IjEVIAhmMY+XnPFruMgRXd/c6foe4/2M200f9zpI X-Received: by 10.194.32.73 with SMTP id g9mr10016079wji.80.1470904770707; Thu, 11 Aug 2016 01:39:30 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id za2sm1528261wjb.34.2016.08.11.01.39.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Aug 2016 01:39:30 -0700 (PDT) Date: Thu, 11 Aug 2016 09:39:28 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, eugene@hp.com, lersek@redhat.com Message-ID: <20160811083928.GS31760@bivouac.eciton.net> References: <1470842282-8415-1-git-send-email-ard.biesheuvel@linaro.org> <1470842282-8415-25-git-send-email-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <1470842282-8415-25-git-send-email-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH 24/26] ArmPlatformPkg/ArmVExpressPkg: switch to ASM_FUNC() asm macro X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Aug 2016 08:39:32 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Aug 10, 2016 at 05:18:00PM +0200, Ard Biesheuvel wrote: > Annotate functions with ASM_FUNC() so that they are emitted into > separate sections. Also replacing LoadConstantToReg. Add that to commit message and: Reviewed-by: Leif Lindholm > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- > ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S | 22 ++++------- > ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S | 28 ++++--------- > ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S | 38 +++++------------- > ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S | 41 ++++++-------------- > ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S | 23 ++++------- > 5 files changed, 41 insertions(+), 111 deletions(-) > > diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S > index 20bfe52610e3..3719a5ace604 100644 > --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S > +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S > @@ -16,22 +16,14 @@ > > #include > > -.text > -.align 2 > - > -GCC_ASM_EXPORT(ArmPlatformPeiBootAction) > -GCC_ASM_EXPORT(ArmPlatformGetCorePosition) > -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) > -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) > - > -ASM_PFX(ArmPlatformPeiBootAction): > +ASM_FUNC(ArmPlatformPeiBootAction) > bx lr > > //UINTN > //ArmPlatformGetCorePosition ( > // IN UINTN MpId > // ); > -ASM_PFX(ArmPlatformGetCorePosition): > +ASM_FUNC(ArmPlatformGetCorePosition) > and r1, r0, #ARM_CORE_MASK > and r0, r0, #ARM_CLUSTER_MASK > add r0, r1, r0, LSR #7 > @@ -41,10 +33,10 @@ ASM_PFX(ArmPlatformGetCorePosition): > //ArmPlatformIsPrimaryCore ( > // IN UINTN MpId > // ); > -ASM_PFX(ArmPlatformIsPrimaryCore): > +ASM_FUNC(ArmPlatformIsPrimaryCore) > // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48 > // with cpu_id[0:3] and cluster_id[4:7] > - LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1) > + MOV32 (r1, ARM_CTA15A7_SCC_CFGREG48) > ldr r1, [r1] > lsr r1, #24 > > @@ -58,7 +50,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore): > orr r1, r1, r2 > > // Keep the Cluster ID and Core ID from the MPID > - LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2) > + MOV32 (r2, ARM_CLUSTER_MASK | ARM_CORE_MASK) > and r0, r0, r2 > > // Compare mpid and boot cpu from ARM_SCC_CFGREG48 > @@ -71,10 +63,10 @@ ASM_PFX(ArmPlatformIsPrimaryCore): > //ArmPlatformGetPrimaryCoreMpId ( > // VOID > // ); > -ASM_PFX(ArmPlatformGetPrimaryCoreMpId): > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48 > // with cpu_id[0:3] and cluster_id[4:7] > - LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0) > + MOV32 (r0, ARM_CTA15A7_SCC_CFGREG48) > ldr r0, [r0] > lsr r0, #24 > > diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S > index c4aee741a602..f95d2f43d665 100644 > --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S > +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S > @@ -14,36 +14,22 @@ > #include > #include > > -.text > -.align 2 > - > -GCC_ASM_EXPORT(ArmPlatformPeiBootAction) > -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) > -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) > -GCC_ASM_EXPORT(ArmPlatformGetCorePosition) > - > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore) > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask) > - > //UINTN > //ArmPlatformGetPrimaryCoreMpId ( > // VOID > // ); > -ASM_PFX(ArmPlatformGetPrimaryCoreMpId): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0) > - ldr r0, [r0] > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > + MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore)) > bx lr > > //UINTN > //ArmPlatformIsPrimaryCore ( > // IN UINTN MpId > // ); > -ASM_PFX(ArmPlatformIsPrimaryCore): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1) > - ldr r1, [r1] > +ASM_FUNC(ArmPlatformIsPrimaryCore) > + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > and r0, r0, r1 > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1) > - ldr r1, [r1] > + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore)) > cmp r0, r1 > moveq r0, #1 > movne r0, #0 > @@ -53,11 +39,11 @@ ASM_PFX(ArmPlatformIsPrimaryCore): > //ArmPlatformGetCorePosition ( > // IN UINTN MpId > // ); > -ASM_PFX(ArmPlatformGetCorePosition): > +ASM_FUNC(ArmPlatformGetCorePosition) > and r0, r0, #ARM_CORE_MASK > bx lr > > -ASM_PFX(ArmPlatformPeiBootAction): > +ASM_FUNC(ArmPlatformPeiBootAction) > bx lr > > ASM_FUNCTION_REMOVE_IF_UNREFERENCED > diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S > index 50ff71391700..db6d83c3cce9 100644 > --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S > +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S > @@ -12,53 +12,33 @@ > # > > #include > -#include > #include > -#include > -#include > > -.text > -.align 2 > - > -GCC_ASM_EXPORT(ArmPlatformPeiBootAction) > -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) > -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) > -GCC_ASM_EXPORT(ArmPlatformGetCorePosition) > -GCC_ASM_EXPORT(ArmGetCpuCountPerCluster) > - > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore) > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask) > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount) > - > -ASM_PFX(ArmPlatformPeiBootAction): > +ASM_FUNC(ArmPlatformPeiBootAction) > ret > > //UINTN > //ArmPlatformGetPrimaryCoreMpId ( > // VOID > // ); > -ASM_PFX(ArmPlatformGetPrimaryCoreMpId): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0) > - ldrh w0, [x0] > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) > ret > > # IN None > # OUT x0 = number of cores present in the system > -ASM_PFX(ArmGetCpuCountPerCluster): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, x0) > - ldrh w0, [x0] > +ASM_FUNC(ArmGetCpuCountPerCluster) > + MOV32 (w0, FixedPcdGet32 (PcdCoreCount)) > ret > > //UINTN > //ArmPlatformIsPrimaryCore ( > // IN UINTN MpId > // ); > -ASM_PFX(ArmPlatformIsPrimaryCore): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1) > - ldrh w1, [x1] > +ASM_FUNC(ArmPlatformIsPrimaryCore) > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > and x0, x0, x1 > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x1) > - ldrh w1, [x1] > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore)) > cmp w0, w1 > b.ne 1f > mov x0, #1 > @@ -72,7 +52,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore): > // IN UINTN MpId > // ); > // With this function: CorePos = (ClusterId * 4) + CoreId > -ASM_PFX(ArmPlatformGetCorePosition): > +ASM_FUNC(ArmPlatformGetCorePosition) > and x1, x0, #ARM_CORE_MASK > and x0, x0, #ARM_CLUSTER_MASK > add x0, x1, x0, LSR #6 > diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S > index e739050b0db5..35743b08dc88 100644 > --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S > +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S > @@ -12,32 +12,16 @@ > # > > #include > -#include > #include > -#include > -#include > -#include "AsmMacroIoLib.inc" > > #include > > -.text > -.align 2 > - > -GCC_ASM_EXPORT(ArmPlatformPeiBootAction) > -GCC_ASM_EXPORT(ArmGetCpuCountPerCluster) > -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) > -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) > -GCC_ASM_EXPORT(ArmPlatformGetCorePosition) > - > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore) > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask) > - > -ASM_PFX(ArmPlatformPeiBootAction): > +ASM_FUNC(ArmPlatformPeiBootAction) > bx lr > > # IN None > # OUT r0 = SCU Base Address > -ASM_PFX(ArmGetScuBaseAddress): > +ASM_FUNC(ArmGetScuBaseAddress) > # Read Configuration Base Address Register. ArmCBar cannot be called to get > # the Configuration BAR as a stack is not necessary setup. The SCU is at the > # offset 0x0000 from the Private Memory Region. > @@ -48,14 +32,13 @@ ASM_PFX(ArmGetScuBaseAddress): > //ArmPlatformGetPrimaryCoreMpId ( > // VOID > // ); > -ASM_PFX(ArmPlatformGetPrimaryCoreMpId): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0) > - ldr r0, [r0] > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > + MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore)) > bx lr > > # IN None > # OUT r0 = number of cores present in the system > -ASM_PFX(ArmGetCpuCountPerCluster): > +ASM_FUNC(ArmGetCpuCountPerCluster) > stmfd SP!, {r1-r2} > > # Read CP15 MIDR > @@ -63,10 +46,10 @@ ASM_PFX(ArmGetCpuCountPerCluster): > > # Check if the CPU is A15 > mov r1, r1, LSR #4 > - LoadConstantToReg (ARM_CPU_TYPE_MASK, r0) > + MOV32 (r0, ARM_CPU_TYPE_MASK) > and r1, r1, r0 > > - LoadConstantToReg (ARM_CPU_TYPE_A15, r0) > + MOV32 (r0, ARM_CPU_TYPE_A15) > cmp r1, r0 > beq _Read_cp15_reg > > @@ -92,12 +75,10 @@ _Return: > //ArmPlatformIsPrimaryCore ( > // IN UINTN MpId > // ); > -ASM_PFX(ArmPlatformIsPrimaryCore): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1) > - ldr r1, [r1] > +ASM_FUNC(ArmPlatformIsPrimaryCore) > + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > and r0, r0, r1 > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1) > - ldr r1, [r1] > + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore)) > cmp r0, r1 > moveq r0, #1 > movne r0, #0 > @@ -107,7 +88,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore): > //ArmPlatformGetCorePosition ( > // IN UINTN MpId > // ); > -ASM_PFX(ArmPlatformGetCorePosition): > +ASM_FUNC(ArmPlatformGetCorePosition) > and r1, r0, #ARM_CORE_MASK > and r0, r0, #ARM_CLUSTER_MASK > add r0, r1, r0, LSR #7 > diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S > index c14c986ccfcc..1579c99ce787 100644 > --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S > +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S > @@ -12,18 +12,9 @@ > // > > #include > -#include > #include > #include > #include > -#include > - > -.text > -.align 3 > - > -GCC_ASM_EXPORT(ArmPlatformSecBootAction) > -GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit) > -GCC_ASM_IMPORT(PL35xSmcInitialize) > > // > // For each Chip Select: ChipSelect / SetCycle / SetOpMode > @@ -69,7 +60,7 @@ VersatileExpressSmcConfigurationEnd: > Note: This function must be implemented in assembler as there is no stack set up yet > > **/ > -ASM_PFX(ArmPlatformSecBootAction): > +ASM_FUNC(ArmPlatformSecBootAction) > bx lr > > /** > @@ -82,21 +73,21 @@ ASM_PFX(ArmPlatformSecBootAction): > pointer is not used (probably required to use assembly language) > > **/ > -ASM_PFX(ArmPlatformSecBootMemoryInit): > +ASM_FUNC(ArmPlatformSecBootMemoryInit) > mov r5, lr > > // > // Initialize PL354 SMC > // > - LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1) > - LoadConstantToReg (VersatileExpressSmcConfiguration, r2) > - LoadConstantToReg (VersatileExpressSmcConfigurationEnd, r3) > + MOV32 (r1, ARM_VE_SMC_CTRL_BASE) > + MOV32 (r2, VersatileExpressSmcConfiguration) > + MOV32 (r3, VersatileExpressSmcConfigurationEnd) > blx ASM_PFX(PL35xSmcInitialize) > > // > // Page mode setup for VRAM > // > - LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2) > + MOV32 (r2, VRAM_MOTHERBOARD_BASE) > > // Read current state > ldr r0, [r2, #0] > @@ -110,7 +101,7 @@ ASM_PFX(ArmPlatformSecBootMemoryInit): > ldr r0, [r2, #0] > ldr r0, = 0x00000000 > str r0, [r2, #0] > - LoadConstantToReg (0x00900090, r0) > + ldr r0, = 0x00900090 > str r0, [r2, #0] > > // Confirm page mode enabled > -- > 2.7.4 >